Omap35xxPkg/MMCHSDxe/MMCHS.h

   1 /** @file
   2
   3   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   4
   5   This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef _MMCHS_H_
  16 #define _MMCHS_H_
  17
  18 #include <Uefi.h>
  19
  20 #include <Library/BaseLib.h>
  21 #include <Library/MemoryAllocationLib.h>
  22 #include <Library/DebugLib.h>
  23 #include <Library/IoLib.h>
  24 #include <Library/PcdLib.h>
  25 #include <Library/UefiBootServicesTableLib.h>
  26 #include <Library/BaseMemoryLib.h>
  27 #include <Library/OmapLib.h>
  28 #include <Library/OmapDmaLib.h>
  29
  30 #include <Protocol/EmbeddedExternalDevice.h>
  31 #include <Protocol/BlockIo.h>
  32 #include <Protocol/DevicePath.h>
  33
  34 #include <Omap3530/Omap3530.h>
  35 #include <TPS65950.h>
  36
  37 #define MAX_RETRY_COUNT  (100*5)
  38
  39 #define HCS               BIT30 //Host capacity support/1 = Supporting high capacity
  40 #define CCS               BIT30 //Card capacity status/1 = High capacity card
  41 typedef struct {
  42   UINT32  Reserved0:   7; // 0
  43   UINT32  V170_V195:   1; // 1.70V - 1.95V
  44   UINT32  V200_V260:   7; // 2.00V - 2.60V
  45   UINT32  V270_V360:   9; // 2.70V - 3.60V
  46   UINT32  RESERVED_1:  5; // Reserved
  47   UINT32  AccessMode:  2; // 00b (byte mode), 10b (sector mode)
  48   UINT32  Busy:        1; // This bit is set to LOW if the card has not finished the power up routine
  49 }OCR;
  50
  51 typedef struct {
  52   UINT32  NOT_USED;   // 1 [0:0]
  53   UINT32  CRC;        // CRC7 checksum [7:1]
  54   UINT32  MDT;        // Manufacturing date [19:8]
  55   UINT32  RESERVED_1; // Reserved [23:20]
  56   UINT32  PSN;        // Product serial number [55:24]
  57   UINT8   PRV;        // Product revision [63:56]
  58   UINT8   PNM[5];     // Product name [64:103]
  59   UINT16  OID;        // OEM/Application ID [119:104]
  60   UINT8   MID;        // Manufacturer ID [127:120]
  61 }CID;
  62
  63 typedef struct {
  64   UINT8   NOT_USED:           1; // Not used, always 1 [0:0]
  65   UINT8   CRC:                7; // CRC [7:1]
  66
  67   UINT8   RESERVED_1:         2; // Reserved [9:8]
  68   UINT8   FILE_FORMAT:        2; // File format [11:10]
  69   UINT8   TMP_WRITE_PROTECT:  1; // Temporary write protection [12:12]
  70   UINT8   PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13]
  71   UINT8   COPY:               1; // Copy flag (OTP) [14:14]
  72   UINT8   FILE_FORMAT_GRP:    1; // File format group [15:15]
  73
  74   UINT16  RESERVED_2:         5; // Reserved [20:16]
  75   UINT16  WRITE_BL_PARTIAL:   1; // Partial blocks for write allowed [21:21]
  76   UINT16  WRITE_BL_LEN:       4; // Max. write data block length [25:22]
  77   UINT16  R2W_FACTOR:         3; // Write speed factor [28:26]
  78   UINT16  RESERVED_3:         2; // Reserved [30:29]
  79   UINT16  WP_GRP_ENABLE:      1; // Write protect group enable [31:31]
  80
  81   UINT32  WP_GRP_SIZE:        7; // Write protect group size [38:32]
  82   UINT32  SECTOR_SIZE:        7; // Erase sector size [45:39]
  83   UINT32  ERASE_BLK_EN:       1; // Erase single block enable [46:46]
  84   UINT32  C_SIZE_MULT:        3; // Device size multiplier [49:47]
  85   UINT32  VDD_W_CURR_MAX:     3; // Max. write current @ VDD max [52:50]
  86   UINT32  VDD_W_CURR_MIN:     3; // Max. write current @ VDD min [55:53]
  87   UINT32  VDD_R_CURR_MAX:     3; // Max. read current @ VDD max [58:56]
  88   UINT32  VDD_R_CURR_MIN:     3; // Max. read current @ VDD min [61:59]
  89   UINT32  C_SIZELow2:         2; // Device size [63:62]
  90
  91   UINT32  C_SIZEHigh10:       10;// Device size [73:64]
  92   UINT32  RESERVED_4:         2; // Reserved [75:74]
  93   UINT32  DSR_IMP:            1; // DSR implemented [76:76]
  94   UINT32  READ_BLK_MISALIGN:  1; // Read block misalignment [77:77]
  95   UINT32  WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78]
  96   UINT32  READ_BL_PARTIAL:    1; // Partial blocks for read allowed [79:79]
  97   UINT32  READ_BL_LEN:        4; // Max. read data block length [83:80]
  98   UINT32  CCC:                12;// Card command classes [95:84]
  99
 100   UINT8   TRAN_SPEED          ;  // Max. bus clock frequency [103:96]
 101   UINT8   NSAC                ;  // Data read access-time 2 in CLK cycles (NSAC*100) [111:104]
 102   UINT8   TAAC                ;  // Data read access-time 1 [119:112]
 103
 104   UINT8   RESERVED_5:         6; // Reserved [125:120]
 105   UINT8   CSD_STRUCTURE:      2; // CSD structure [127:126]
 106 }CSD;
 107
 108 typedef struct {
 109   UINT8   NOT_USED:           1; // Not used, always 1 [0:0]
 110   UINT8   CRC:                7; // CRC [7:1]
 111   UINT8   RESERVED_1:         2; // Reserved [9:8]
 112   UINT8   FILE_FORMAT:        2; // File format [11:10]
 113   UINT8   TMP_WRITE_PROTECT:  1; // Temporary write protection [12:12]
 114   UINT8   PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13]
 115   UINT8   COPY:               1; // Copy flag (OTP) [14:14]
 116   UINT8   FILE_FORMAT_GRP:    1; // File format group [15:15]
 117   UINT16  RESERVED_2:         5; // Reserved [20:16]
 118   UINT16  WRITE_BL_PARTIAL:   1; // Partial blocks for write allowed [21:21]
 119   UINT16  WRITE_BL_LEN:       4; // Max. write data block length [25:22]
 120   UINT16  R2W_FACTOR:         3; // Write speed factor [28:26]
 121   UINT16  RESERVED_3:         2; // Reserved [30:29]
 122   UINT16  WP_GRP_ENABLE:      1; // Write protect group enable [31:31]
 123   UINT16  WP_GRP_SIZE:        7; // Write protect group size [38:32]
 124   UINT16  SECTOR_SIZE:        7; // Erase sector size [45:39]
 125   UINT16  ERASE_BLK_EN:       1; // Erase single block enable [46:46]
 126   UINT16  RESERVED_4:         1; // Reserved [47:47]
 127   UINT32  C_SIZELow16:        16;// Device size [69:48]
 128   UINT32  C_SIZEHigh6:        6; // Device size [69:48]
 129   UINT32  RESERVED_5:         6; // Reserved [75:70]
 130   UINT32  DSR_IMP:            1; // DSR implemented [76:76]
 131   UINT32  READ_BLK_MISALIGN:  1; // Read block misalignment [77:77]
 132   UINT32  WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78]
 133   UINT32  READ_BL_PARTIAL:    1; // Partial blocks for read allowed [79:79]
 134   UINT16  READ_BL_LEN:        4; // Max. read data block length [83:80]
 135   UINT16  CCC:                12;// Card command classes [95:84]
 136   UINT8   TRAN_SPEED          ;  // Max. bus clock frequency [103:96]
 137   UINT8   NSAC                ;  // Data read access-time 2 in CLK cycles (NSAC*100) [111:104]
 138   UINT8   TAAC                ;  // Data read access-time 1 [119:112]
 139   UINT8   RESERVED_6:         6; // 0 [125:120]
 140   UINT8   CSD_STRUCTURE:      2; // CSD structure [127:126]
 141 }CSD_SDV2;
 142
 143 typedef enum {
 144   UNKNOWN_CARD,
 145   MMC_CARD,              //MMC card
 146   SD_CARD,               //SD 1.1 card
 147   SD_CARD_2,             //SD 2.0 or above standard card
 148   SD_CARD_2_HIGH         //SD 2.0 or above high capacity card
 149 } CARD_TYPE;
 150
 151 typedef enum {
 152   READ,
 153   WRITE
 154 } OPERATION_TYPE;
 155
 156 typedef struct  {
 157   UINT16    RCA;
 158   UINTN     BlockSize;
 159   UINTN     NumBlocks;
 160   UINTN     ClockFrequencySelect;
 161   CARD_TYPE CardType;
 162   OCR       OCRData;
 163   CID       CIDData;
 164   CSD       CSDData;
 165 } CARD_INFO;
 166
 167 EFI_STATUS
 168 DetectCard (
 169   VOID
 170   );
 171
 172 extern EFI_BLOCK_IO_PROTOCOL gBlockIo;
 173
 174 #endif