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1 /** @file
2 OVMF's instance of the PCI Host Bridge Library.
3
4 Copyright (C) 2016, Red Hat, Inc.
5 Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
6
7 This program and the accompanying materials are licensed and made available
8 under the terms and conditions of the BSD License which accompanies this
9 distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php.
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
13 WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16 #include <PiDxe.h>
17
18 #include <IndustryStandard/Pci.h>
19
20 #include <Protocol/PciRootBridgeIo.h>
21
22 #include <Library/BaseMemoryLib.h>
23 #include <Library/DebugLib.h>
24 #include <Library/MemoryAllocationLib.h>
25 #include <Library/PciHostBridgeLib.h>
26 #include <Library/PciLib.h>
27 #include <Library/QemuFwCfgLib.h>
28
29
30 GLOBAL_REMOVE_IF_UNREFERENCED
31 CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
32 L"Mem", L"I/O", L"Bus"
33 };
34
35
36 /**
37 Initialize a PCI_ROOT_BRIDGE structure.
38
39 param[in] RootBusNumber The bus number to store in RootBus.
40
41 param[in] MaxSubBusNumber The inclusive maximum bus number that can be
42 assigned to any subordinate bus found behind any
43 PCI bridge hanging off this root bus.
44
45 The caller is repsonsible for ensuring that
46 RootBusNumber <= MaxSubBusNumber. If
47 RootBusNumber equals MaxSubBusNumber, then the
48 root bus has no room for subordinate buses.
49
50 param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the
51 caller) that should be filled in by this
52 function.
53
54 @retval EFI_SUCCESS Initialization successful. A device path
55 consisting of an ACPI device path node, with
56 UID = RootBusNumber, has been allocated and
57 linked into RootBus.
58
59 @retval EFI_OUT_OF_RESOURCES Memory allocation failed.
60 **/
61 STATIC
62 EFI_STATUS
63 InitRootBridge (
64 IN UINT8 RootBusNumber,
65 IN UINT8 MaxSubBusNumber,
66 OUT PCI_ROOT_BRIDGE *RootBus
67 )
68 {
69 //
70 // Be safe if other fields are added to PCI_ROOT_BRIDGE later.
71 //
72 ZeroMem (RootBus, sizeof *RootBus);
73
74 RootBus->Segment = 0;
75
76 RootBus->Supports = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |
77 EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
78 EFI_PCI_ATTRIBUTE_ISA_IO_16 |
79 EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
80 EFI_PCI_ATTRIBUTE_VGA_MEMORY |
81 EFI_PCI_ATTRIBUTE_VGA_IO_16 |
82 EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
83 RootBus->Attributes = RootBus->Supports;
84
85 RootBus->DmaAbove4G = FALSE;
86
87 return EFI_OUT_OF_RESOURCES;
88 }
89
90
91 /**
92 Uninitialize a PCI_ROOT_BRIDGE structure set up with InitRootBridge().
93
94 param[in] RootBus The PCI_ROOT_BRIDGE structure, allocated by the caller and
95 initialized with InitRootBridge(), that should be
96 uninitialized. This function doesn't free RootBus.
97 **/
98 STATIC
99 VOID
100 UninitRootBridge (
101 IN PCI_ROOT_BRIDGE *RootBus
102 )
103 {
104 }
105
106
107 /**
108 Return all the root bridge instances in an array.
109
110 @param Count Return the count of root bridge instances.
111
112 @return All the root bridge instances in an array.
113 The array should be passed into PciHostBridgeFreeRootBridges()
114 when it's not used.
115 **/
116 PCI_ROOT_BRIDGE *
117 EFIAPI
118 PciHostBridgeGetRootBridges (
119 UINTN *Count
120 )
121 {
122 EFI_STATUS Status;
123 FIRMWARE_CONFIG_ITEM FwCfgItem;
124 UINTN FwCfgSize;
125 UINT64 ExtraRootBridges;
126 PCI_ROOT_BRIDGE *Bridges;
127 UINTN Initialized;
128 UINTN LastRootBridgeNumber;
129 UINTN RootBridgeNumber;
130
131 *Count = 0;
132
133 //
134 // QEMU provides the number of extra root buses, shortening the exhaustive
135 // search below. If there is no hint, the feature is missing.
136 //
137 Status = QemuFwCfgFindFile ("etc/extra-pci-roots", &FwCfgItem, &FwCfgSize);
138 if (EFI_ERROR (Status) || FwCfgSize != sizeof ExtraRootBridges) {
139 ExtraRootBridges = 0;
140 } else {
141 QemuFwCfgSelectItem (FwCfgItem);
142 QemuFwCfgReadBytes (FwCfgSize, &ExtraRootBridges);
143
144 if (ExtraRootBridges > PCI_MAX_BUS) {
145 DEBUG ((EFI_D_ERROR, "%a: invalid count of extra root buses (%Lu) "
146 "reported by QEMU\n", __FUNCTION__, ExtraRootBridges));
147 return NULL;
148 }
149 DEBUG ((EFI_D_INFO, "%a: %Lu extra root buses reported by QEMU\n",
150 __FUNCTION__, ExtraRootBridges));
151 }
152
153 //
154 // Allocate the "main" root bridge, and any extra root bridges.
155 //
156 Bridges = AllocatePool ((1 + (UINTN)ExtraRootBridges) * sizeof *Bridges);
157 if (Bridges == NULL) {
158 DEBUG ((EFI_D_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));
159 return NULL;
160 }
161 Initialized = 0;
162
163 //
164 // The "main" root bus is always there.
165 //
166 LastRootBridgeNumber = 0;
167
168 //
169 // Scan all other root buses. If function 0 of any device on a bus returns a
170 // VendorId register value different from all-bits-one, then that bus is
171 // alive.
172 //
173 for (RootBridgeNumber = 1;
174 RootBridgeNumber <= PCI_MAX_BUS && Initialized < ExtraRootBridges;
175 ++RootBridgeNumber) {
176 UINTN Device;
177
178 for (Device = 0; Device <= PCI_MAX_DEVICE; ++Device) {
179 if (PciRead16 (PCI_LIB_ADDRESS (RootBridgeNumber, Device, 0,
180 PCI_VENDOR_ID_OFFSET)) != MAX_UINT16) {
181 break;
182 }
183 }
184 if (Device <= PCI_MAX_DEVICE) {
185 //
186 // Found the next root bus. We can now install the *previous* one,
187 // because now we know how big a bus number range *that* one has, for any
188 // subordinate buses that might exist behind PCI bridges hanging off it.
189 //
190 Status = InitRootBridge ((UINT8)LastRootBridgeNumber,
191 (UINT8)(RootBridgeNumber - 1), &Bridges[Initialized]);
192 if (EFI_ERROR (Status)) {
193 goto FreeBridges;
194 }
195 ++Initialized;
196 LastRootBridgeNumber = RootBridgeNumber;
197 }
198 }
199
200 //
201 // Install the last root bus (which might be the only, ie. main, root bus, if
202 // we've found no extra root buses).
203 //
204 Status = InitRootBridge ((UINT8)LastRootBridgeNumber, PCI_MAX_BUS,
205 &Bridges[Initialized]);
206 if (EFI_ERROR (Status)) {
207 goto FreeBridges;
208 }
209 ++Initialized;
210
211 *Count = Initialized;
212 return Bridges;
213
214 FreeBridges:
215 while (Initialized > 0) {
216 --Initialized;
217 UninitRootBridge (&Bridges[Initialized]);
218 }
219
220 FreePool (Bridges);
221 return NULL;
222 }
223
224
225 /**
226 Free the root bridge instances array returned from
227 PciHostBridgeGetRootBridges().
228
229 @param The root bridge instances array.
230 @param The count of the array.
231 **/
232 VOID
233 EFIAPI
234 PciHostBridgeFreeRootBridges (
235 PCI_ROOT_BRIDGE *Bridges,
236 UINTN Count
237 )
238 {
239 if (Bridges == NULL && Count == 0) {
240 return;
241 }
242 ASSERT (Bridges != NULL && Count > 0);
243
244 do {
245 --Count;
246 UninitRootBridge (&Bridges[Count]);
247 } while (Count > 0);
248
249 FreePool (Bridges);
250 }
251
252
253 /**
254 Inform the platform that the resource conflict happens.
255
256 @param HostBridgeHandle Handle of the Host Bridge.
257 @param Configuration Pointer to PCI I/O and PCI memory resource
258 descriptors. The Configuration contains the resources
259 for all the root bridges. The resource for each root
260 bridge is terminated with END descriptor and an
261 additional END is appended indicating the end of the
262 entire resources. The resource descriptor field
263 values follow the description in
264 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
265 .SubmitResources().
266 **/
267 VOID
268 EFIAPI
269 PciHostBridgeResourceConflict (
270 EFI_HANDLE HostBridgeHandle,
271 VOID *Configuration
272 )
273 {
274 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
275 UINTN RootBridgeIndex;
276 DEBUG ((EFI_D_ERROR, "PciHostBridge: Resource conflict happens!\n"));
277
278 RootBridgeIndex = 0;
279 Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
280 while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
281 DEBUG ((EFI_D_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));
282 for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
283 ASSERT (Descriptor->ResType <
284 (sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) /
285 sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr[0])
286 )
287 );
288 DEBUG ((EFI_D_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",
289 mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],
290 Descriptor->AddrLen, Descriptor->AddrRangeMax
291 ));
292 if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
293 DEBUG ((EFI_D_ERROR, " Granularity/SpecificFlag = %ld / %02x%s\n",
294 Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
295 ((Descriptor->SpecificFlag &
296 EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE
297 ) != 0) ? L" (Prefetchable)" : L""
298 ));
299 }
300 }
301 //
302 // Skip the END descriptor for root bridge
303 //
304 ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);
305 Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(
306 (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1
307 );
308 }
309 }