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1 /** @file
2 OVMF's instance of the PCI Host Bridge Library.
3
4 Copyright (C) 2016, Red Hat, Inc.
5 Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
6
7 This program and the accompanying materials are licensed and made available
8 under the terms and conditions of the BSD License which accompanies this
9 distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php.
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
13 WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16 #include <PiDxe.h>
17
18 #include <IndustryStandard/Pci.h>
19
20 #include <Protocol/PciHostBridgeResourceAllocation.h>
21 #include <Protocol/PciRootBridgeIo.h>
22
23 #include <Library/BaseMemoryLib.h>
24 #include <Library/DebugLib.h>
25 #include <Library/MemoryAllocationLib.h>
26 #include <Library/PciHostBridgeLib.h>
27 #include <Library/PciLib.h>
28 #include <Library/QemuFwCfgLib.h>
29
30
31 GLOBAL_REMOVE_IF_UNREFERENCED
32 CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
33 L"Mem", L"I/O", L"Bus"
34 };
35
36
37 /**
38 Initialize a PCI_ROOT_BRIDGE structure.
39
40 param[in] RootBusNumber The bus number to store in RootBus.
41
42 param[in] MaxSubBusNumber The inclusive maximum bus number that can be
43 assigned to any subordinate bus found behind any
44 PCI bridge hanging off this root bus.
45
46 The caller is repsonsible for ensuring that
47 RootBusNumber <= MaxSubBusNumber. If
48 RootBusNumber equals MaxSubBusNumber, then the
49 root bus has no room for subordinate buses.
50
51 param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the
52 caller) that should be filled in by this
53 function.
54
55 @retval EFI_SUCCESS Initialization successful. A device path
56 consisting of an ACPI device path node, with
57 UID = RootBusNumber, has been allocated and
58 linked into RootBus.
59
60 @retval EFI_OUT_OF_RESOURCES Memory allocation failed.
61 **/
62 STATIC
63 EFI_STATUS
64 InitRootBridge (
65 IN UINT8 RootBusNumber,
66 IN UINT8 MaxSubBusNumber,
67 OUT PCI_ROOT_BRIDGE *RootBus
68 )
69 {
70 //
71 // Be safe if other fields are added to PCI_ROOT_BRIDGE later.
72 //
73 ZeroMem (RootBus, sizeof *RootBus);
74
75 RootBus->Segment = 0;
76
77 RootBus->Supports = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |
78 EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
79 EFI_PCI_ATTRIBUTE_ISA_IO_16 |
80 EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
81 EFI_PCI_ATTRIBUTE_VGA_MEMORY |
82 EFI_PCI_ATTRIBUTE_VGA_IO_16 |
83 EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
84 RootBus->Attributes = RootBus->Supports;
85
86 RootBus->DmaAbove4G = FALSE;
87
88 RootBus->AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
89 RootBus->PMem.Base = 0;
90 RootBus->PMem.Limit = 0;
91 RootBus->PMemAbove4G.Base = 0;
92 RootBus->PMemAbove4G.Limit = 0;
93 RootBus->MemAbove4G.Base = 0;
94 RootBus->MemAbove4G.Limit = 0;
95
96 return EFI_OUT_OF_RESOURCES;
97 }
98
99
100 /**
101 Uninitialize a PCI_ROOT_BRIDGE structure set up with InitRootBridge().
102
103 param[in] RootBus The PCI_ROOT_BRIDGE structure, allocated by the caller and
104 initialized with InitRootBridge(), that should be
105 uninitialized. This function doesn't free RootBus.
106 **/
107 STATIC
108 VOID
109 UninitRootBridge (
110 IN PCI_ROOT_BRIDGE *RootBus
111 )
112 {
113 }
114
115
116 /**
117 Return all the root bridge instances in an array.
118
119 @param Count Return the count of root bridge instances.
120
121 @return All the root bridge instances in an array.
122 The array should be passed into PciHostBridgeFreeRootBridges()
123 when it's not used.
124 **/
125 PCI_ROOT_BRIDGE *
126 EFIAPI
127 PciHostBridgeGetRootBridges (
128 UINTN *Count
129 )
130 {
131 EFI_STATUS Status;
132 FIRMWARE_CONFIG_ITEM FwCfgItem;
133 UINTN FwCfgSize;
134 UINT64 ExtraRootBridges;
135 PCI_ROOT_BRIDGE *Bridges;
136 UINTN Initialized;
137 UINTN LastRootBridgeNumber;
138 UINTN RootBridgeNumber;
139
140 *Count = 0;
141
142 //
143 // QEMU provides the number of extra root buses, shortening the exhaustive
144 // search below. If there is no hint, the feature is missing.
145 //
146 Status = QemuFwCfgFindFile ("etc/extra-pci-roots", &FwCfgItem, &FwCfgSize);
147 if (EFI_ERROR (Status) || FwCfgSize != sizeof ExtraRootBridges) {
148 ExtraRootBridges = 0;
149 } else {
150 QemuFwCfgSelectItem (FwCfgItem);
151 QemuFwCfgReadBytes (FwCfgSize, &ExtraRootBridges);
152
153 if (ExtraRootBridges > PCI_MAX_BUS) {
154 DEBUG ((EFI_D_ERROR, "%a: invalid count of extra root buses (%Lu) "
155 "reported by QEMU\n", __FUNCTION__, ExtraRootBridges));
156 return NULL;
157 }
158 DEBUG ((EFI_D_INFO, "%a: %Lu extra root buses reported by QEMU\n",
159 __FUNCTION__, ExtraRootBridges));
160 }
161
162 //
163 // Allocate the "main" root bridge, and any extra root bridges.
164 //
165 Bridges = AllocatePool ((1 + (UINTN)ExtraRootBridges) * sizeof *Bridges);
166 if (Bridges == NULL) {
167 DEBUG ((EFI_D_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));
168 return NULL;
169 }
170 Initialized = 0;
171
172 //
173 // The "main" root bus is always there.
174 //
175 LastRootBridgeNumber = 0;
176
177 //
178 // Scan all other root buses. If function 0 of any device on a bus returns a
179 // VendorId register value different from all-bits-one, then that bus is
180 // alive.
181 //
182 for (RootBridgeNumber = 1;
183 RootBridgeNumber <= PCI_MAX_BUS && Initialized < ExtraRootBridges;
184 ++RootBridgeNumber) {
185 UINTN Device;
186
187 for (Device = 0; Device <= PCI_MAX_DEVICE; ++Device) {
188 if (PciRead16 (PCI_LIB_ADDRESS (RootBridgeNumber, Device, 0,
189 PCI_VENDOR_ID_OFFSET)) != MAX_UINT16) {
190 break;
191 }
192 }
193 if (Device <= PCI_MAX_DEVICE) {
194 //
195 // Found the next root bus. We can now install the *previous* one,
196 // because now we know how big a bus number range *that* one has, for any
197 // subordinate buses that might exist behind PCI bridges hanging off it.
198 //
199 Status = InitRootBridge ((UINT8)LastRootBridgeNumber,
200 (UINT8)(RootBridgeNumber - 1), &Bridges[Initialized]);
201 if (EFI_ERROR (Status)) {
202 goto FreeBridges;
203 }
204 ++Initialized;
205 LastRootBridgeNumber = RootBridgeNumber;
206 }
207 }
208
209 //
210 // Install the last root bus (which might be the only, ie. main, root bus, if
211 // we've found no extra root buses).
212 //
213 Status = InitRootBridge ((UINT8)LastRootBridgeNumber, PCI_MAX_BUS,
214 &Bridges[Initialized]);
215 if (EFI_ERROR (Status)) {
216 goto FreeBridges;
217 }
218 ++Initialized;
219
220 *Count = Initialized;
221 return Bridges;
222
223 FreeBridges:
224 while (Initialized > 0) {
225 --Initialized;
226 UninitRootBridge (&Bridges[Initialized]);
227 }
228
229 FreePool (Bridges);
230 return NULL;
231 }
232
233
234 /**
235 Free the root bridge instances array returned from
236 PciHostBridgeGetRootBridges().
237
238 @param The root bridge instances array.
239 @param The count of the array.
240 **/
241 VOID
242 EFIAPI
243 PciHostBridgeFreeRootBridges (
244 PCI_ROOT_BRIDGE *Bridges,
245 UINTN Count
246 )
247 {
248 if (Bridges == NULL && Count == 0) {
249 return;
250 }
251 ASSERT (Bridges != NULL && Count > 0);
252
253 do {
254 --Count;
255 UninitRootBridge (&Bridges[Count]);
256 } while (Count > 0);
257
258 FreePool (Bridges);
259 }
260
261
262 /**
263 Inform the platform that the resource conflict happens.
264
265 @param HostBridgeHandle Handle of the Host Bridge.
266 @param Configuration Pointer to PCI I/O and PCI memory resource
267 descriptors. The Configuration contains the resources
268 for all the root bridges. The resource for each root
269 bridge is terminated with END descriptor and an
270 additional END is appended indicating the end of the
271 entire resources. The resource descriptor field
272 values follow the description in
273 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
274 .SubmitResources().
275 **/
276 VOID
277 EFIAPI
278 PciHostBridgeResourceConflict (
279 EFI_HANDLE HostBridgeHandle,
280 VOID *Configuration
281 )
282 {
283 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
284 UINTN RootBridgeIndex;
285 DEBUG ((EFI_D_ERROR, "PciHostBridge: Resource conflict happens!\n"));
286
287 RootBridgeIndex = 0;
288 Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
289 while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
290 DEBUG ((EFI_D_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));
291 for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
292 ASSERT (Descriptor->ResType <
293 (sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) /
294 sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr[0])
295 )
296 );
297 DEBUG ((EFI_D_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",
298 mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],
299 Descriptor->AddrLen, Descriptor->AddrRangeMax
300 ));
301 if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
302 DEBUG ((EFI_D_ERROR, " Granularity/SpecificFlag = %ld / %02x%s\n",
303 Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
304 ((Descriptor->SpecificFlag &
305 EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE
306 ) != 0) ? L" (Prefetchable)" : L""
307 ));
308 }
309 }
310 //
311 // Skip the END descriptor for root bridge
312 //
313 ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);
314 Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(
315 (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1
316 );
317 }
318 }