OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c

   1 /** @file
   2   OVMF's instance of the PCI Host Bridge Library.
   3
   4   Copyright (C) 2016, Red Hat, Inc.
   5   Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
   6
   7   This program and the accompanying materials are licensed and made available
   8   under the terms and conditions of the BSD License which accompanies this
   9   distribution.  The full text of the license may be found at
  10   http://opensource.org/licenses/bsd-license.php.
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
  13   WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15 **/
  16 #include <PiDxe.h>
  17
  18 #include <IndustryStandard/Pci.h>
  19
  20 #include <Protocol/PciHostBridgeResourceAllocation.h>
  21 #include <Protocol/PciRootBridgeIo.h>
  22
  23 #include <Library/BaseMemoryLib.h>
  24 #include <Library/DebugLib.h>
  25 #include <Library/DevicePathLib.h>
  26 #include <Library/MemoryAllocationLib.h>
  27 #include <Library/PciHostBridgeLib.h>
  28 #include <Library/PciLib.h>
  29 #include <Library/QemuFwCfgLib.h>
  30
  31
  32 #pragma pack(1)
  33 typedef struct {
  34   ACPI_HID_DEVICE_PATH     AcpiDevicePath;
  35   EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
  36 } OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH;
  37 #pragma pack ()
  38
  39
  40 GLOBAL_REMOVE_IF_UNREFERENCED
  41 CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
  42   L"Mem", L"I/O", L"Bus"
  43 };
  44
  45
  46 STATIC
  47 CONST
  48 OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = {
  49   {
  50     {
  51       ACPI_DEVICE_PATH,
  52       ACPI_DP,
  53       {
  54         (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
  55         (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
  56       }
  57     },
  58     EISA_PNP_ID(0x0A03), // HID
  59     0                    // UID
  60   },
  61
  62   {
  63     END_DEVICE_PATH_TYPE,
  64     END_ENTIRE_DEVICE_PATH_SUBTYPE,
  65     {
  66       END_DEVICE_PATH_LENGTH,
  67       0
  68     }
  69   }
  70 };
  71
  72
  73 /**
  74   Initialize a PCI_ROOT_BRIDGE structure.
  75
  76   param[in]  RootBusNumber     The bus number to store in RootBus.
  77
  78   param[in]  MaxSubBusNumber   The inclusive maximum bus number that can be
  79                                assigned to any subordinate bus found behind any
  80                                PCI bridge hanging off this root bus.
  81
  82                                The caller is repsonsible for ensuring that
  83                                RootBusNumber <= MaxSubBusNumber. If
  84                                RootBusNumber equals MaxSubBusNumber, then the
  85                                root bus has no room for subordinate buses.
  86
  87   param[out] RootBus           The PCI_ROOT_BRIDGE structure (allocated by the
  88                                caller) that should be filled in by this
  89                                function.
  90
  91   @retval EFI_SUCCESS           Initialization successful. A device path
  92                                 consisting of an ACPI device path node, with
  93                                 UID = RootBusNumber, has been allocated and
  94                                 linked into RootBus.
  95
  96   @retval EFI_OUT_OF_RESOURCES  Memory allocation failed.
  97 **/
  98 STATIC
  99 EFI_STATUS
 100 InitRootBridge (
 101   IN  UINT8           RootBusNumber,
 102   IN  UINT8           MaxSubBusNumber,
 103   OUT PCI_ROOT_BRIDGE *RootBus
 104   )
 105 {
 106   OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;
 107
 108   //
 109   // Be safe if other fields are added to PCI_ROOT_BRIDGE later.
 110   //
 111   ZeroMem (RootBus, sizeof *RootBus);
 112
 113   RootBus->Segment = 0;
 114
 115   RootBus->Supports   = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |
 116                         EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
 117                         EFI_PCI_ATTRIBUTE_ISA_IO_16 |
 118                         EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
 119                         EFI_PCI_ATTRIBUTE_VGA_MEMORY |
 120                         EFI_PCI_ATTRIBUTE_VGA_IO_16  |
 121                         EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
 122   RootBus->Attributes = RootBus->Supports;
 123
 124   RootBus->DmaAbove4G = FALSE;
 125
 126   RootBus->AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
 127   RootBus->PMem.Base            = 0;
 128   RootBus->PMem.Limit           = 0;
 129   RootBus->PMemAbove4G.Base     = 0;
 130   RootBus->PMemAbove4G.Limit    = 0;
 131   RootBus->MemAbove4G.Base      = 0;
 132   RootBus->MemAbove4G.Limit     = 0;
 133
 134   RootBus->Bus.Base  = RootBusNumber;
 135   RootBus->Bus.Limit = MaxSubBusNumber;
 136   RootBus->Io.Base   = PcdGet64 (PcdPciIoBase);
 137   RootBus->Io.Limit  = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);
 138   RootBus->Mem.Base  = PcdGet64 (PcdPciMmio32Base);
 139   RootBus->Mem.Limit = PcdGet64 (PcdPciMmio32Base) +
 140                        (PcdGet64 (PcdPciMmio32Size) - 1);
 141
 142   RootBus->NoExtendedConfigSpace = TRUE;
 143
 144   DevicePath = AllocateCopyPool (sizeof mRootBridgeDevicePathTemplate,
 145                  &mRootBridgeDevicePathTemplate);
 146   if (DevicePath == NULL) {
 147     DEBUG ((EFI_D_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));
 148     return EFI_OUT_OF_RESOURCES;
 149   }
 150   DevicePath->AcpiDevicePath.UID = RootBusNumber;
 151   RootBus->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePath;
 152
 153   DEBUG ((EFI_D_INFO,
 154     "%a: populated root bus %d, with room for %d subordinate bus(es)\n",
 155     __FUNCTION__, RootBusNumber, MaxSubBusNumber - RootBusNumber));
 156   return EFI_SUCCESS;
 157 }
 158
 159
 160 /**
 161   Uninitialize a PCI_ROOT_BRIDGE structure set up with InitRootBridge().
 162
 163   param[in] RootBus  The PCI_ROOT_BRIDGE structure, allocated by the caller and
 164                      initialized with InitRootBridge(), that should be
 165                      uninitialized. This function doesn't free RootBus.
 166 **/
 167 STATIC
 168 VOID
 169 UninitRootBridge (
 170   IN PCI_ROOT_BRIDGE *RootBus
 171   )
 172 {
 173   FreePool (RootBus->DevicePath);
 174 }
 175
 176
 177 /**
 178   Return all the root bridge instances in an array.
 179
 180   @param Count  Return the count of root bridge instances.
 181
 182   @return All the root bridge instances in an array.
 183           The array should be passed into PciHostBridgeFreeRootBridges()
 184           when it's not used.
 185 **/
 186 PCI_ROOT_BRIDGE *
 187 EFIAPI
 188 PciHostBridgeGetRootBridges (
 189   UINTN *Count
 190   )
 191 {
 192   EFI_STATUS           Status;
 193   FIRMWARE_CONFIG_ITEM FwCfgItem;
 194   UINTN                FwCfgSize;
 195   UINT64               ExtraRootBridges;
 196   PCI_ROOT_BRIDGE      *Bridges;
 197   UINTN                Initialized;
 198   UINTN                LastRootBridgeNumber;
 199   UINTN                RootBridgeNumber;
 200
 201   *Count = 0;
 202
 203   //
 204   // QEMU provides the number of extra root buses, shortening the exhaustive
 205   // search below. If there is no hint, the feature is missing.
 206   //
 207   Status = QemuFwCfgFindFile ("etc/extra-pci-roots", &FwCfgItem, &FwCfgSize);
 208   if (EFI_ERROR (Status) || FwCfgSize != sizeof ExtraRootBridges) {
 209     ExtraRootBridges = 0;
 210   } else {
 211     QemuFwCfgSelectItem (FwCfgItem);
 212     QemuFwCfgReadBytes (FwCfgSize, &ExtraRootBridges);
 213
 214     if (ExtraRootBridges > PCI_MAX_BUS) {
 215       DEBUG ((EFI_D_ERROR, "%a: invalid count of extra root buses (%Lu) "
 216         "reported by QEMU\n", __FUNCTION__, ExtraRootBridges));
 217       return NULL;
 218     }
 219     DEBUG ((EFI_D_INFO, "%a: %Lu extra root buses reported by QEMU\n",
 220       __FUNCTION__, ExtraRootBridges));
 221   }
 222
 223   //
 224   // Allocate the "main" root bridge, and any extra root bridges.
 225   //
 226   Bridges = AllocatePool ((1 + (UINTN)ExtraRootBridges) * sizeof *Bridges);
 227   if (Bridges == NULL) {
 228     DEBUG ((EFI_D_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));
 229     return NULL;
 230   }
 231   Initialized = 0;
 232
 233   //
 234   // The "main" root bus is always there.
 235   //
 236   LastRootBridgeNumber = 0;
 237
 238   //
 239   // Scan all other root buses. If function 0 of any device on a bus returns a
 240   // VendorId register value different from all-bits-one, then that bus is
 241   // alive.
 242   //
 243   for (RootBridgeNumber = 1;
 244        RootBridgeNumber <= PCI_MAX_BUS && Initialized < ExtraRootBridges;
 245        ++RootBridgeNumber) {
 246     UINTN Device;
 247
 248     for (Device = 0; Device <= PCI_MAX_DEVICE; ++Device) {
 249       if (PciRead16 (PCI_LIB_ADDRESS (RootBridgeNumber, Device, 0,
 250                        PCI_VENDOR_ID_OFFSET)) != MAX_UINT16) {
 251         break;
 252       }
 253     }
 254     if (Device <= PCI_MAX_DEVICE) {
 255       //
 256       // Found the next root bus. We can now install the *previous* one,
 257       // because now we know how big a bus number range *that* one has, for any
 258       // subordinate buses that might exist behind PCI bridges hanging off it.
 259       //
 260       Status = InitRootBridge ((UINT8)LastRootBridgeNumber,
 261                  (UINT8)(RootBridgeNumber - 1), &Bridges[Initialized]);
 262       if (EFI_ERROR (Status)) {
 263         goto FreeBridges;
 264       }
 265       ++Initialized;
 266       LastRootBridgeNumber = RootBridgeNumber;
 267     }
 268   }
 269
 270   //
 271   // Install the last root bus (which might be the only, ie. main, root bus, if
 272   // we've found no extra root buses).
 273   //
 274   Status = InitRootBridge ((UINT8)LastRootBridgeNumber, PCI_MAX_BUS,
 275              &Bridges[Initialized]);
 276   if (EFI_ERROR (Status)) {
 277     goto FreeBridges;
 278   }
 279   ++Initialized;
 280
 281   *Count = Initialized;
 282   return Bridges;
 283
 284 FreeBridges:
 285   while (Initialized > 0) {
 286     --Initialized;
 287     UninitRootBridge (&Bridges[Initialized]);
 288   }
 289
 290   FreePool (Bridges);
 291   return NULL;
 292 }
 293
 294
 295 /**
 296   Free the root bridge instances array returned from
 297   PciHostBridgeGetRootBridges().
 298
 299   @param  The root bridge instances array.
 300   @param  The count of the array.
 301 **/
 302 VOID
 303 EFIAPI
 304 PciHostBridgeFreeRootBridges (
 305   PCI_ROOT_BRIDGE *Bridges,
 306   UINTN           Count
 307   )
 308 {
 309   if (Bridges == NULL && Count == 0) {
 310     return;
 311   }
 312   ASSERT (Bridges != NULL && Count > 0);
 313
 314   do {
 315     --Count;
 316     UninitRootBridge (&Bridges[Count]);
 317   } while (Count > 0);
 318
 319   FreePool (Bridges);
 320 }
 321
 322
 323 /**
 324   Inform the platform that the resource conflict happens.
 325
 326   @param HostBridgeHandle Handle of the Host Bridge.
 327   @param Configuration    Pointer to PCI I/O and PCI memory resource
 328                           descriptors. The Configuration contains the resources
 329                           for all the root bridges. The resource for each root
 330                           bridge is terminated with END descriptor and an
 331                           additional END is appended indicating the end of the
 332                           entire resources. The resource descriptor field
 333                           values follow the description in
 334                           EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 335                           .SubmitResources().
 336 **/
 337 VOID
 338 EFIAPI
 339 PciHostBridgeResourceConflict (
 340   EFI_HANDLE                        HostBridgeHandle,
 341   VOID                              *Configuration
 342   )
 343 {
 344   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
 345   UINTN                             RootBridgeIndex;
 346   DEBUG ((EFI_D_ERROR, "PciHostBridge: Resource conflict happens!\n"));
 347
 348   RootBridgeIndex = 0;
 349   Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
 350   while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
 351     DEBUG ((EFI_D_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));
 352     for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
 353       ASSERT (Descriptor->ResType <
 354               (sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) /
 355                sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr[0])
 356                )
 357               );
 358       DEBUG ((EFI_D_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",
 359               mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],
 360               Descriptor->AddrLen, Descriptor->AddrRangeMax
 361               ));
 362       if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
 363         DEBUG ((EFI_D_ERROR, "     Granularity/SpecificFlag = %ld / %02x%s\n",
 364                 Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
 365                 ((Descriptor->SpecificFlag &
 366                   EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE
 367                   ) != 0) ? L" (Prefetchable)" : L""
 368                 ));
 369       }
 370     }
 371     //
 372     // Skip the END descriptor for root bridge
 373     //
 374     ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);
 375     Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(
 376                    (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1
 377                    );
 378   }
 379 }