OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c

   1 /** @file
   2   OVMF's instance of the PCI Host Bridge Library.
   3
   4   Copyright (C) 2016, Red Hat, Inc.
   5   Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
   6
   7   This program and the accompanying materials are licensed and made available
   8   under the terms and conditions of the BSD License which accompanies this
   9   distribution.  The full text of the license may be found at
  10   http://opensource.org/licenses/bsd-license.php.
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
  13   WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15 **/
  16 #include <PiDxe.h>
  17
  18 #include <IndustryStandard/Pci.h>
  19
  20 #include <Protocol/PciHostBridgeResourceAllocation.h>
  21 #include <Protocol/PciRootBridgeIo.h>
  22
  23 #include <Library/BaseMemoryLib.h>
  24 #include <Library/DebugLib.h>
  25 #include <Library/MemoryAllocationLib.h>
  26 #include <Library/PciHostBridgeLib.h>
  27 #include <Library/PciLib.h>
  28 #include <Library/QemuFwCfgLib.h>
  29
  30
  31 GLOBAL_REMOVE_IF_UNREFERENCED
  32 CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
  33   L"Mem", L"I/O", L"Bus"
  34 };
  35
  36
  37 /**
  38   Initialize a PCI_ROOT_BRIDGE structure.
  39
  40   param[in]  RootBusNumber     The bus number to store in RootBus.
  41
  42   param[in]  MaxSubBusNumber   The inclusive maximum bus number that can be
  43                                assigned to any subordinate bus found behind any
  44                                PCI bridge hanging off this root bus.
  45
  46                                The caller is repsonsible for ensuring that
  47                                RootBusNumber <= MaxSubBusNumber. If
  48                                RootBusNumber equals MaxSubBusNumber, then the
  49                                root bus has no room for subordinate buses.
  50
  51   param[out] RootBus           The PCI_ROOT_BRIDGE structure (allocated by the
  52                                caller) that should be filled in by this
  53                                function.
  54
  55   @retval EFI_SUCCESS           Initialization successful. A device path
  56                                 consisting of an ACPI device path node, with
  57                                 UID = RootBusNumber, has been allocated and
  58                                 linked into RootBus.
  59
  60   @retval EFI_OUT_OF_RESOURCES  Memory allocation failed.
  61 **/
  62 STATIC
  63 EFI_STATUS
  64 InitRootBridge (
  65   IN  UINT8           RootBusNumber,
  66   IN  UINT8           MaxSubBusNumber,
  67   OUT PCI_ROOT_BRIDGE *RootBus
  68   )
  69 {
  70   //
  71   // Be safe if other fields are added to PCI_ROOT_BRIDGE later.
  72   //
  73   ZeroMem (RootBus, sizeof *RootBus);
  74
  75   RootBus->Segment = 0;
  76
  77   RootBus->Supports   = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |
  78                         EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
  79                         EFI_PCI_ATTRIBUTE_ISA_IO_16 |
  80                         EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
  81                         EFI_PCI_ATTRIBUTE_VGA_MEMORY |
  82                         EFI_PCI_ATTRIBUTE_VGA_IO_16  |
  83                         EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
  84   RootBus->Attributes = RootBus->Supports;
  85
  86   RootBus->DmaAbove4G = FALSE;
  87
  88   RootBus->AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
  89   RootBus->PMem.Base            = 0;
  90   RootBus->PMem.Limit           = 0;
  91   RootBus->PMemAbove4G.Base     = 0;
  92   RootBus->PMemAbove4G.Limit    = 0;
  93   RootBus->MemAbove4G.Base      = 0;
  94   RootBus->MemAbove4G.Limit     = 0;
  95
  96   RootBus->Bus.Base  = RootBusNumber;
  97   RootBus->Bus.Limit = MaxSubBusNumber;
  98   RootBus->Io.Base   = PcdGet64 (PcdPciIoBase);
  99   RootBus->Io.Limit  = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);
 100   RootBus->Mem.Base  = PcdGet64 (PcdPciMmio32Base);
 101   RootBus->Mem.Limit = PcdGet64 (PcdPciMmio32Base) +
 102                        (PcdGet64 (PcdPciMmio32Size) - 1);
 103
 104   RootBus->NoExtendedConfigSpace = TRUE;
 105
 106   return EFI_OUT_OF_RESOURCES;
 107 }
 108
 109
 110 /**
 111   Uninitialize a PCI_ROOT_BRIDGE structure set up with InitRootBridge().
 112
 113   param[in] RootBus  The PCI_ROOT_BRIDGE structure, allocated by the caller and
 114                      initialized with InitRootBridge(), that should be
 115                      uninitialized. This function doesn't free RootBus.
 116 **/
 117 STATIC
 118 VOID
 119 UninitRootBridge (
 120   IN PCI_ROOT_BRIDGE *RootBus
 121   )
 122 {
 123 }
 124
 125
 126 /**
 127   Return all the root bridge instances in an array.
 128
 129   @param Count  Return the count of root bridge instances.
 130
 131   @return All the root bridge instances in an array.
 132           The array should be passed into PciHostBridgeFreeRootBridges()
 133           when it's not used.
 134 **/
 135 PCI_ROOT_BRIDGE *
 136 EFIAPI
 137 PciHostBridgeGetRootBridges (
 138   UINTN *Count
 139   )
 140 {
 141   EFI_STATUS           Status;
 142   FIRMWARE_CONFIG_ITEM FwCfgItem;
 143   UINTN                FwCfgSize;
 144   UINT64               ExtraRootBridges;
 145   PCI_ROOT_BRIDGE      *Bridges;
 146   UINTN                Initialized;
 147   UINTN                LastRootBridgeNumber;
 148   UINTN                RootBridgeNumber;
 149
 150   *Count = 0;
 151
 152   //
 153   // QEMU provides the number of extra root buses, shortening the exhaustive
 154   // search below. If there is no hint, the feature is missing.
 155   //
 156   Status = QemuFwCfgFindFile ("etc/extra-pci-roots", &FwCfgItem, &FwCfgSize);
 157   if (EFI_ERROR (Status) || FwCfgSize != sizeof ExtraRootBridges) {
 158     ExtraRootBridges = 0;
 159   } else {
 160     QemuFwCfgSelectItem (FwCfgItem);
 161     QemuFwCfgReadBytes (FwCfgSize, &ExtraRootBridges);
 162
 163     if (ExtraRootBridges > PCI_MAX_BUS) {
 164       DEBUG ((EFI_D_ERROR, "%a: invalid count of extra root buses (%Lu) "
 165         "reported by QEMU\n", __FUNCTION__, ExtraRootBridges));
 166       return NULL;
 167     }
 168     DEBUG ((EFI_D_INFO, "%a: %Lu extra root buses reported by QEMU\n",
 169       __FUNCTION__, ExtraRootBridges));
 170   }
 171
 172   //
 173   // Allocate the "main" root bridge, and any extra root bridges.
 174   //
 175   Bridges = AllocatePool ((1 + (UINTN)ExtraRootBridges) * sizeof *Bridges);
 176   if (Bridges == NULL) {
 177     DEBUG ((EFI_D_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));
 178     return NULL;
 179   }
 180   Initialized = 0;
 181
 182   //
 183   // The "main" root bus is always there.
 184   //
 185   LastRootBridgeNumber = 0;
 186
 187   //
 188   // Scan all other root buses. If function 0 of any device on a bus returns a
 189   // VendorId register value different from all-bits-one, then that bus is
 190   // alive.
 191   //
 192   for (RootBridgeNumber = 1;
 193        RootBridgeNumber <= PCI_MAX_BUS && Initialized < ExtraRootBridges;
 194        ++RootBridgeNumber) {
 195     UINTN Device;
 196
 197     for (Device = 0; Device <= PCI_MAX_DEVICE; ++Device) {
 198       if (PciRead16 (PCI_LIB_ADDRESS (RootBridgeNumber, Device, 0,
 199                        PCI_VENDOR_ID_OFFSET)) != MAX_UINT16) {
 200         break;
 201       }
 202     }
 203     if (Device <= PCI_MAX_DEVICE) {
 204       //
 205       // Found the next root bus. We can now install the *previous* one,
 206       // because now we know how big a bus number range *that* one has, for any
 207       // subordinate buses that might exist behind PCI bridges hanging off it.
 208       //
 209       Status = InitRootBridge ((UINT8)LastRootBridgeNumber,
 210                  (UINT8)(RootBridgeNumber - 1), &Bridges[Initialized]);
 211       if (EFI_ERROR (Status)) {
 212         goto FreeBridges;
 213       }
 214       ++Initialized;
 215       LastRootBridgeNumber = RootBridgeNumber;
 216     }
 217   }
 218
 219   //
 220   // Install the last root bus (which might be the only, ie. main, root bus, if
 221   // we've found no extra root buses).
 222   //
 223   Status = InitRootBridge ((UINT8)LastRootBridgeNumber, PCI_MAX_BUS,
 224              &Bridges[Initialized]);
 225   if (EFI_ERROR (Status)) {
 226     goto FreeBridges;
 227   }
 228   ++Initialized;
 229
 230   *Count = Initialized;
 231   return Bridges;
 232
 233 FreeBridges:
 234   while (Initialized > 0) {
 235     --Initialized;
 236     UninitRootBridge (&Bridges[Initialized]);
 237   }
 238
 239   FreePool (Bridges);
 240   return NULL;
 241 }
 242
 243
 244 /**
 245   Free the root bridge instances array returned from
 246   PciHostBridgeGetRootBridges().
 247
 248   @param  The root bridge instances array.
 249   @param  The count of the array.
 250 **/
 251 VOID
 252 EFIAPI
 253 PciHostBridgeFreeRootBridges (
 254   PCI_ROOT_BRIDGE *Bridges,
 255   UINTN           Count
 256   )
 257 {
 258   if (Bridges == NULL && Count == 0) {
 259     return;
 260   }
 261   ASSERT (Bridges != NULL && Count > 0);
 262
 263   do {
 264     --Count;
 265     UninitRootBridge (&Bridges[Count]);
 266   } while (Count > 0);
 267
 268   FreePool (Bridges);
 269 }
 270
 271
 272 /**
 273   Inform the platform that the resource conflict happens.
 274
 275   @param HostBridgeHandle Handle of the Host Bridge.
 276   @param Configuration    Pointer to PCI I/O and PCI memory resource
 277                           descriptors. The Configuration contains the resources
 278                           for all the root bridges. The resource for each root
 279                           bridge is terminated with END descriptor and an
 280                           additional END is appended indicating the end of the
 281                           entire resources. The resource descriptor field
 282                           values follow the description in
 283                           EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 284                           .SubmitResources().
 285 **/
 286 VOID
 287 EFIAPI
 288 PciHostBridgeResourceConflict (
 289   EFI_HANDLE                        HostBridgeHandle,
 290   VOID                              *Configuration
 291   )
 292 {
 293   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
 294   UINTN                             RootBridgeIndex;
 295   DEBUG ((EFI_D_ERROR, "PciHostBridge: Resource conflict happens!\n"));
 296
 297   RootBridgeIndex = 0;
 298   Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
 299   while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
 300     DEBUG ((EFI_D_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));
 301     for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
 302       ASSERT (Descriptor->ResType <
 303               (sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) /
 304                sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr[0])
 305                )
 306               );
 307       DEBUG ((EFI_D_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",
 308               mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],
 309               Descriptor->AddrLen, Descriptor->AddrRangeMax
 310               ));
 311       if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
 312         DEBUG ((EFI_D_ERROR, "     Granularity/SpecificFlag = %ld / %02x%s\n",
 313                 Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
 314                 ((Descriptor->SpecificFlag &
 315                   EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE
 316                   ) != 0) ? L" (Prefetchable)" : L""
 317                 ));
 318       }
 319     }
 320     //
 321     // Skip the END descriptor for root bridge
 322     //
 323     ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);
 324     Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(
 325                    (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1
 326                    );
 327   }
 328 }