OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c

   1 /** @file
   2 The CPU specific programming for PiSmmCpuDxeSmm module.
   3
   4 Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
   5 This program and the accompanying materials
   6 are licensed and made available under the terms and conditions of the BSD License
   7 which accompanies this distribution.  The full text of the license may be found at
   8 http://opensource.org/licenses/bsd-license.php
   9
  10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #include <PiSmm.h>
  16 #include <Library/SmmCpuFeaturesLib.h>
  17 #include <Library/BaseLib.h>
  18 #include <Library/PcdLib.h>
  19 #include <Library/MemoryAllocationLib.h>
  20 #include <Library/DebugLib.h>
  21 #include <Register/SmramSaveStateMap.h>
  22
  23 /**
  24   The constructor function
  25
  26   @param[in]  ImageHandle  The firmware allocated handle for the EFI image.
  27   @param[in]  SystemTable  A pointer to the EFI System Table.
  28
  29   @retval EFI_SUCCESS      The constructor always returns EFI_SUCCESS.
  30
  31 **/
  32 EFI_STATUS
  33 EFIAPI
  34 SmmCpuFeaturesLibConstructor (
  35   IN EFI_HANDLE        ImageHandle,
  36   IN EFI_SYSTEM_TABLE  *SystemTable
  37   )
  38 {
  39   //
  40   // No need to program SMRRs on our virtual platform.
  41   //
  42   return EFI_SUCCESS;
  43 }
  44
  45 /**
  46   Called during the very first SMI into System Management Mode to initialize
  47   CPU features, including SMBASE, for the currently executing CPU.  Since this
  48   is the first SMI, the SMRAM Save State Map is at the default address of
  49   SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET.  The currently executing
  50   CPU is specified by CpuIndex and CpuIndex can be used to access information
  51   about the currently executing CPU in the ProcessorInfo array and the
  52   HotPlugCpuData data structure.
  53
  54   @param[in] CpuIndex        The index of the CPU to initialize.  The value
  55                              must be between 0 and the NumberOfCpus field in
  56                              the System Management System Table (SMST).
  57   @param[in] IsMonarch       TRUE if the CpuIndex is the index of the CPU that
  58                              was elected as monarch during System Management
  59                              Mode initialization.
  60                              FALSE if the CpuIndex is not the index of the CPU
  61                              that was elected as monarch during System
  62                              Management Mode initialization.
  63   @param[in] ProcessorInfo   Pointer to an array of EFI_PROCESSOR_INFORMATION
  64                              structures.  ProcessorInfo[CpuIndex] contains the
  65                              information for the currently executing CPU.
  66   @param[in] CpuHotPlugData  Pointer to the CPU_HOT_PLUG_DATA structure that
  67                              contains the ApidId and SmBase arrays.
  68 **/
  69 VOID
  70 EFIAPI
  71 SmmCpuFeaturesInitializeProcessor (
  72   IN UINTN                      CpuIndex,
  73   IN BOOLEAN                    IsMonarch,
  74   IN EFI_PROCESSOR_INFORMATION  *ProcessorInfo,
  75   IN CPU_HOT_PLUG_DATA          *CpuHotPlugData
  76   )
  77 {
  78   SMRAM_SAVE_STATE_MAP  *CpuState;
  79
  80   //
  81   // Configure SMBASE.
  82   //
  83   CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
  84   CpuState->x86.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];
  85
  86   //
  87   // No need to program SMRRs on our virtual platform.
  88   //
  89 }
  90
  91 /**
  92   This function updates the SMRAM save state on the currently executing CPU
  93   to resume execution at a specific address after an RSM instruction.  This
  94   function must evaluate the SMRAM save state to determine the execution mode
  95   the RSM instruction resumes and update the resume execution address with
  96   either NewInstructionPointer32 or NewInstructionPoint.  The auto HALT restart
  97   flag in the SMRAM save state must always be cleared.  This function returns
  98   the value of the instruction pointer from the SMRAM save state that was
  99   replaced.  If this function returns 0, then the SMRAM save state was not
 100   modified.
 101
 102   This function is called during the very first SMI on each CPU after
 103   SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mode
 104   to signal that the SMBASE of each CPU has been updated before the default
 105   SMBASE address is used for the first SMI to the next CPU.
 106
 107   @param[in] CpuIndex                 The index of the CPU to hook.  The value
 108                                       must be between 0 and the NumberOfCpus
 109                                       field in the System Management System Table
 110                                       (SMST).
 111   @param[in] CpuState                 Pointer to SMRAM Save State Map for the
 112                                       currently executing CPU.
 113   @param[in] NewInstructionPointer32  Instruction pointer to use if resuming to
 114                                       32-bit execution mode from 64-bit SMM.
 115   @param[in] NewInstructionPointer    Instruction pointer to use if resuming to
 116                                       same execution mode as SMM.
 117
 118   @retval 0    This function did modify the SMRAM save state.
 119   @retval > 0  The original instruction pointer value from the SMRAM save state
 120                before it was replaced.
 121 **/
 122 UINT64
 123 EFIAPI
 124 SmmCpuFeaturesHookReturnFromSmm (
 125   IN UINTN                 CpuIndex,
 126   IN SMRAM_SAVE_STATE_MAP  *CpuState,
 127   IN UINT64                NewInstructionPointer32,
 128   IN UINT64                NewInstructionPointer
 129   )
 130 {
 131   return 0;
 132 }
 133
 134 /**
 135   Hook point in normal execution mode that allows the one CPU that was elected
 136   as monarch during System Management Mode initialization to perform additional
 137   initialization actions immediately after all of the CPUs have processed their
 138   first SMI and called SmmCpuFeaturesInitializeProcessor() relocating SMBASE
 139   into a buffer in SMRAM and called SmmCpuFeaturesHookReturnFromSmm().
 140 **/
 141 VOID
 142 EFIAPI
 143 SmmCpuFeaturesSmmRelocationComplete (
 144   VOID
 145   )
 146 {
 147 }
 148
 149 /**
 150   Return the size, in bytes, of a custom SMI Handler in bytes.  If 0 is
 151   returned, then a custom SMI handler is not provided by this library,
 152   and the default SMI handler must be used.
 153
 154   @retval 0    Use the default SMI handler.
 155   @retval > 0  Use the SMI handler installed by SmmCpuFeaturesInstallSmiHandler()
 156                The caller is required to allocate enough SMRAM for each CPU to
 157                support the size of the custom SMI handler.
 158 **/
 159 UINTN
 160 EFIAPI
 161 SmmCpuFeaturesGetSmiHandlerSize (
 162   VOID
 163   )
 164 {
 165   return 0;
 166 }
 167
 168 /**
 169   Install a custom SMI handler for the CPU specified by CpuIndex.  This function
 170   is only called if SmmCpuFeaturesGetSmiHandlerSize() returns a size is greater
 171   than zero and is called by the CPU that was elected as monarch during System
 172   Management Mode initialization.
 173
 174   @param[in] CpuIndex   The index of the CPU to install the custom SMI handler.
 175                         The value must be between 0 and the NumberOfCpus field
 176                         in the System Management System Table (SMST).
 177   @param[in] SmBase     The SMBASE address for the CPU specified by CpuIndex.
 178   @param[in] SmiStack   The stack to use when an SMI is processed by the
 179                         the CPU specified by CpuIndex.
 180   @param[in] StackSize  The size, in bytes, if the stack used when an SMI is
 181                         processed by the CPU specified by CpuIndex.
 182   @param[in] GdtBase    The base address of the GDT to use when an SMI is
 183                         processed by the CPU specified by CpuIndex.
 184   @param[in] GdtSize    The size, in bytes, of the GDT used when an SMI is
 185                         processed by the CPU specified by CpuIndex.
 186   @param[in] IdtBase    The base address of the IDT to use when an SMI is
 187                         processed by the CPU specified by CpuIndex.
 188   @param[in] IdtSize    The size, in bytes, of the IDT used when an SMI is
 189                         processed by the CPU specified by CpuIndex.
 190   @param[in] Cr3        The base address of the page tables to use when an SMI
 191                         is processed by the CPU specified by CpuIndex.
 192 **/
 193 VOID
 194 EFIAPI
 195 SmmCpuFeaturesInstallSmiHandler (
 196   IN UINTN   CpuIndex,
 197   IN UINT32  SmBase,
 198   IN VOID    *SmiStack,
 199   IN UINTN   StackSize,
 200   IN UINTN   GdtBase,
 201   IN UINTN   GdtSize,
 202   IN UINTN   IdtBase,
 203   IN UINTN   IdtSize,
 204   IN UINT32  Cr3
 205   )
 206 {
 207 }
 208
 209 /**
 210   Determines if MTRR registers must be configured to set SMRAM cache-ability
 211   when executing in System Management Mode.
 212
 213   @retval TRUE   MTRR registers must be configured to set SMRAM cache-ability.
 214   @retval FALSE  MTRR registers do not need to be configured to set SMRAM
 215                  cache-ability.
 216 **/
 217 BOOLEAN
 218 EFIAPI
 219 SmmCpuFeaturesNeedConfigureMtrrs (
 220   VOID
 221   )
 222 {
 223   return FALSE;
 224 }
 225
 226 /**
 227   Disable SMRR register if SMRR is supported and SmmCpuFeaturesNeedConfigureMtrrs()
 228   returns TRUE.
 229 **/
 230 VOID
 231 EFIAPI
 232 SmmCpuFeaturesDisableSmrr (
 233   VOID
 234   )
 235 {
 236   //
 237   // No SMRR support, nothing to do
 238   //
 239 }
 240
 241 /**
 242   Enable SMRR register if SMRR is supported and SmmCpuFeaturesNeedConfigureMtrrs()
 243   returns TRUE.
 244 **/
 245 VOID
 246 EFIAPI
 247 SmmCpuFeaturesReenableSmrr (
 248   VOID
 249   )
 250 {
 251   //
 252   // No SMRR support, nothing to do
 253   //
 254 }
 255
 256 /**
 257   Processor specific hook point each time a CPU enters System Management Mode.
 258
 259   @param[in] CpuIndex  The index of the CPU that has entered SMM.  The value
 260                        must be between 0 and the NumberOfCpus field in the
 261                        System Management System Table (SMST).
 262 **/
 263 VOID
 264 EFIAPI
 265 SmmCpuFeaturesRendezvousEntry (
 266   IN UINTN  CpuIndex
 267   )
 268 {
 269   //
 270   // No SMRR support, nothing to do
 271   //
 272 }
 273
 274 /**
 275   Processor specific hook point each time a CPU exits System Management Mode.
 276
 277   @param[in] CpuIndex  The index of the CPU that is exiting SMM.  The value must
 278                        be between 0 and the NumberOfCpus field in the System
 279                        Management System Table (SMST).
 280 **/
 281 VOID
 282 EFIAPI
 283 SmmCpuFeaturesRendezvousExit (
 284   IN UINTN  CpuIndex
 285   )
 286 {
 287 }
 288
 289 /**
 290   Check to see if an SMM register is supported by a specified CPU.
 291
 292   @param[in] CpuIndex  The index of the CPU to check for SMM register support.
 293                        The value must be between 0 and the NumberOfCpus field
 294                        in the System Management System Table (SMST).
 295   @param[in] RegName   Identifies the SMM register to check for support.
 296
 297   @retval TRUE   The SMM register specified by RegName is supported by the CPU
 298                  specified by CpuIndex.
 299   @retval FALSE  The SMM register specified by RegName is not supported by the
 300                  CPU specified by CpuIndex.
 301 **/
 302 BOOLEAN
 303 EFIAPI
 304 SmmCpuFeaturesIsSmmRegisterSupported (
 305   IN UINTN         CpuIndex,
 306   IN SMM_REG_NAME  RegName
 307   )
 308 {
 309   ASSERT (RegName == SmmRegFeatureControl);
 310   return FALSE;
 311 }
 312
 313 /**
 314   Returns the current value of the SMM register for the specified CPU.
 315   If the SMM register is not supported, then 0 is returned.
 316
 317   @param[in] CpuIndex  The index of the CPU to read the SMM register.  The
 318                        value must be between 0 and the NumberOfCpus field in
 319                        the System Management System Table (SMST).
 320   @param[in] RegName   Identifies the SMM register to read.
 321
 322   @return  The value of the SMM register specified by RegName from the CPU
 323            specified by CpuIndex.
 324 **/
 325 UINT64
 326 EFIAPI
 327 SmmCpuFeaturesGetSmmRegister (
 328   IN UINTN         CpuIndex,
 329   IN SMM_REG_NAME  RegName
 330   )
 331 {
 332   //
 333   // This is called for SmmRegSmmDelayed, SmmRegSmmBlocked, SmmRegSmmEnable.
 334   // The last of these should actually be SmmRegSmmDisable, so we can just
 335   // return FALSE.
 336   //
 337   return 0;
 338 }
 339
 340 /**
 341   Sets the value of an SMM register on a specified CPU.
 342   If the SMM register is not supported, then no action is performed.
 343
 344   @param[in] CpuIndex  The index of the CPU to write the SMM register.  The
 345                        value must be between 0 and the NumberOfCpus field in
 346                        the System Management System Table (SMST).
 347   @param[in] RegName   Identifies the SMM register to write.
 348                        registers are read-only.
 349   @param[in] Value     The value to write to the SMM register.
 350 **/
 351 VOID
 352 EFIAPI
 353 SmmCpuFeaturesSetSmmRegister (
 354   IN UINTN         CpuIndex,
 355   IN SMM_REG_NAME  RegName,
 356   IN UINT64        Value
 357   )
 358 {
 359   ASSERT (FALSE);
 360 }
 361
 362 /**
 363   Read an SMM Save State register on the target processor.  If this function
 364   returns EFI_UNSUPPORTED, then the caller is responsible for reading the
 365   SMM Save Sate register.
 366
 367   @param[in]  CpuIndex  The index of the CPU to read the SMM Save State.  The
 368                         value must be between 0 and the NumberOfCpus field in
 369                         the System Management System Table (SMST).
 370   @param[in]  Register  The SMM Save State register to read.
 371   @param[in]  Width     The number of bytes to read from the CPU save state.
 372   @param[out] Buffer    Upon return, this holds the CPU register value read
 373                         from the save state.
 374
 375   @retval EFI_SUCCESS           The register was read from Save State.
 376   @retval EFI_INVALID_PARAMTER  Buffer is NULL.
 377   @retval EFI_UNSUPPORTED       This function does not support reading Register.
 378
 379 **/
 380 EFI_STATUS
 381 EFIAPI
 382 SmmCpuFeaturesReadSaveStateRegister (
 383   IN  UINTN                        CpuIndex,
 384   IN  EFI_SMM_SAVE_STATE_REGISTER  Register,
 385   IN  UINTN                        Width,
 386   OUT VOID                         *Buffer
 387   )
 388 {
 389   return EFI_UNSUPPORTED;
 390 }
 391
 392 /**
 393   Writes an SMM Save State register on the target processor.  If this function
 394   returns EFI_UNSUPPORTED, then the caller is responsible for writing the
 395   SMM Save Sate register.
 396
 397   @param[in] CpuIndex  The index of the CPU to write the SMM Save State.  The
 398                        value must be between 0 and the NumberOfCpus field in
 399                        the System Management System Table (SMST).
 400   @param[in] Register  The SMM Save State register to write.
 401   @param[in] Width     The number of bytes to write to the CPU save state.
 402   @param[in] Buffer    Upon entry, this holds the new CPU register value.
 403
 404   @retval EFI_SUCCESS           The register was written to Save State.
 405   @retval EFI_INVALID_PARAMTER  Buffer is NULL.
 406   @retval EFI_UNSUPPORTED       This function does not support writing Register.
 407 **/
 408 EFI_STATUS
 409 EFIAPI
 410 SmmCpuFeaturesWriteSaveStateRegister (
 411   IN UINTN                        CpuIndex,
 412   IN EFI_SMM_SAVE_STATE_REGISTER  Register,
 413   IN UINTN                        Width,
 414   IN CONST VOID                   *Buffer
 415   )
 416 {
 417   return EFI_UNSUPPORTED;
 418 }
 419
 420 /**
 421   This function is hook point called after the gEfiSmmReadyToLockProtocolGuid
 422   notification is completely processed.
 423 **/
 424 VOID
 425 EFIAPI
 426 SmmCpuFeaturesCompleteSmmReadyToLock (
 427   VOID
 428   )
 429 {
 430 }
 431
 432 /**
 433   This API provides a method for a CPU to allocate a specific region for storing page tables.
 434
 435   This API can be called more once to allocate memory for page tables.
 436
 437   Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
 438   allocated buffer.  The buffer returned is aligned on a 4KB boundary.  If Pages is 0, then NULL
 439   is returned.  If there is not enough memory remaining to satisfy the request, then NULL is
 440   returned.
 441
 442   This function can also return NULL if there is no preference on where the page tables are allocated in SMRAM.
 443
 444   @param  Pages                 The number of 4 KB pages to allocate.
 445
 446   @return A pointer to the allocated buffer for page tables.
 447   @retval NULL      Fail to allocate a specific region for storing page tables,
 448                     Or there is no preference on where the page tables are allocated in SMRAM.
 449
 450 **/
 451 VOID *
 452 EFIAPI
 453 SmmCpuFeaturesAllocatePageTableMemory (
 454   IN UINTN           Pages
 455   )
 456 {
 457   return NULL;
 458 }
 459