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1 ## @file
2 # EFI/Framework Open Virtual Machine Firmware (OVMF) platform
3 #
4 # Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
5 #
6 # SPDX-License-Identifier: BSD-2-Clause-Patent
7 #
8 ##
9
10 [Defines]
11 DEC_SPECIFICATION = 0x00010005
12 PACKAGE_NAME = OvmfPkg
13 PACKAGE_GUID = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5
14 PACKAGE_VERSION = 0.1
15
16 [Includes]
17 Include
18
19 [LibraryClasses]
20 ## @libraryclass Loads and boots a Linux kernel image
21 #
22 LoadLinuxLib|Include/Library/LoadLinuxLib.h
23
24 ## @libraryclass Save and restore variables using a file
25 #
26 NvVarsFileLib|Include/Library/NvVarsFileLib.h
27
28 ## @libraryclass Provides services to work with PCI capabilities in PCI
29 # config space.
30 PciCapLib|Include/Library/PciCapLib.h
31
32 ## @libraryclass Layered on top of PciCapLib, allows clients to plug an
33 # EFI_PCI_IO_PROTOCOL backend into PciCapLib, for config
34 # space access.
35 PciCapPciIoLib|Include/Library/PciCapPciIoLib.h
36
37 ## @libraryclass Layered on top of PciCapLib, allows clients to plug a
38 # PciSegmentLib backend into PciCapLib, for config space
39 # access.
40 PciCapPciSegmentLib|Include/Library/PciCapPciSegmentLib.h
41
42 ## @libraryclass Register a status code handler for printing the Boot
43 # Manager's LoadImage() and StartImage() preparations, and
44 # return codes, to the UEFI console.
45 PlatformBmPrintScLib|Include/Library/PlatformBmPrintScLib.h
46
47 ## @libraryclass Access QEMU's firmware configuration interface
48 #
49 QemuFwCfgLib|Include/Library/QemuFwCfgLib.h
50
51 ## @libraryclass S3 support for QEMU fw_cfg
52 #
53 QemuFwCfgS3Lib|Include/Library/QemuFwCfgS3Lib.h
54
55 ## @libraryclass Rewrite the BootOrder NvVar based on QEMU's "bootorder"
56 # fw_cfg file.
57 #
58 QemuBootOrderLib|Include/Library/QemuBootOrderLib.h
59
60 ## @libraryclass Serialize (and deserialize) variables
61 #
62 SerializeVariablesLib|Include/Library/SerializeVariablesLib.h
63
64 ## @libraryclass Invoke Xen hypercalls
65 #
66 XenHypercallLib|Include/Library/XenHypercallLib.h
67
68 ## @libraryclass Manage XenBus device path and I/O handles
69 #
70 XenIoMmioLib|Include/Library/XenIoMmioLib.h
71
72 [Guids]
73 gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}
74 gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}
75 gOvmfPkKek1AppPrefixGuid = {0x4e32566d, 0x8e9e, 0x4f52, {0x81, 0xd3, 0x5b, 0xb9, 0x71, 0x5f, 0x97, 0x27}}
76 gOvmfPlatformConfigGuid = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}
77 gVirtioMmioTransportGuid = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}
78 gQemuRamfbGuid = {0x557423a1, 0x63ab, 0x406c, {0xbe, 0x7e, 0x91, 0xcd, 0xbc, 0x08, 0xc4, 0x57}}
79 gXenBusRootDeviceGuid = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}
80 gRootBridgesConnectedEventGroupGuid = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}
81 gMicrosoftVendorGuid = {0x77fa9abd, 0x0359, 0x4d32, {0xbd, 0x60, 0x28, 0xf4, 0xe7, 0x8f, 0x78, 0x4b}}
82
83 [Protocols]
84 gVirtioDeviceProtocolGuid = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}
85 gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}
86 gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}
87 gIoMmuAbsentProtocolGuid = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}
88 gEfiLegacy8259ProtocolGuid = {0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1}}
89
90 [PcdsFixedAtBuild]
91 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0
92 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1
93 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15
94 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16
95
96 ## This flag is used to control the destination port for PlatformDebugLibIoPort
97 gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4
98
99 ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
100 # LUNs are retrieved from the host during virtio-scsi setup.
101 # MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
102 # possible devices. This can take extremely long, for example with
103 # MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit
104 # MaxTarget and MaxLun, independently, should the host report higher values,
105 # so that scanning the number of devices given by their product is still
106 # acceptably fast.
107 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6
108 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
109
110 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
111 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
112 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
113 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb
114 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc
115 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
116 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
117 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf
118 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11
119 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12
120 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13
121 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14
122 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18
123 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19
124 gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
125 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
126
127 ## Pcd8259LegacyModeMask defines the default mask value for platform. This
128 # value is determined.
129 # 1) If platform only support pure UEFI, value should be set to 0xFFFF or
130 # 0xFFFE; Because only clock interrupt is allowed in legacy mode in pure
131 # UEFI platform.
132 # 2) If platform install CSM and use thunk module:
133 # a) If thunk call provided by CSM binary requires some legacy interrupt
134 # support, the corresponding bit should be opened as 0.
135 # For example, if keyboard interfaces provided CSM binary use legacy
136 # keyboard interrupt in 8259 bit 1, then the value should be set to
137 # 0xFFFC.
138 # b) If all thunk call provied by CSM binary do not require legacy
139 # interrupt support, value should be set to 0xFFFF or 0xFFFE.
140 #
141 # The default value of legacy mode mask could be changed by
142 # EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it
143 # except some special cases such as when initializing the CSM binary, it
144 # should be set to 0xFFFF to mask all legacy interrupt. Please restore the
145 # original legacy mask value if changing is made for these special case.
146 gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x3
147
148 ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy
149 # mode's interrrupt controller.
150 # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
151 gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x5
152
153 [PcdsDynamic, PcdsDynamicEx]
154 gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
155 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
156 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b
157 gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21
158
159 ## The IO port aperture shared by all PCI root bridges.
160 #
161 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22
162 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23
163
164 ## The 32-bit MMIO aperture shared by all PCI root bridges.
165 #
166 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24
167 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25
168
169 ## The 64-bit MMIO aperture shared by all PCI root bridges.
170 #
171 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
172 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
173
174 ## The following setting controls how many megabytes we configure as TSEG on
175 # Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults
176 # cause undefined behavior. During boot, the PCD is updated by PlatformPei
177 # to reflect the extended TSEG size, if one is advertized by QEMU.
178 #
179 # This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
180 gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
181
182 [PcdsFeatureFlag]
183 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
184 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
185
186 ## This feature flag enables SMM/SMRAM support. Note that it also requires
187 # such support from the underlying QEMU instance; if that support is not
188 # present, the firmware will reject continuing after a certain point.
189 #
190 # The flag also acts as a general "security switch"; when TRUE, many
191 # components will change behavior, with the goal of preventing a malicious
192 # runtime OS from tampering with firmware structures (special memory ranges
193 # used by OVMF, the varstore pflash chip, LockBox etc).
194 gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e