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UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmiStack" with PatchInstructionX86()
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1 ## @file
2 # EFI/Framework Open Virtual Machine Firmware (OVMF) platform
3 #
4 # Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
5 #
6 # This program and the accompanying materials
7 # are licensed and made available under the terms and conditions of the BSD License
8 # which accompanies this distribution. The full text of the license may be found at
9 # http://opensource.org/licenses/bsd-license.php
10 #
11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 #
14 ##
15
16 [Defines]
17 DEC_SPECIFICATION = 0x00010005
18 PACKAGE_NAME = OvmfPkg
19 PACKAGE_GUID = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5
20 PACKAGE_VERSION = 0.1
21
22 [Includes]
23 Include
24
25 [LibraryClasses]
26 ## @libraryclass Loads and boots a Linux kernel image
27 #
28 LoadLinuxLib|Include/Library/LoadLinuxLib.h
29
30 ## @libraryclass Save and restore variables using a file
31 #
32 NvVarsFileLib|Include/Library/NvVarsFileLib.h
33
34 ## @libraryclass Access QEMU's firmware configuration interface
35 #
36 QemuFwCfgLib|Include/Library/QemuFwCfgLib.h
37
38 ## @libraryclass S3 support for QEMU fw_cfg
39 #
40 QemuFwCfgS3Lib|Include/Library/QemuFwCfgS3Lib.h
41
42 ## @libraryclass Rewrite the BootOrder NvVar based on QEMU's "bootorder"
43 # fw_cfg file.
44 #
45 QemuBootOrderLib|Include/Library/QemuBootOrderLib.h
46
47 ## @libraryclass Serialize (and deserialize) variables
48 #
49 SerializeVariablesLib|Include/Library/SerializeVariablesLib.h
50
51 ## @libraryclass Invoke Xen hypercalls
52 #
53 XenHypercallLib|Include/Library/XenHypercallLib.h
54
55 ## @libraryclass Manage XenBus device path and I/O handles
56 #
57 XenIoMmioLib|Include/Library/XenIoMmioLib.h
58
59 [Guids]
60 gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}
61 gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}
62 gOvmfPlatformConfigGuid = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}
63 gVirtioMmioTransportGuid = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}
64 gXenBusRootDeviceGuid = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}
65 gRootBridgesConnectedEventGroupGuid = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}
66
67 [Protocols]
68 gVirtioDeviceProtocolGuid = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}
69 gBlockMmioProtocolGuid = {0x6b558ce3, 0x69e5, 0x4c67, {0xa6, 0x34, 0xf7, 0xfe, 0x72, 0xad, 0xbe, 0x84}}
70 gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}
71 gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}
72 gIoMmuAbsentProtocolGuid = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}
73
74 [PcdsFixedAtBuild]
75 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0
76 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1
77 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15
78 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16
79
80 ## This flag is used to control the destination port for PlatformDebugLibIoPort
81 gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4
82
83 ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
84 # LUNs are retrieved from the host during virtio-scsi setup.
85 # MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
86 # possible devices. This can take extremely long, for example with
87 # MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit
88 # MaxTarget and MaxLun, independently, should the host report higher values,
89 # so that scanning the number of devices given by their product is still
90 # acceptably fast.
91 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6
92 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
93
94 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
95 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
96 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
97 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb
98 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc
99 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
100 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
101 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf
102 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11
103 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12
104 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13
105 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14
106 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18
107 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19
108 gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
109 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
110
111 [PcdsDynamic, PcdsDynamicEx]
112 gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
113 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
114 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b
115 gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21
116
117 ## The IO port aperture shared by all PCI root bridges.
118 #
119 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22
120 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23
121
122 ## The 32-bit MMIO aperture shared by all PCI root bridges.
123 #
124 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24
125 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25
126
127 ## The 64-bit MMIO aperture shared by all PCI root bridges.
128 #
129 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
130 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
131
132 ## The following setting controls how many megabytes we configure as TSEG on
133 # Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults
134 # cause undefined behavior. During boot, the PCD is updated by PlatformPei
135 # to reflect the extended TSEG size, if one is advertized by QEMU.
136 #
137 # This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
138 gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
139
140 [PcdsFeatureFlag]
141 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
142 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
143
144 ## This feature flag enables SMM/SMRAM support. Note that it also requires
145 # such support from the underlying QEMU instance; if that support is not
146 # present, the firmware will reject continuing after a certain point.
147 #
148 # The flag also acts as a general "security switch"; when TRUE, many
149 # components will change behavior, with the goal of preventing a malicious
150 # runtime OS from tampering with firmware structures (special memory ranges
151 # used by OVMF, the varstore pflash chip, LockBox etc).
152 gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e