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OvmfPkg/OvmfPkg.dec: Add PCD definitions used by copied CSM modules
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1 ## @file
2 # EFI/Framework Open Virtual Machine Firmware (OVMF) platform
3 #
4 # Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
5 #
6 # SPDX-License-Identifier: BSD-2-Clause-Patent
7 #
8 ##
9
10 [Defines]
11 DEC_SPECIFICATION = 0x00010005
12 PACKAGE_NAME = OvmfPkg
13 PACKAGE_GUID = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5
14 PACKAGE_VERSION = 0.1
15
16 [Includes]
17 Include
18 Csm/Include
19
20 [LibraryClasses]
21 ## @libraryclass Loads and boots a Linux kernel image
22 #
23 LoadLinuxLib|Include/Library/LoadLinuxLib.h
24
25 ## @libraryclass Save and restore variables using a file
26 #
27 NvVarsFileLib|Include/Library/NvVarsFileLib.h
28
29 ## @libraryclass Provides services to work with PCI capabilities in PCI
30 # config space.
31 PciCapLib|Include/Library/PciCapLib.h
32
33 ## @libraryclass Layered on top of PciCapLib, allows clients to plug an
34 # EFI_PCI_IO_PROTOCOL backend into PciCapLib, for config
35 # space access.
36 PciCapPciIoLib|Include/Library/PciCapPciIoLib.h
37
38 ## @libraryclass Layered on top of PciCapLib, allows clients to plug a
39 # PciSegmentLib backend into PciCapLib, for config space
40 # access.
41 PciCapPciSegmentLib|Include/Library/PciCapPciSegmentLib.h
42
43 ## @libraryclass Register a status code handler for printing the Boot
44 # Manager's LoadImage() and StartImage() preparations, and
45 # return codes, to the UEFI console.
46 PlatformBmPrintScLib|Include/Library/PlatformBmPrintScLib.h
47
48 ## @libraryclass Access QEMU's firmware configuration interface
49 #
50 QemuFwCfgLib|Include/Library/QemuFwCfgLib.h
51
52 ## @libraryclass S3 support for QEMU fw_cfg
53 #
54 QemuFwCfgS3Lib|Include/Library/QemuFwCfgS3Lib.h
55
56 ## @libraryclass Rewrite the BootOrder NvVar based on QEMU's "bootorder"
57 # fw_cfg file.
58 #
59 QemuBootOrderLib|Include/Library/QemuBootOrderLib.h
60
61 ## @libraryclass Serialize (and deserialize) variables
62 #
63 SerializeVariablesLib|Include/Library/SerializeVariablesLib.h
64
65 ## @libraryclass Invoke Xen hypercalls
66 #
67 XenHypercallLib|Include/Library/XenHypercallLib.h
68
69 ## @libraryclass Manage XenBus device path and I/O handles
70 #
71 XenIoMmioLib|Include/Library/XenIoMmioLib.h
72
73 [Guids]
74 gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}
75 gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}
76 gOvmfPkKek1AppPrefixGuid = {0x4e32566d, 0x8e9e, 0x4f52, {0x81, 0xd3, 0x5b, 0xb9, 0x71, 0x5f, 0x97, 0x27}}
77 gOvmfPlatformConfigGuid = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}
78 gVirtioMmioTransportGuid = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}
79 gQemuRamfbGuid = {0x557423a1, 0x63ab, 0x406c, {0xbe, 0x7e, 0x91, 0xcd, 0xbc, 0x08, 0xc4, 0x57}}
80 gXenBusRootDeviceGuid = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}
81 gRootBridgesConnectedEventGroupGuid = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}
82 gMicrosoftVendorGuid = {0x77fa9abd, 0x0359, 0x4d32, {0xbd, 0x60, 0x28, 0xf4, 0xe7, 0x8f, 0x78, 0x4b}}
83 gEfiLegacyBiosGuid = {0x2E3044AC, 0x879F, 0x490F, {0x97, 0x60, 0xBB, 0xDF, 0xAF, 0x69, 0x5F, 0x50}}
84 gEfiLegacyDevOrderVariableGuid = {0xa56074db, 0x65fe, 0x45f7, {0xbd, 0x21, 0x2d, 0x2b, 0xdd, 0x8e, 0x96, 0x52}}
85
86 [Protocols]
87 gVirtioDeviceProtocolGuid = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}
88 gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}
89 gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}
90 gIoMmuAbsentProtocolGuid = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}
91 gEfiLegacy8259ProtocolGuid = {0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1}}
92 gEfiFirmwareVolumeProtocolGuid = {0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xcd, 0x81, 0x54, 0xbd, 0x27, 0xf8}}
93 gEfiIsaAcpiProtocolGuid = {0x64a892dc, 0x5561, 0x4536, {0x92, 0xc7, 0x79, 0x9b, 0xfc, 0x18, 0x33, 0x55}}
94 gEfiIsaIoProtocolGuid = {0x7ee2bd44, 0x3da0, 0x11d4, {0x9a, 0x38, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}
95 gEfiLegacyBiosProtocolGuid = {0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d}}
96 gEfiLegacyBiosPlatformProtocolGuid = {0x783658a3, 0x4172, 0x4421, {0xa2, 0x99, 0xe0, 0x09, 0x07, 0x9c, 0x0c, 0xb4}}
97 gEfiLegacyInterruptProtocolGuid = {0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe}}
98 gEfiVgaMiniPortProtocolGuid = {0xc7735a2f, 0x88f5, 0x4882, {0xae, 0x63, 0xfa, 0xac, 0x8c, 0x8b, 0x86, 0xb3}}
99
100 [PcdsFixedAtBuild]
101 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0
102 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1
103 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15
104 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16
105
106 ## This flag is used to control the destination port for PlatformDebugLibIoPort
107 gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4
108
109 ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
110 # LUNs are retrieved from the host during virtio-scsi setup.
111 # MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
112 # possible devices. This can take extremely long, for example with
113 # MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit
114 # MaxTarget and MaxLun, independently, should the host report higher values,
115 # so that scanning the number of devices given by their product is still
116 # acceptably fast.
117 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6
118 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
119
120 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
121 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
122 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
123 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb
124 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc
125 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
126 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
127 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf
128 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11
129 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12
130 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13
131 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14
132 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18
133 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19
134 gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
135 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
136
137 ## Pcd8259LegacyModeMask defines the default mask value for platform. This
138 # value is determined.
139 # 1) If platform only support pure UEFI, value should be set to 0xFFFF or
140 # 0xFFFE; Because only clock interrupt is allowed in legacy mode in pure
141 # UEFI platform.
142 # 2) If platform install CSM and use thunk module:
143 # a) If thunk call provided by CSM binary requires some legacy interrupt
144 # support, the corresponding bit should be opened as 0.
145 # For example, if keyboard interfaces provided CSM binary use legacy
146 # keyboard interrupt in 8259 bit 1, then the value should be set to
147 # 0xFFFC.
148 # b) If all thunk call provied by CSM binary do not require legacy
149 # interrupt support, value should be set to 0xFFFF or 0xFFFE.
150 #
151 # The default value of legacy mode mask could be changed by
152 # EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it
153 # except some special cases such as when initializing the CSM binary, it
154 # should be set to 0xFFFF to mask all legacy interrupt. Please restore the
155 # original legacy mask value if changing is made for these special case.
156 gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x3
157
158 ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy
159 # mode's interrrupt controller.
160 # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
161 gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x5
162
163 ## Indicates if BiosVideo driver will switch to 80x25 Text VGA Mode when
164 # exiting boot service.
165 # TRUE - Switch to Text VGA Mode.
166 # FALSE - Does not switch to Text VGA Mode.
167 gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoSetTextVgaModeEnable|FALSE|BOOLEAN|0x28
168
169 ## Indicates if BiosVideo driver will check for VESA BIOS Extension service
170 # support.
171 # TRUE - Check for VESA BIOS Extension service.
172 # FALSE - Does not check for VESA BIOS Extension service.
173 gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVbeEnable|TRUE|BOOLEAN|0x29
174
175 ## Indicates if BiosVideo driver will check for VGA service support.
176 # NOTE: If both PcdBiosVideoCheckVbeEnable and PcdBiosVideoCheckVgaEnable
177 # are set to FALSE, that means Graphics Output protocol will not be
178 # installed, the VGA miniport protocol will be installed instead.
179 # TRUE - Check for VGA service.<BR>
180 # FALSE - Does not check for VGA service.<BR>
181 gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVgaEnable|TRUE|BOOLEAN|0x2a
182
183 ## Indicates if memory space for legacy region will be set as cacheable.
184 # TRUE - Set cachebility for legacy region.
185 # FALSE - Does not set cachebility for legacy region.
186 gUefiOvmfPkgTokenSpaceGuid.PcdLegacyBiosCacheLegacyRegion|TRUE|BOOLEAN|0x2b
187
188 ## Specify memory size with bytes to reserve EBDA below 640K for OPROM.
189 # The value should be a multiple of 4KB.
190 gUefiOvmfPkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x8000|UINT32|0x2c
191
192 ## Specify memory base address for OPROM to find free memory.
193 # Some OPROMs do not use EBDA or PMM to allocate memory for its usage,
194 # instead they find the memory filled with zero from 0x20000.
195 # The value should be a multiple of 4KB.
196 # The range should be below the EBDA reserved range from
197 # (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to
198 # CONVENTIONAL_MEMORY_TOP.
199 gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemoryBase|0x60000|UINT32|0x2d
200
201 ## Specify memory size with bytes for OPROM to find free memory.
202 # The value should be a multiple of 4KB. And the range should be below the
203 # EBDA reserved range from
204 # (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to
205 # CONVENTIONAL_MEMORY_TOP.
206 gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemorySize|0x28000|UINT32|0x2e
207
208 ## Specify the end of address below 1MB for the OPROM.
209 # The last shadowed OpROM should not exceed this address.
210 gUefiOvmfPkgTokenSpaceGuid.PcdEndOpromShadowAddress|0xdffff|UINT32|0x2f
211
212 ## Specify the low PMM (Post Memory Manager) size with bytes below 1MB.
213 # The value should be a multiple of 4KB.
214 # @Prompt Low PMM (Post Memory Manager) Size
215 gUefiOvmfPkgTokenSpaceGuid.PcdLowPmmMemorySize|0x10000|UINT32|0x30
216
217 ## Specify the high PMM (Post Memory Manager) size with bytes above 1MB.
218 # The value should be a multiple of 4KB.
219 gUefiOvmfPkgTokenSpaceGuid.PcdHighPmmMemorySize|0x400000|UINT32|0x31
220
221 [PcdsDynamic, PcdsDynamicEx]
222 gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
223 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
224 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b
225 gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21
226
227 ## The IO port aperture shared by all PCI root bridges.
228 #
229 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22
230 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23
231
232 ## The 32-bit MMIO aperture shared by all PCI root bridges.
233 #
234 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24
235 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25
236
237 ## The 64-bit MMIO aperture shared by all PCI root bridges.
238 #
239 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
240 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
241
242 ## The following setting controls how many megabytes we configure as TSEG on
243 # Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults
244 # cause undefined behavior. During boot, the PCD is updated by PlatformPei
245 # to reflect the extended TSEG size, if one is advertized by QEMU.
246 #
247 # This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
248 gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
249
250 [PcdsFeatureFlag]
251 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
252 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
253
254 ## This feature flag enables SMM/SMRAM support. Note that it also requires
255 # such support from the underlying QEMU instance; if that support is not
256 # present, the firmware will reject continuing after a certain point.
257 #
258 # The flag also acts as a general "security switch"; when TRUE, many
259 # components will change behavior, with the goal of preventing a malicious
260 # runtime OS from tampering with firmware structures (special memory ranges
261 # used by OVMF, the varstore pflash chip, LockBox etc).
262 gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e