OvmfPkg/OvmfPkgIa32X64.fdf

   1 ## @file
   2 #  Open Virtual Machine Firmware: FDF
   3 #
   4 #  Copyright (c) 2006 - 2010, Intel Corporation
   5 #
   6 #  All rights reserved. This program and the accompanying materials
   7 #  are licensed and made available under the terms and conditions of the BSD License
   8 #  which accompanies this distribution. The full text of the license may be found at
   9 #  http://opensource.org/licenses/bsd-license.php
  10 #
  11 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 #
  14 ##
  15
  16 ################################################################################
  17 [FD.SEC]
  18 BaseAddress   = 0xFFFEE000
  19 Size          = 0x00012000
  20 ErasePolarity = 1
  21 BlockSize     = 0x1000
  22 NumBlocks     = 0x12
  23
  24 0x0|0x12000
  25 FV = SECFV
  26
  27 ################################################################################
  28
  29 [FD.MEMFD]
  30 BaseAddress   = 0x800000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvBase
  31 Size          = 0x400000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvSize
  32 ErasePolarity = 1
  33 BlockSize     = 0x10000
  34 NumBlocks     = 0x40
  35
  36 0x0|0x400000
  37 FV = MAINFV
  38
  39 ################################################################################
  40
  41 [FV.SECFV]
  42 BlockSize          = 0x1000
  43 FvAlignment        = 16
  44 ERASE_POLARITY     = 1
  45 MEMORY_MAPPED      = TRUE
  46 STICKY_WRITE       = TRUE
  47 LOCK_CAP           = TRUE
  48 LOCK_STATUS        = TRUE
  49 WRITE_DISABLED_CAP = TRUE
  50 WRITE_ENABLED_CAP  = TRUE
  51 WRITE_STATUS       = TRUE
  52 WRITE_LOCK_CAP     = TRUE
  53 WRITE_LOCK_STATUS  = TRUE
  54 READ_DISABLED_CAP  = TRUE
  55 READ_ENABLED_CAP   = TRUE
  56 READ_STATUS        = TRUE
  57 READ_LOCK_CAP      = TRUE
  58 READ_LOCK_STATUS   = TRUE
  59
  60 #
  61 # SEC Phase modules
  62 #
  63 # The code in this FV handles the initial firmware startup, and
  64 # decompresses the MAINFV which handles the majority of the boot sequence.
  65 #
  66 INF  OvmfPkg/Sec/SecMain.inf
  67
  68 FILE RAW = 1BA0062E-C779-4582-8566-336AE8F78F09 {
  69     SECTION RAW = UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw
  70   }
  71
  72 ################################################################################
  73 [FV.MAINFV]
  74 BlockSize          = 0x10000
  75 FvAlignment        = 16
  76 ERASE_POLARITY     = 1
  77 MEMORY_MAPPED      = TRUE
  78 STICKY_WRITE       = TRUE
  79 LOCK_CAP           = TRUE
  80 LOCK_STATUS        = TRUE
  81 WRITE_DISABLED_CAP = TRUE
  82 WRITE_ENABLED_CAP  = TRUE
  83 WRITE_STATUS       = TRUE
  84 WRITE_LOCK_CAP     = TRUE
  85 WRITE_LOCK_STATUS  = TRUE
  86 READ_DISABLED_CAP  = TRUE
  87 READ_ENABLED_CAP   = TRUE
  88 READ_STATUS        = TRUE
  89 READ_LOCK_CAP      = TRUE
  90 READ_LOCK_STATUS   = TRUE
  91
  92 #
  93 # Files to be placed in MAIN FV
  94 #
  95 # This firmware volume will have files placed in it uncompressed,
  96 # and then then entire firmware volume will be compressed in a
  97 # single compression operation in order to achieve better
  98 # overall compression.
  99 #
 100
 101 APRIORI PEI {
 102   INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 103 }
 104
 105 #
 106 #  PEI Phase modules
 107 #
 108 INF  MdeModulePkg/Core/Pei/PeiMain.inf
 109 INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 110 INF  IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
 111 INF  OvmfPkg/PlatformPei/PlatformPei.inf
 112 INF  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
 113
 114 FILE FV_IMAGE = A4EF5A93-3F1B-4232-A1C4-F0910E6D1D9C {
 115   SECTION COMPRESS PI_NONE {
 116     SECTION FV_IMAGE = DXEFV
 117   }
 118 }
 119
 120 ################################################################################
 121
 122 [FV.DXEFV]
 123 BlockSize          = 0x10000
 124 FvAlignment        = 16
 125 ERASE_POLARITY     = 1
 126 MEMORY_MAPPED      = TRUE
 127 STICKY_WRITE       = TRUE
 128 LOCK_CAP           = TRUE
 129 LOCK_STATUS        = TRUE
 130 WRITE_DISABLED_CAP = TRUE
 131 WRITE_ENABLED_CAP  = TRUE
 132 WRITE_STATUS       = TRUE
 133 WRITE_LOCK_CAP     = TRUE
 134 WRITE_LOCK_STATUS  = TRUE
 135 READ_DISABLED_CAP  = TRUE
 136 READ_ENABLED_CAP   = TRUE
 137 READ_STATUS        = TRUE
 138 READ_LOCK_CAP      = TRUE
 139 READ_LOCK_STATUS   = TRUE
 140
 141 APRIORI DXE {
 142   INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 143   INF  IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
 144 }
 145
 146 #
 147 # DXE Phase modules
 148 #
 149 INF  MdeModulePkg/Core/Dxe/DxeMain.inf
 150
 151 INF  IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
 152 INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 153
 154 INF  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
 155 INF  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
 156 INF  IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
 157 INF  MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
 158 INF  MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
 159 INF  PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
 160 INF  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
 161 INF  UefiCpuPkg/CpuDxe/CpuDxe.inf
 162 INF  PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
 163 INF  PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf
 164 INF  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
 165 INF  PcAtChipsetPkg/KbcResetDxe/Reset.inf
 166 INF  MdeModulePkg/Universal/Metronome/Metronome.inf
 167 INF  PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
 168
 169 INF  OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf
 170 INF  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
 171 INF  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
 172 INF  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
 173 INF  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
 174 INF  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
 175 INF  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
 176 INF  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
 177 INF  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
 178 INF  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
 179 INF  IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
 180 INF  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
 181 INF  MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
 182 INF  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
 183 INF  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
 184 INF  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
 185 INF  MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
 186 INF  MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
 187 INF  IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf
 188 INF  PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf
 189 INF  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 190 INF  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
 191
 192 INF  PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf
 193 INF  IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
 194 INF  IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
 195 INF  IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
 196 INF  IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf
 197
 198 INF  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
 199 INF  MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
 200 INF  RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf
 201
 202 FILE DRIVER = 961578FE-B6B7-44c3-AF35-6BC705CD2B1F {
 203     SECTION PE32 = FatBinPkg/EnhancedFatDxe/X64/Fat.efi
 204   }
 205
 206 FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
 207     SECTION PE32 = EdkShellBinPkg/FullShell/X64/Shell_full.efi
 208   }
 209
 210 FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {
 211     SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress
 212       SECTION RAW = MdeModulePkg/Logo/Logo.bmp
 213     }
 214   }
 215
 216 ################################################################################
 217
 218 [FV.OVMF]
 219 BlockSize          = 0x10000
 220 FvAlignment        = 16
 221 ERASE_POLARITY     = 1
 222 MEMORY_MAPPED      = TRUE
 223 STICKY_WRITE       = TRUE
 224 LOCK_CAP           = TRUE
 225 LOCK_STATUS        = TRUE
 226 WRITE_DISABLED_CAP = TRUE
 227 WRITE_ENABLED_CAP  = TRUE
 228 WRITE_STATUS       = TRUE
 229 WRITE_LOCK_CAP     = TRUE
 230 WRITE_LOCK_STATUS  = TRUE
 231 READ_DISABLED_CAP  = TRUE
 232 READ_ENABLED_CAP   = TRUE
 233 READ_STATUS        = TRUE
 234 READ_LOCK_CAP      = TRUE
 235 READ_LOCK_STATUS   = TRUE
 236
 237 #
 238 # This file contains the compressed MAINFV, which is compressed
 239 # in a single compression operation in order to achieve better
 240 # overall compression.
 241 #
 242 FILE FV_IMAGE = 20bc8ac9-94d1-4208-ab28-5d673fd73486 {
 243    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress
 244       SECTION FV_IMAGE = MAINFV
 245    }
 246  }
 247
 248 #
 249 # This file contains the uncompressed SECFV, which contains the initial
 250 # boot code.  The code in this FV decompresses the MAINFV.
 251 #
 252 # It uses the Volume Top File (VTF) GUID so it will be placed at the
 253 # end of the FV.
 254 #
 255 FILE FREEFORM = 1BA0062E-C779-4582-8566-336AE8F78F09 {
 256   SECTION Align=16 FV_IMAGE = SECFV
 257 }
 258
 259 ################################################################################
 260
 261 [Rule.Common.PEI_CORE]
 262   FILE PEI_CORE = $(NAMED_GUID) {
 263     PE32     PE32   Align=32    $(INF_OUTPUT)/$(MODULE_NAME).efi
 264     UI       STRING ="$(MODULE_NAME)" Optional
 265     VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 266   }
 267
 268 [Rule.Common.SEC]
 269   FILE SEC = $(NAMED_GUID) {
 270     PE32     PE32           $(INF_OUTPUT)/$(MODULE_NAME).efi
 271     UI       STRING ="$(MODULE_NAME)" Optional
 272     VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 273   }
 274
 275 [Rule.Common.PEIM.NORELOC]
 276   FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED  {
 277      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 278      TE        TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
 279      UI        STRING="$(MODULE_NAME)" Optional
 280      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 281   }
 282
 283 [Rule.Common.PEIM]
 284   FILE PEIM = $(NAMED_GUID) {
 285      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 286      PE32      PE32   Align=32           $(INF_OUTPUT)/$(MODULE_NAME).efi
 287      UI       STRING="$(MODULE_NAME)" Optional
 288      VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 289   }
 290
 291 [Rule.Common.PEIM.TIANOCOMPRESSED]
 292   FILE PEIM = $(NAMED_GUID) {
 293     PEI_DEPEX PEI_DEPEX Optional         $(INF_OUTPUT)/$(MODULE_NAME).depex
 294     GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
 295       PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 296       UI        STRING="$(MODULE_NAME)" Optional
 297       VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 298     }
 299   }
 300
 301 [Rule.Common.DXE_CORE]
 302   FILE DXE_CORE = $(NAMED_GUID) {
 303     PE32     PE32           $(INF_OUTPUT)/$(MODULE_NAME).efi
 304     UI       STRING="$(MODULE_NAME)" Optional
 305     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 306   }
 307
 308 [Rule.Common.UEFI_DRIVER]
 309   FILE DRIVER = $(NAMED_GUID) {
 310     DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex
 311     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 312     UI       STRING="$(MODULE_NAME)" Optional
 313     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 314   }
 315
 316 [Rule.Common.DXE_DRIVER]
 317   FILE DRIVER = $(NAMED_GUID) {
 318     DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex
 319     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 320     UI       STRING="$(MODULE_NAME)" Optional
 321     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 322   }
 323
 324 [Rule.Common.DXE_RUNTIME_DRIVER]
 325   FILE DRIVER = $(NAMED_GUID) {
 326     DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex
 327     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 328     UI       STRING="$(MODULE_NAME)" Optional
 329     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 330   }
 331
 332 [Rule.Common.UEFI_APPLICATION]
 333   FILE APPLICATION = $(NAMED_GUID) {
 334     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 335     UI       STRING="$(MODULE_NAME)" Optional
 336     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 337   }
 338
 339 [Rule.Common.USER_DEFINED.ACPITABLE]
 340   FILE FREEFORM = $(NAMED_GUID) {
 341     RAW ACPI               |.acpi
 342     RAW ASL                |.aml
 343   }
 344
 345 [Rule.Common.SEC.RESET_VECTOR]
 346   FILE RAW = $(NAMED_GUID) {
 347     RAW RAW                |.raw
 348   }
 349
 350 [OptionRom.CirrusLogic5446]
 351 INF  OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf {
 352     PCI_DEVICE_ID  = 0x00B8
 353   }
 354