OvmfPkg/OvmfPkgIa32X64.fdf

   1 ## @file
   2 #  Open Virtual Machine Firmware: FDF
   3 #
   4 #  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
   5 #
   6 #  This program and the accompanying materials
   7 #  are licensed and made available under the terms and conditions of the BSD License
   8 #  which accompanies this distribution. The full text of the license may be found at
   9 #  http://opensource.org/licenses/bsd-license.php
  10 #
  11 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 #
  14 ##
  15
  16 ################################################################################
  17 [FD.OVMF]
  18 BaseAddress   = 0xFFF00000
  19 Size          = 0x00100000
  20 ErasePolarity = 1
  21 BlockSize     = 0x1000
  22 NumBlocks     = 0x100
  23
  24 0x00000000|0x000EE000
  25 FV = FVMAIN_COMPACT
  26
  27 0x000EE000|0x12000
  28 FV = SECFV
  29
  30
  31 ################################################################################
  32
  33 [FD.MEMFD]
  34 BaseAddress   = 0x800000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvBase
  35 Size          = 0x400000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvSize
  36 ErasePolarity = 1
  37 BlockSize     = 0x10000
  38 NumBlocks     = 0x40
  39
  40 0x0|0x400000
  41 FV = MAINFV
  42
  43 ################################################################################
  44
  45 [FV.SECFV]
  46 BlockSize          = 0x1000
  47 FvAlignment        = 16
  48 ERASE_POLARITY     = 1
  49 MEMORY_MAPPED      = TRUE
  50 STICKY_WRITE       = TRUE
  51 LOCK_CAP           = TRUE
  52 LOCK_STATUS        = TRUE
  53 WRITE_DISABLED_CAP = TRUE
  54 WRITE_ENABLED_CAP  = TRUE
  55 WRITE_STATUS       = TRUE
  56 WRITE_LOCK_CAP     = TRUE
  57 WRITE_LOCK_STATUS  = TRUE
  58 READ_DISABLED_CAP  = TRUE
  59 READ_ENABLED_CAP   = TRUE
  60 READ_STATUS        = TRUE
  61 READ_LOCK_CAP      = TRUE
  62 READ_LOCK_STATUS   = TRUE
  63
  64 #
  65 # SEC Phase modules
  66 #
  67 # The code in this FV handles the initial firmware startup, and
  68 # decompresses the MAINFV which handles the majority of the boot sequence.
  69 #
  70 INF  OvmfPkg/Sec/SecMain.inf
  71
  72 FILE RAW = 1BA0062E-C779-4582-8566-336AE8F78F09 {
  73     SECTION RAW = UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw
  74   }
  75
  76 ################################################################################
  77 [FV.MAINFV]
  78 BlockSize          = 0x10000
  79 FvAlignment        = 16
  80 ERASE_POLARITY     = 1
  81 MEMORY_MAPPED      = TRUE
  82 STICKY_WRITE       = TRUE
  83 LOCK_CAP           = TRUE
  84 LOCK_STATUS        = TRUE
  85 WRITE_DISABLED_CAP = TRUE
  86 WRITE_ENABLED_CAP  = TRUE
  87 WRITE_STATUS       = TRUE
  88 WRITE_LOCK_CAP     = TRUE
  89 WRITE_LOCK_STATUS  = TRUE
  90 READ_DISABLED_CAP  = TRUE
  91 READ_ENABLED_CAP   = TRUE
  92 READ_STATUS        = TRUE
  93 READ_LOCK_CAP      = TRUE
  94 READ_LOCK_STATUS   = TRUE
  95
  96 #
  97 # Files to be placed in MAIN FV
  98 #
  99 # This firmware volume will have files placed in it uncompressed,
 100 # and then then entire firmware volume will be compressed in a
 101 # single compression operation in order to achieve better
 102 # overall compression.
 103 #
 104
 105 APRIORI PEI {
 106   INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 107 }
 108
 109 #
 110 #  PEI Phase modules
 111 #
 112 INF  MdeModulePkg/Core/Pei/PeiMain.inf
 113 INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 114 INF  IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
 115 INF  OvmfPkg/PlatformPei/PlatformPei.inf
 116 INF  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
 117
 118 FILE FV_IMAGE = A4EF5A93-3F1B-4232-A1C4-F0910E6D1D9C {
 119   SECTION FV_IMAGE = DXEFV
 120 }
 121
 122 ################################################################################
 123
 124 [FV.DXEFV]
 125 BlockSize          = 0x10000
 126 FvAlignment        = 16
 127 ERASE_POLARITY     = 1
 128 MEMORY_MAPPED      = TRUE
 129 STICKY_WRITE       = TRUE
 130 LOCK_CAP           = TRUE
 131 LOCK_STATUS        = TRUE
 132 WRITE_DISABLED_CAP = TRUE
 133 WRITE_ENABLED_CAP  = TRUE
 134 WRITE_STATUS       = TRUE
 135 WRITE_LOCK_CAP     = TRUE
 136 WRITE_LOCK_STATUS  = TRUE
 137 READ_DISABLED_CAP  = TRUE
 138 READ_ENABLED_CAP   = TRUE
 139 READ_STATUS        = TRUE
 140 READ_LOCK_CAP      = TRUE
 141 READ_LOCK_STATUS   = TRUE
 142
 143 APRIORI DXE {
 144   INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 145 }
 146
 147 #
 148 # DXE Phase modules
 149 #
 150 INF  MdeModulePkg/Core/Dxe/DxeMain.inf
 151
 152 INF  IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
 153 INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 154
 155 INF  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
 156 INF  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
 157 INF  MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
 158 INF  MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
 159 INF  PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
 160 INF  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
 161 INF  UefiCpuPkg/CpuDxe/CpuDxe.inf
 162 INF  PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
 163 INF  PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf
 164 INF  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
 165 INF  PcAtChipsetPkg/KbcResetDxe/Reset.inf
 166 INF  MdeModulePkg/Universal/Metronome/Metronome.inf
 167 INF  PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
 168
 169 INF  OvmfPkg/BlockMmioToBlockIoDxe/BlockIo.inf
 170 INF  OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf
 171 INF  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
 172 INF  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
 173 INF  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
 174 INF  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
 175 INF  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
 176 INF  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
 177 INF  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
 178 INF  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
 179 INF  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
 180 INF  IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
 181 INF  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
 182 INF  MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
 183 INF  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
 184 INF  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
 185 INF  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
 186 INF  MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
 187 INF  MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
 188 INF  IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf
 189 INF  PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf
 190 INF  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 191 INF  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
 192
 193 INF  PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf
 194 INF  IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
 195 INF  IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
 196 INF  IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
 197 INF  IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf
 198
 199 INF  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
 200 INF  MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
 201 INF  RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf
 202 INF  OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf
 203
 204 INF  FatBinPkg/EnhancedFatDxe/Fat.inf
 205 INF  EdkShellBinPkg/FullShell/FullShell.inf
 206
 207 FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {
 208   SECTION RAW = MdeModulePkg/Logo/Logo.bmp
 209 }
 210
 211 ################################################################################
 212
 213 [FV.FVMAIN_COMPACT]
 214 FvAlignment        = 16
 215 ERASE_POLARITY     = 1
 216 MEMORY_MAPPED      = TRUE
 217 STICKY_WRITE       = TRUE
 218 LOCK_CAP           = TRUE
 219 LOCK_STATUS        = TRUE
 220 WRITE_DISABLED_CAP = TRUE
 221 WRITE_ENABLED_CAP  = TRUE
 222 WRITE_STATUS       = TRUE
 223 WRITE_LOCK_CAP     = TRUE
 224 WRITE_LOCK_STATUS  = TRUE
 225 READ_DISABLED_CAP  = TRUE
 226 READ_ENABLED_CAP   = TRUE
 227 READ_STATUS        = TRUE
 228 READ_LOCK_CAP      = TRUE
 229 READ_LOCK_STATUS   = TRUE
 230
 231 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
 232        SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
 233           SECTION FV_IMAGE = MAINFV
 234        }
 235      }
 236
 237 ################################################################################
 238
 239 [Rule.Common.SEC]
 240   FILE SEC = $(NAMED_GUID) {
 241     PE32     PE32           $(INF_OUTPUT)/$(MODULE_NAME).efi
 242     UI       STRING ="$(MODULE_NAME)" Optional
 243     VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 244   }
 245
 246 [Rule.Common.PEI_CORE]
 247   FILE PEI_CORE = $(NAMED_GUID) {
 248     PE32     PE32   Align=32    $(INF_OUTPUT)/$(MODULE_NAME).efi
 249     UI       STRING ="$(MODULE_NAME)" Optional
 250     VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 251   }
 252
 253 [Rule.Common.PEIM]
 254   FILE PEIM = $(NAMED_GUID) {
 255      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 256      PE32      PE32   Align=32           $(INF_OUTPUT)/$(MODULE_NAME).efi
 257      UI       STRING="$(MODULE_NAME)" Optional
 258      VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 259   }
 260
 261 [Rule.Common.DXE_CORE]
 262   FILE DXE_CORE = $(NAMED_GUID) {
 263     PE32     PE32           $(INF_OUTPUT)/$(MODULE_NAME).efi
 264     UI       STRING="$(MODULE_NAME)" Optional
 265     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 266   }
 267
 268 [Rule.Common.DXE_DRIVER]
 269   FILE DRIVER = $(NAMED_GUID) {
 270     DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex
 271     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 272     UI       STRING="$(MODULE_NAME)" Optional
 273     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 274   }
 275
 276 [Rule.Common.DXE_RUNTIME_DRIVER]
 277   FILE DRIVER = $(NAMED_GUID) {
 278     DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex
 279     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 280     UI       STRING="$(MODULE_NAME)" Optional
 281     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 282   }
 283
 284 [Rule.Common.UEFI_DRIVER]
 285   FILE DRIVER = $(NAMED_GUID) {
 286     DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex
 287     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 288     UI       STRING="$(MODULE_NAME)" Optional
 289     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 290   }
 291
 292 [Rule.Common.UEFI_APPLICATION]
 293   FILE APPLICATION = $(NAMED_GUID) {
 294     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 295     UI       STRING="$(MODULE_NAME)" Optional
 296     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 297   }
 298
 299 [Rule.Common.USER_DEFINED.ACPITABLE]
 300   FILE FREEFORM = $(NAMED_GUID) {
 301     RAW ACPI               |.acpi
 302     RAW ASL                |.aml
 303   }
 304
 305 [OptionRom.CirrusLogic5446]
 306 INF  OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf {
 307     PCI_DEVICE_ID  = 0x00B8
 308   }
 309