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1 /** @file
2 This driver implements EFI_PCI_HOT_PLUG_INIT_PROTOCOL, providing the PCI bus
3 driver with resource padding information, for PCIe hotplug purposes.
4
5 Copyright (C) 2016, Red Hat, Inc.
6
7 This program and the accompanying materials are licensed and made available
8 under the terms and conditions of the BSD License which accompanies this
9 distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
13 WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14 **/
15
16 #include <IndustryStandard/Acpi10.h>
17 #include <IndustryStandard/QemuPciBridgeCapabilities.h>
18
19 #include <Library/BaseLib.h>
20 #include <Library/BaseMemoryLib.h>
21 #include <Library/DebugLib.h>
22 #include <Library/DevicePathLib.h>
23 #include <Library/MemoryAllocationLib.h>
24 #include <Library/PciLib.h>
25 #include <Library/UefiBootServicesTableLib.h>
26
27 #include <Protocol/PciHotPlugInit.h>
28 #include <Protocol/PciRootBridgeIo.h>
29
30 //
31 // The protocol interface this driver produces.
32 //
33 // Refer to 12.6 "PCI Hot Plug PCI Initialization Protocol" in the Platform
34 // Init 1.4a Spec, Volume 5.
35 //
36 STATIC EFI_PCI_HOT_PLUG_INIT_PROTOCOL mPciHotPlugInit;
37
38
39 //
40 // Resource padding template for the GetResourcePadding() protocol member
41 // function.
42 //
43 // Refer to Table 8 "ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage" in
44 // the Platform Init 1.4a Spec, Volume 5.
45 //
46 // This structure is interpreted by the ApplyResourcePadding() function in the
47 // edk2 PCI Bus UEFI_DRIVER.
48 //
49 // We can request padding for at most four resource types, each of which is
50 // optional, independently of the others:
51 // (a) bus numbers,
52 // (b) IO space,
53 // (c) non-prefetchable MMIO space (32-bit only),
54 // (d) prefetchable MMIO space (either 32-bit or 64-bit, never both).
55 //
56 #pragma pack (1)
57 typedef struct {
58 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR Padding[4];
59 EFI_ACPI_END_TAG_DESCRIPTOR EndDesc;
60 } RESOURCE_PADDING;
61 #pragma pack ()
62
63
64 /**
65 Initialize a RESOURCE_PADDING object.
66
67 @param[out] ResourcePadding The caller-allocated RESOURCE_PADDING object to
68 initialize.
69 **/
70 STATIC
71 VOID
72 InitializeResourcePadding (
73 OUT RESOURCE_PADDING *ResourcePadding
74 )
75 {
76 UINTN Index;
77
78 ZeroMem (ResourcePadding, sizeof *ResourcePadding);
79
80 //
81 // Fill in the Padding fields that don't vary across resource types.
82 //
83 for (Index = 0; Index < ARRAY_SIZE (ResourcePadding->Padding); ++Index) {
84 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
85
86 Descriptor = ResourcePadding->Padding + Index;
87 Descriptor->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
88 Descriptor->Len = (UINT16)(
89 sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
90 OFFSET_OF (
91 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
92 ResType
93 )
94 );
95 }
96
97 //
98 // Fill in the End Tag.
99 //
100 ResourcePadding->EndDesc.Desc = ACPI_END_TAG_DESCRIPTOR;
101 }
102
103
104 /**
105 Set up a descriptor entry for reserving IO space.
106
107 @param[in,out] Descriptor The descriptor to configure. The caller shall have
108 initialized Descriptor earlier, with
109 InitializeResourcePadding().
110
111 @param[in] SizeExponent The size and natural alignment of the reservation
112 are determined by raising two to this power.
113 **/
114 STATIC
115 VOID
116 SetIoPadding (
117 IN OUT EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor,
118 IN UINTN SizeExponent
119 )
120 {
121 Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
122 Descriptor->AddrLen = LShiftU64 (1, SizeExponent);
123 Descriptor->AddrRangeMax = Descriptor->AddrLen - 1;
124 }
125
126
127 /**
128 Set up a descriptor entry for reserving MMIO space.
129
130 @param[in,out] Descriptor The descriptor to configure. The caller shall
131 have initialized Descriptor earlier, with
132 InitializeResourcePadding().
133
134 @param[in] Prefetchable TRUE if the descriptor should reserve
135 prefetchable MMIO space. Pass FALSE for
136 reserving non-prefetchable MMIO space.
137
138 @param[in] ThirtyTwoBitOnly TRUE if the reservation should be limited to
139 32-bit address space. FALSE if the reservation
140 can be satisfied from 64-bit address space.
141 ThirtyTwoBitOnly is ignored if Prefetchable is
142 FALSE; in that case ThirtyTwoBitOnly is always
143 considered TRUE.
144
145 @param[in] SizeExponent The size and natural alignment of the
146 reservation are determined by raising two to
147 this power.
148 **/
149 STATIC
150 VOID
151 SetMmioPadding (
152 IN OUT EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor,
153 IN BOOLEAN Prefetchable,
154 IN BOOLEAN ThirtyTwoBitOnly,
155 IN UINTN SizeExponent
156 )
157 {
158 Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
159 if (Prefetchable) {
160 Descriptor->SpecificFlag =
161 EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
162 Descriptor->AddrSpaceGranularity = ThirtyTwoBitOnly ? 32 : 64;
163 } else {
164 Descriptor->SpecificFlag =
165 EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE;
166 Descriptor->AddrSpaceGranularity = 32;
167 }
168 Descriptor->AddrLen = LShiftU64 (1, SizeExponent);
169 Descriptor->AddrRangeMax = Descriptor->AddrLen - 1;
170 }
171
172
173 /**
174 Round up a positive 32-bit value to the next whole power of two, and return
175 the bit position of the highest bit set in the result. Equivalent to
176 ceil(log2(x)).
177
178 @param[in] Operand The 32-bit operand to evaluate.
179
180 @retval -1 Operand is zero.
181
182 @retval -1 Operand is positive, not a whole power of two, and rounding it
183 up to the next power of two does not fit into 32 bits.
184
185 @retval 0..31 Otherwise, return ceil(log2(Value)).
186 **/
187 STATIC
188 INTN
189 HighBitSetRoundUp32 (
190 IN UINT32 Operand
191 )
192 {
193 INTN HighBit;
194
195 HighBit = HighBitSet32 (Operand);
196 if (HighBit == -1) {
197 //
198 // Operand is zero.
199 //
200 return HighBit;
201 }
202 if ((Operand & (Operand - 1)) != 0) {
203 //
204 // Operand is not a whole power of two.
205 //
206 ++HighBit;
207 }
208 return (HighBit < 32) ? HighBit : -1;
209 }
210
211
212 /**
213 Round up a positive 64-bit value to the next whole power of two, and return
214 the bit position of the highest bit set in the result. Equivalent to
215 ceil(log2(x)).
216
217 @param[in] Operand The 64-bit operand to evaluate.
218
219 @retval -1 Operand is zero.
220
221 @retval -1 Operand is positive, not a whole power of two, and rounding it
222 up to the next power of two does not fit into 64 bits.
223
224 @retval 0..63 Otherwise, return ceil(log2(Value)).
225 **/
226 STATIC
227 INTN
228 HighBitSetRoundUp64 (
229 IN UINT64 Operand
230 )
231 {
232 INTN HighBit;
233
234 HighBit = HighBitSet64 (Operand);
235 if (HighBit == -1) {
236 //
237 // Operand is zero.
238 //
239 return HighBit;
240 }
241 if ((Operand & (Operand - 1)) != 0) {
242 //
243 // Operand is not a whole power of two.
244 //
245 ++HighBit;
246 }
247 return (HighBit < 64) ? HighBit : -1;
248 }
249
250
251 /**
252 Read a slice from conventional PCI config space at the given offset, then
253 advance the offset.
254
255 @param[in] PciAddress The address of the PCI Device -- Bus, Device, Function
256 -- in UEFI (not PciLib) encoding.
257
258 @param[in,out] Offset On input, the offset in conventional PCI config space
259 to start reading from. On output, the offset of the
260 first byte that was not read.
261
262 @param[in] Size The number of bytes to read.
263
264 @param[out] Buffer On output, the bytes read from PCI config space are
265 stored in this object.
266 **/
267 STATIC
268 VOID
269 ReadConfigSpace (
270 IN CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *PciAddress,
271 IN OUT UINT8 *Offset,
272 IN UINT8 Size,
273 OUT VOID *Buffer
274 )
275 {
276 PciReadBuffer (
277 PCI_LIB_ADDRESS (
278 PciAddress->Bus,
279 PciAddress->Device,
280 PciAddress->Function,
281 *Offset
282 ),
283 Size,
284 Buffer
285 );
286 *Offset += Size;
287 }
288
289
290 /**
291 Convenience wrapper macro for ReadConfigSpace().
292
293 Given the following conditions:
294
295 - HeaderField is the first field in the structure pointed-to by Struct,
296
297 - Struct->HeaderField has been populated from the conventional PCI config
298 space of the PCI device identified by PciAddress,
299
300 - *Offset points one past HeaderField in the conventional PCI config space of
301 the PCI device identified by PciAddress,
302
303 populate the rest of *Struct from conventional PCI config space, starting at
304 *Offset. Finally, increment *Offset so that it point one past *Struct.
305
306 @param[in] PciAddress The address of the PCI Device -- Bus, Device, Function
307 -- in UEFI (not PciLib) encoding. Type: pointer to
308 CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
309
310 @param[in,out] Offset On input, the offset in conventional PCI config space
311 to start reading from; one past Struct->HeaderField.
312 On output, the offset of the first byte that was not
313 read; one past *Struct. Type: pointer to UINT8.
314
315 @param[out] Struct The structure to complete. Type: pointer to structure
316 object.
317
318 @param[in] HeaderField The name of the first field in *Struct, after which
319 *Struct should be populated. Type: structure member
320 identifier.
321 **/
322 #define COMPLETE_CONFIG_SPACE_STRUCT(PciAddress, Offset, Struct, HeaderField) \
323 ReadConfigSpace ( \
324 (PciAddress), \
325 (Offset), \
326 (UINT8)(sizeof *(Struct) - sizeof ((Struct)->HeaderField)), \
327 &((Struct)->HeaderField) + 1 \
328 )
329
330
331 /**
332 Look up the QEMU-specific Resource Reservation capability in the conventional
333 config space of a Hotplug Controller (that is, PCI Bridge).
334
335 This function performs as few config space reads as possible.
336
337 @param[in] HpcPciAddress The address of the PCI Bridge -- Bus, Device,
338 Function -- in UEFI (not PciLib) encoding.
339
340 @param[out] ReservationHint The caller-allocated capability structure to
341 populate from the PCI Bridge's config space.
342
343 @retval EFI_SUCCESS The capability has been found, ReservationHint has
344 been populated.
345
346 @retval EFI_NOT_FOUND The capability is missing. The contents of
347 ReservationHint are now indeterminate.
348 **/
349 STATIC
350 EFI_STATUS
351 QueryReservationHint (
352 IN CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *HpcPciAddress,
353 OUT QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION *ReservationHint
354 )
355 {
356 UINT16 PciVendorId;
357 UINT16 PciStatus;
358 UINT8 PciCapPtr;
359 UINT8 Offset;
360
361 //
362 // Check the vendor identifier.
363 //
364 PciVendorId = PciRead16 (
365 PCI_LIB_ADDRESS (
366 HpcPciAddress->Bus,
367 HpcPciAddress->Device,
368 HpcPciAddress->Function,
369 PCI_VENDOR_ID_OFFSET
370 )
371 );
372 if (PciVendorId != QEMU_PCI_BRIDGE_VENDOR_ID_REDHAT) {
373 return EFI_NOT_FOUND;
374 }
375
376 //
377 // Check the Capabilities List bit in the PCI Status Register.
378 //
379 PciStatus = PciRead16 (
380 PCI_LIB_ADDRESS (
381 HpcPciAddress->Bus,
382 HpcPciAddress->Device,
383 HpcPciAddress->Function,
384 PCI_PRIMARY_STATUS_OFFSET
385 )
386 );
387 if ((PciStatus & EFI_PCI_STATUS_CAPABILITY) == 0) {
388 return EFI_NOT_FOUND;
389 }
390
391 //
392 // Fetch the start of the Capabilities List.
393 //
394 PciCapPtr = PciRead8 (
395 PCI_LIB_ADDRESS (
396 HpcPciAddress->Bus,
397 HpcPciAddress->Device,
398 HpcPciAddress->Function,
399 PCI_CAPBILITY_POINTER_OFFSET
400 )
401 );
402
403 //
404 // Scan the Capabilities List until we find the terminator element, or the
405 // Resource Reservation capability.
406 //
407 for (Offset = PciCapPtr & 0xFC;
408 Offset > 0;
409 Offset = ReservationHint->BridgeHdr.VendorHdr.Hdr.NextItemPtr & 0xFC) {
410 BOOLEAN EnoughRoom;
411
412 //
413 // Check if the Resource Reservation capability would fit into config space
414 // at this offset.
415 //
416 EnoughRoom = (BOOLEAN)(
417 Offset <= PCI_MAX_CONFIG_OFFSET - sizeof *ReservationHint
418 );
419
420 //
421 // Read the standard capability header so we can check the capability ID
422 // (if necessary) and advance to the next capability.
423 //
424 ReadConfigSpace (
425 HpcPciAddress,
426 &Offset,
427 (UINT8)sizeof ReservationHint->BridgeHdr.VendorHdr.Hdr,
428 &ReservationHint->BridgeHdr.VendorHdr.Hdr
429 );
430 if (!EnoughRoom ||
431 (ReservationHint->BridgeHdr.VendorHdr.Hdr.CapabilityID !=
432 EFI_PCI_CAPABILITY_ID_VENDOR)) {
433 continue;
434 }
435
436 //
437 // Read the rest of the vendor capability header so we can check the
438 // capability length.
439 //
440 COMPLETE_CONFIG_SPACE_STRUCT (
441 HpcPciAddress,
442 &Offset,
443 &ReservationHint->BridgeHdr.VendorHdr,
444 Hdr
445 );
446 if (ReservationHint->BridgeHdr.VendorHdr.Length !=
447 sizeof *ReservationHint) {
448 continue;
449 }
450
451 //
452 // Read the rest of the QEMU bridge capability header so we can check the
453 // capability type.
454 //
455 COMPLETE_CONFIG_SPACE_STRUCT (
456 HpcPciAddress,
457 &Offset,
458 &ReservationHint->BridgeHdr,
459 VendorHdr
460 );
461 if (ReservationHint->BridgeHdr.Type !=
462 QEMU_PCI_BRIDGE_CAPABILITY_TYPE_RESOURCE_RESERVATION) {
463 continue;
464 }
465
466 //
467 // Read the body of the reservation hint.
468 //
469 COMPLETE_CONFIG_SPACE_STRUCT (
470 HpcPciAddress,
471 &Offset,
472 ReservationHint,
473 BridgeHdr
474 );
475 return EFI_SUCCESS;
476 }
477
478 return EFI_NOT_FOUND;
479 }
480
481
482 /**
483 Returns a list of root Hot Plug Controllers (HPCs) that require
484 initialization during the boot process.
485
486 This procedure returns a list of root HPCs. The PCI bus driver must
487 initialize these controllers during the boot process. The PCI bus driver may
488 or may not be able to detect these HPCs. If the platform includes a
489 PCI-to-CardBus bridge, it can be included in this list if it requires
490 initialization. The HpcList must be self consistent. An HPC cannot control
491 any of its parent buses. Only one HPC can control a PCI bus. Because this
492 list includes only root HPCs, no HPC in the list can be a child of another
493 HPC. This policy must be enforced by the EFI_PCI_HOT_PLUG_INIT_PROTOCOL.
494 The PCI bus driver may not check for such invalid conditions. The callee
495 allocates the buffer HpcList
496
497 @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
498 instance.
499 @param[out] HpcCount The number of root HPCs that were returned.
500 @param[out] HpcList The list of root HPCs. HpcCount defines the number of
501 elements in this list.
502
503 @retval EFI_SUCCESS HpcList was returned.
504 @retval EFI_OUT_OF_RESOURCES HpcList was not returned due to insufficient
505 resources.
506 @retval EFI_INVALID_PARAMETER HpcCount is NULL or HpcList is NULL.
507 **/
508 STATIC
509 EFI_STATUS
510 EFIAPI
511 GetRootHpcList (
512 IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
513 OUT UINTN *HpcCount,
514 OUT EFI_HPC_LOCATION **HpcList
515 )
516 {
517 if (HpcCount == NULL || HpcList == NULL) {
518 return EFI_INVALID_PARAMETER;
519 }
520
521 //
522 // There are no top-level (i.e., un-enumerable) hot-plug controllers in QEMU
523 // that would require special initialization.
524 //
525 *HpcCount = 0;
526 *HpcList = NULL;
527 return EFI_SUCCESS;
528 }
529
530
531 /**
532 Initializes one root Hot Plug Controller (HPC). This process may causes
533 initialization of its subordinate buses.
534
535 This function initializes the specified HPC. At the end of initialization,
536 the hot-plug slots or sockets (controlled by this HPC) are powered and are
537 connected to the bus. All the necessary registers in the HPC are set up. For
538 a Standard (PCI) Hot Plug Controller (SHPC), the registers that must be set
539 up are defined in the PCI Standard Hot Plug Controller and Subsystem
540 Specification.
541
542 @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
543 instance.
544 @param[in] HpcDevicePath The device path to the HPC that is being
545 initialized.
546 @param[in] HpcPciAddress The address of the HPC function on the PCI bus.
547 @param[in] Event The event that should be signaled when the HPC
548 initialization is complete. Set to NULL if the
549 caller wants to wait until the entire
550 initialization process is complete.
551 @param[out] HpcState The state of the HPC hardware. The state is
552 EFI_HPC_STATE_INITIALIZED or
553 EFI_HPC_STATE_ENABLED.
554
555 @retval EFI_SUCCESS If Event is NULL, the specific HPC was
556 successfully initialized. If Event is not
557 NULL, Event will be signaled at a later time
558 when initialization is complete.
559 @retval EFI_UNSUPPORTED This instance of
560 EFI_PCI_HOT_PLUG_INIT_PROTOCOL does not
561 support the specified HPC.
562 @retval EFI_OUT_OF_RESOURCES Initialization failed due to insufficient
563 resources.
564 @retval EFI_INVALID_PARAMETER HpcState is NULL.
565 **/
566 STATIC
567 EFI_STATUS
568 EFIAPI
569 InitializeRootHpc (
570 IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
571 IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
572 IN UINT64 HpcPciAddress,
573 IN EFI_EVENT Event, OPTIONAL
574 OUT EFI_HPC_STATE *HpcState
575 )
576 {
577 //
578 // This function should never be called, due to the information returned by
579 // GetRootHpcList().
580 //
581 ASSERT (FALSE);
582
583 if (HpcState == NULL) {
584 return EFI_INVALID_PARAMETER;
585 }
586 return EFI_UNSUPPORTED;
587 }
588
589
590 /**
591 Returns the resource padding that is required by the PCI bus that is
592 controlled by the specified Hot Plug Controller (HPC).
593
594 This function returns the resource padding that is required by the PCI bus
595 that is controlled by the specified HPC. This member function is called for
596 all the root HPCs and nonroot HPCs that are detected by the PCI bus
597 enumerator. This function will be called before PCI resource allocation is
598 completed. This function must be called after all the root HPCs, with the
599 possible exception of a PCI-to-CardBus bridge, have completed
600 initialization.
601
602 @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
603 instance.
604 @param[in] HpcDevicePath The device path to the HPC.
605 @param[in] HpcPciAddress The address of the HPC function on the PCI bus.
606 @param[in] HpcState The state of the HPC hardware.
607 @param[out] Padding The amount of resource padding that is required
608 by the PCI bus under the control of the specified
609 HPC.
610 @param[out] Attributes Describes how padding is accounted for. The
611 padding is returned in the form of ACPI 2.0
612 resource descriptors.
613
614 @retval EFI_SUCCESS The resource padding was successfully
615 returned.
616 @retval EFI_UNSUPPORTED This instance of the
617 EFI_PCI_HOT_PLUG_INIT_PROTOCOL does not
618 support the specified HPC.
619 @retval EFI_NOT_READY This function was called before HPC
620 initialization is complete.
621 @retval EFI_INVALID_PARAMETER HpcState or Padding or Attributes is NULL.
622 @retval EFI_OUT_OF_RESOURCES ACPI 2.0 resource descriptors for Padding
623 cannot be allocated due to insufficient
624 resources.
625 **/
626 STATIC
627 EFI_STATUS
628 EFIAPI
629 GetResourcePadding (
630 IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
631 IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
632 IN UINT64 HpcPciAddress,
633 OUT EFI_HPC_STATE *HpcState,
634 OUT VOID **Padding,
635 OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes
636 )
637 {
638 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *Address;
639 BOOLEAN DefaultIo;
640 BOOLEAN DefaultMmio;
641 RESOURCE_PADDING ReservationRequest;
642 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *FirstResource;
643 EFI_STATUS ReservationHintStatus;
644 QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION ReservationHint;
645
646 Address = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *)&HpcPciAddress;
647
648 DEBUG_CODE (
649 CHAR16 *DevicePathString;
650
651 DevicePathString = ConvertDevicePathToText (HpcDevicePath, FALSE, FALSE);
652
653 DEBUG ((EFI_D_VERBOSE, "%a: Address=%02x:%02x.%x DevicePath=%s\n",
654 __FUNCTION__, Address->Bus, Address->Device, Address->Function,
655 (DevicePathString == NULL) ? L"<unavailable>" : DevicePathString));
656
657 if (DevicePathString != NULL) {
658 FreePool (DevicePathString);
659 }
660 );
661
662 if (HpcState == NULL || Padding == NULL || Attributes == NULL) {
663 return EFI_INVALID_PARAMETER;
664 }
665
666 DefaultIo = TRUE;
667 DefaultMmio = TRUE;
668
669 //
670 // Init ReservationRequest, and point FirstResource one past the last
671 // descriptor entry. We're going to build the entries backwards from
672 // ReservationRequest.EndDesc.
673 //
674 InitializeResourcePadding (&ReservationRequest);
675 FirstResource = ReservationRequest.Padding +
676 ARRAY_SIZE (ReservationRequest.Padding);
677
678 //
679 // Try to get the QEMU-specific Resource Reservation capability.
680 //
681 ReservationHintStatus = QueryReservationHint (Address, &ReservationHint);
682 if (!EFI_ERROR (ReservationHintStatus)) {
683 INTN HighBit;
684
685 DEBUG ((
686 DEBUG_VERBOSE,
687 "%a: BusNumbers=0x%x Io=0x%Lx NonPrefetchable32BitMmio=0x%x\n"
688 "%a: Prefetchable32BitMmio=0x%x Prefetchable64BitMmio=0x%Lx\n",
689 __FUNCTION__,
690 ReservationHint.BusNumbers,
691 ReservationHint.Io,
692 ReservationHint.NonPrefetchable32BitMmio,
693 __FUNCTION__,
694 ReservationHint.Prefetchable32BitMmio,
695 ReservationHint.Prefetchable64BitMmio
696 ));
697
698 //
699 // (a) Reserve bus numbers.
700 //
701 switch (ReservationHint.BusNumbers) {
702 case 0:
703 //
704 // No reservation needed.
705 //
706 break;
707 case MAX_UINT32:
708 //
709 // Firmware default (unspecified). Treat it as "no reservation needed".
710 //
711 break;
712 default:
713 //
714 // Request the specified amount.
715 //
716 --FirstResource;
717 FirstResource->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS;
718 FirstResource->AddrLen = ReservationHint.BusNumbers;
719 break;
720 }
721
722 //
723 // (b) Reserve IO space.
724 //
725 switch (ReservationHint.Io) {
726 case 0:
727 //
728 // No reservation needed, disable our built-in.
729 //
730 DefaultIo = FALSE;
731 break;
732 case MAX_UINT64:
733 //
734 // Firmware default (unspecified). Stick with our built-in.
735 //
736 break;
737 default:
738 //
739 // Round the specified amount up to the next power of two. If rounding is
740 // successful, reserve the rounded value. Fall back to the default
741 // otherwise.
742 //
743 HighBit = HighBitSetRoundUp64 (ReservationHint.Io);
744 if (HighBit != -1) {
745 SetIoPadding (--FirstResource, (UINTN)HighBit);
746 DefaultIo = FALSE;
747 }
748 break;
749 }
750
751 //
752 // (c) Reserve non-prefetchable MMIO space (32-bit only).
753 //
754 switch (ReservationHint.NonPrefetchable32BitMmio) {
755 case 0:
756 //
757 // No reservation needed, disable our built-in.
758 //
759 DefaultMmio = FALSE;
760 break;
761 case MAX_UINT32:
762 //
763 // Firmware default (unspecified). Stick with our built-in.
764 //
765 break;
766 default:
767 //
768 // Round the specified amount up to the next power of two. If rounding is
769 // successful, reserve the rounded value. Fall back to the default
770 // otherwise.
771 //
772 HighBit = HighBitSetRoundUp32 (ReservationHint.NonPrefetchable32BitMmio);
773 if (HighBit != -1) {
774 SetMmioPadding (--FirstResource, FALSE, TRUE, (UINTN)HighBit);
775 DefaultMmio = FALSE;
776 }
777 break;
778 }
779
780 //
781 // (d) Reserve prefetchable MMIO space (either 32-bit or 64-bit, never
782 // both).
783 //
784 // For either space, we treat 0 as "no reservation needed", and the maximum
785 // value as "firmware default". The latter is unspecified, and we interpret
786 // it as the former.
787 //
788 // Otherwise, round the specified amount up to the next power of two. If
789 // rounding is successful, reserve the rounded value. Do not reserve
790 // prefetchable MMIO space otherwise.
791 //
792 if (ReservationHint.Prefetchable32BitMmio > 0 &&
793 ReservationHint.Prefetchable32BitMmio < MAX_UINT32) {
794 HighBit = HighBitSetRoundUp32 (ReservationHint.Prefetchable32BitMmio);
795 if (HighBit != -1) {
796 SetMmioPadding (--FirstResource, TRUE, TRUE, (UINTN)HighBit);
797 }
798 } else if (ReservationHint.Prefetchable64BitMmio > 0 &&
799 ReservationHint.Prefetchable64BitMmio < MAX_UINT64) {
800 HighBit = HighBitSetRoundUp64 (ReservationHint.Prefetchable64BitMmio);
801 if (HighBit != -1) {
802 SetMmioPadding (--FirstResource, TRUE, FALSE, (UINTN)HighBit);
803 }
804 }
805 }
806
807 if (DefaultIo) {
808 //
809 // Request defaults.
810 //
811 SetIoPadding (--FirstResource, (UINTN)HighBitSetRoundUp64 (512));
812 }
813
814 if (DefaultMmio) {
815 //
816 // Request defaults.
817 //
818 SetMmioPadding (
819 --FirstResource,
820 FALSE,
821 TRUE,
822 (UINTN)HighBitSetRoundUp32 (SIZE_2MB)
823 );
824 }
825
826 //
827 // Output a copy of ReservationRequest from the lowest-address populated
828 // entry until the end of the structure (including
829 // ReservationRequest.EndDesc). If no reservations are necessary, we'll only
830 // output the End Tag.
831 //
832 *Padding = AllocateCopyPool (
833 (UINT8 *)(&ReservationRequest + 1) - (UINT8 *)FirstResource,
834 FirstResource
835 );
836 if (*Padding == NULL) {
837 return EFI_OUT_OF_RESOURCES;
838 }
839
840 //
841 // Resource padding is required.
842 //
843 *HpcState = EFI_HPC_STATE_INITIALIZED | EFI_HPC_STATE_ENABLED;
844
845 //
846 // The padding should be applied at PCI bus level, and considered by upstream
847 // bridges, recursively.
848 //
849 *Attributes = EfiPaddingPciBus;
850 return EFI_SUCCESS;
851 }
852
853
854 /**
855 Entry point for this driver.
856
857 @param[in] ImageHandle Image handle of this driver.
858 @param[in] SystemTable Pointer to SystemTable.
859
860 @retval EFI_SUCESS Driver has loaded successfully.
861 @return Error codes from lower level functions.
862
863 **/
864 EFI_STATUS
865 EFIAPI
866 DriverInitialize (
867 IN EFI_HANDLE ImageHandle,
868 IN EFI_SYSTEM_TABLE *SystemTable
869 )
870 {
871 EFI_STATUS Status;
872
873 mPciHotPlugInit.GetRootHpcList = GetRootHpcList;
874 mPciHotPlugInit.InitializeRootHpc = InitializeRootHpc;
875 mPciHotPlugInit.GetResourcePadding = GetResourcePadding;
876 Status = gBS->InstallMultipleProtocolInterfaces (&ImageHandle,
877 &gEfiPciHotPlugInitProtocolGuid, &mPciHotPlugInit, NULL);
878 return Status;
879 }