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OvmfPkg: PlatformPei: reserve SEC/PEI temp RAM for S3 resume
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1 /**@file
2 Memory Detection for Virtual Machines.
3
4 Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 Module Name:
14
15 MemDetect.c
16
17 **/
18
19 //
20 // The package level header files this module uses
21 //
22 #include <PiPei.h>
23
24 //
25 // The Library classes this module consumes
26 //
27 #include <Library/DebugLib.h>
28 #include <Library/HobLib.h>
29 #include <Library/IoLib.h>
30 #include <Library/PcdLib.h>
31 #include <Library/PeimEntryPoint.h>
32 #include <Library/ResourcePublicationLib.h>
33 #include <Library/MtrrLib.h>
34
35 #include "Platform.h"
36 #include "Cmos.h"
37
38 UINT32
39 GetSystemMemorySizeBelow4gb (
40 VOID
41 )
42 {
43 UINT8 Cmos0x34;
44 UINT8 Cmos0x35;
45
46 //
47 // CMOS 0x34/0x35 specifies the system memory above 16 MB.
48 // * CMOS(0x35) is the high byte
49 // * CMOS(0x34) is the low byte
50 // * The size is specified in 64kb chunks
51 // * Since this is memory above 16MB, the 16MB must be added
52 // into the calculation to get the total memory size.
53 //
54
55 Cmos0x34 = (UINT8) CmosRead8 (0x34);
56 Cmos0x35 = (UINT8) CmosRead8 (0x35);
57
58 return (((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);
59 }
60
61
62 STATIC
63 UINT64
64 GetSystemMemorySizeAbove4gb (
65 )
66 {
67 UINT32 Size;
68 UINTN CmosIndex;
69
70 //
71 // CMOS 0x5b-0x5d specifies the system memory above 4GB MB.
72 // * CMOS(0x5d) is the most significant size byte
73 // * CMOS(0x5c) is the middle size byte
74 // * CMOS(0x5b) is the least significant size byte
75 // * The size is specified in 64kb chunks
76 //
77
78 Size = 0;
79 for (CmosIndex = 0x5d; CmosIndex >= 0x5b; CmosIndex--) {
80 Size = (UINT32) (Size << 8) + (UINT32) CmosRead8 (CmosIndex);
81 }
82
83 return LShiftU64 (Size, 16);
84 }
85
86 /**
87 Publish PEI core memory
88
89 @return EFI_SUCCESS The PEIM initialized successfully.
90
91 **/
92 EFI_STATUS
93 PublishPeiMemory (
94 VOID
95 )
96 {
97 EFI_STATUS Status;
98 EFI_PHYSICAL_ADDRESS MemoryBase;
99 UINT64 MemorySize;
100 UINT64 LowerMemorySize;
101
102 if (mBootMode == BOOT_ON_S3_RESUME) {
103 MemoryBase = PcdGet32 (PcdS3AcpiReservedMemoryBase);
104 MemorySize = PcdGet32 (PcdS3AcpiReservedMemorySize);
105 } else {
106 LowerMemorySize = GetSystemMemorySizeBelow4gb ();
107
108 //
109 // Determine the range of memory to use during PEI
110 //
111 MemoryBase = PcdGet32 (PcdOvmfDxeMemFvBase) + PcdGet32 (PcdOvmfDxeMemFvSize);
112 MemorySize = LowerMemorySize - MemoryBase;
113 if (MemorySize > SIZE_64MB) {
114 MemoryBase = LowerMemorySize - SIZE_64MB;
115 MemorySize = SIZE_64MB;
116 }
117 }
118
119 //
120 // Publish this memory to the PEI Core
121 //
122 Status = PublishSystemMemory(MemoryBase, MemorySize);
123 ASSERT_EFI_ERROR (Status);
124
125 return Status;
126 }
127
128
129 /**
130 Peform Memory Detection for QEMU / KVM
131
132 **/
133 STATIC
134 VOID
135 QemuInitializeRam (
136 VOID
137 )
138 {
139 UINT64 LowerMemorySize;
140 UINT64 UpperMemorySize;
141
142 DEBUG ((EFI_D_INFO, "%a called\n", __FUNCTION__));
143
144 //
145 // Determine total memory size available
146 //
147 LowerMemorySize = GetSystemMemorySizeBelow4gb ();
148 UpperMemorySize = GetSystemMemorySizeAbove4gb ();
149
150 if (mBootMode != BOOT_ON_S3_RESUME) {
151 //
152 // Create memory HOBs
153 //
154 AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
155 AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
156 }
157
158 MtrrSetMemoryAttribute (BASE_1MB, LowerMemorySize - BASE_1MB, CacheWriteBack);
159
160 MtrrSetMemoryAttribute (0, BASE_512KB + BASE_128KB, CacheWriteBack);
161
162 if (UpperMemorySize != 0) {
163 if (mBootMode != BOOT_ON_S3_RESUME) {
164 AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);
165 }
166
167 MtrrSetMemoryAttribute (BASE_4GB, UpperMemorySize, CacheWriteBack);
168 }
169 }
170
171 /**
172 Publish system RAM and reserve memory regions
173
174 **/
175 VOID
176 InitializeRamRegions (
177 VOID
178 )
179 {
180 if (!mXen) {
181 QemuInitializeRam ();
182 } else {
183 XenPublishRamRegions ();
184 }
185
186 if (mS3Supported && mBootMode != BOOT_ON_S3_RESUME) {
187 //
188 // This is the memory range that will be used for PEI on S3 resume
189 //
190 BuildMemoryAllocationHob (
191 (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdS3AcpiReservedMemoryBase),
192 (UINT64)(UINTN) PcdGet32 (PcdS3AcpiReservedMemorySize),
193 EfiACPIMemoryNVS
194 );
195
196 //
197 // Cover the initial RAM area used as stack and temporary PEI heap.
198 //
199 // This is reserved as ACPI NVS so it can be used on S3 resume.
200 //
201 BuildMemoryAllocationHob (
202 PcdGet32 (PcdOvmfSecPeiTempRamBase),
203 PcdGet32 (PcdOvmfSecPeiTempRamSize),
204 EfiACPIMemoryNVS
205 );
206 }
207 }