OvmfPkg/PlatformPei/Platform.c

   1 /**@file
   2   Platform PEI driver
   3
   4   Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
   5   Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>
   6
   7   This program and the accompanying materials
   8   are licensed and made available under the terms and conditions of the BSD License
   9   which accompanies this distribution.  The full text of the license may be found at
  10   http://opensource.org/licenses/bsd-license.php
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15 **/
  16
  17 //
  18 // The package level header files this module uses
  19 //
  20 #include <PiPei.h>
  21
  22 //
  23 // The Library classes this module consumes
  24 //
  25 #include <Library/DebugLib.h>
  26 #include <Library/HobLib.h>
  27 #include <Library/IoLib.h>
  28 #include <Library/MemoryAllocationLib.h>
  29 #include <Library/PcdLib.h>
  30 #include <Library/PciLib.h>
  31 #include <Library/PeimEntryPoint.h>
  32 #include <Library/PeiServicesLib.h>
  33 #include <Library/ResourcePublicationLib.h>
  34 #include <Guid/MemoryTypeInformation.h>
  35 #include <Ppi/MasterBootMode.h>
  36
  37 #include "Platform.h"
  38 #include "Cmos.h"
  39
  40 EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
  41   { EfiACPIMemoryNVS,       0x004 },
  42   { EfiACPIReclaimMemory,   0x008 },
  43   { EfiReservedMemoryType,  0x004 },
  44   { EfiRuntimeServicesData, 0x024 },
  45   { EfiRuntimeServicesCode, 0x030 },
  46   { EfiBootServicesCode,    0x180 },
  47   { EfiBootServicesData,    0xF00 },
  48   { EfiMaxMemoryType,       0x000 }
  49 };
  50
  51
  52 EFI_PEI_PPI_DESCRIPTOR   mPpiBootMode[] = {
  53   {
  54     EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
  55     &gEfiPeiMasterBootModePpiGuid,
  56     NULL
  57   }
  58 };
  59
  60
  61 VOID
  62 AddIoMemoryBaseSizeHob (
  63   EFI_PHYSICAL_ADDRESS        MemoryBase,
  64   UINT64                      MemorySize
  65   )
  66 {
  67   BuildResourceDescriptorHob (
  68     EFI_RESOURCE_MEMORY_MAPPED_IO,
  69       EFI_RESOURCE_ATTRIBUTE_PRESENT     |
  70       EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
  71       EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
  72       EFI_RESOURCE_ATTRIBUTE_TESTED,
  73     MemoryBase,
  74     MemorySize
  75     );
  76 }
  77
  78 VOID
  79 AddReservedMemoryBaseSizeHob (
  80   EFI_PHYSICAL_ADDRESS        MemoryBase,
  81   UINT64                      MemorySize
  82   )
  83 {
  84   BuildResourceDescriptorHob (
  85     EFI_RESOURCE_MEMORY_RESERVED,
  86       EFI_RESOURCE_ATTRIBUTE_PRESENT     |
  87       EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
  88       EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
  89       EFI_RESOURCE_ATTRIBUTE_TESTED,
  90     MemoryBase,
  91     MemorySize
  92     );
  93 }
  94
  95 VOID
  96 AddIoMemoryRangeHob (
  97   EFI_PHYSICAL_ADDRESS        MemoryBase,
  98   EFI_PHYSICAL_ADDRESS        MemoryLimit
  99   )
 100 {
 101   AddIoMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
 102 }
 103
 104
 105 VOID
 106 AddMemoryBaseSizeHob (
 107   EFI_PHYSICAL_ADDRESS        MemoryBase,
 108   UINT64                      MemorySize
 109   )
 110 {
 111   BuildResourceDescriptorHob (
 112     EFI_RESOURCE_SYSTEM_MEMORY,
 113       EFI_RESOURCE_ATTRIBUTE_PRESENT |
 114       EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
 115       EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
 116       EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
 117       EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
 118       EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
 119       EFI_RESOURCE_ATTRIBUTE_TESTED,
 120     MemoryBase,
 121     MemorySize
 122     );
 123 }
 124
 125
 126 VOID
 127 AddMemoryRangeHob (
 128   EFI_PHYSICAL_ADDRESS        MemoryBase,
 129   EFI_PHYSICAL_ADDRESS        MemoryLimit
 130   )
 131 {
 132   AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
 133 }
 134
 135
 136 VOID
 137 AddUntestedMemoryBaseSizeHob (
 138   EFI_PHYSICAL_ADDRESS        MemoryBase,
 139   UINT64                      MemorySize
 140   )
 141 {
 142   BuildResourceDescriptorHob (
 143     EFI_RESOURCE_SYSTEM_MEMORY,
 144       EFI_RESOURCE_ATTRIBUTE_PRESENT |
 145       EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
 146       EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
 147       EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
 148       EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
 149       EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE,
 150     MemoryBase,
 151     MemorySize
 152     );
 153 }
 154
 155
 156 VOID
 157 AddUntestedMemoryRangeHob (
 158   EFI_PHYSICAL_ADDRESS        MemoryBase,
 159   EFI_PHYSICAL_ADDRESS        MemoryLimit
 160   )
 161 {
 162   AddUntestedMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
 163 }
 164
 165
 166 VOID
 167 MemMapInitialization (
 168   EFI_PHYSICAL_ADDRESS  TopOfMemory
 169   )
 170 {
 171   //
 172   // Create Memory Type Information HOB
 173   //
 174   BuildGuidDataHob (
 175     &gEfiMemoryTypeInformationGuid,
 176     mDefaultMemoryTypeInformation,
 177     sizeof(mDefaultMemoryTypeInformation)
 178     );
 179
 180   //
 181   // Add PCI IO Port space available for PCI resource allocations.
 182   //
 183   BuildResourceDescriptorHob (
 184     EFI_RESOURCE_IO,
 185     EFI_RESOURCE_ATTRIBUTE_PRESENT     |
 186     EFI_RESOURCE_ATTRIBUTE_INITIALIZED,
 187     0xC000,
 188     0x4000
 189     );
 190
 191   //
 192   // Video memory + Legacy BIOS region
 193   //
 194   AddIoMemoryRangeHob (0x0A0000, BASE_1MB);
 195
 196   //
 197   // address       purpose   size
 198   // ------------  --------  -------------------------
 199   // max(top, 2g)  PCI MMIO  0xFC000000 - max(top, 2g)
 200   // 0xFC000000    gap                           44 MB
 201   // 0xFEC00000    IO-APIC                        4 KB
 202   // 0xFEC01000    gap                         1020 KB
 203   // 0xFED00000    HPET                           1 KB
 204   // 0xFED00400    gap                         1023 KB
 205   // 0xFEE00000    LAPIC                          1 MB
 206   //
 207   AddIoMemoryRangeHob (TopOfMemory < BASE_2GB ? BASE_2GB : TopOfMemory, 0xFC000000);
 208   AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_4KB);
 209   AddIoMemoryBaseSizeHob (0xFED00000, SIZE_1KB);
 210   AddIoMemoryBaseSizeHob (PcdGet32(PcdCpuLocalApicBaseAddress), SIZE_1MB);
 211 }
 212
 213
 214 VOID
 215 MiscInitialization (
 216   BOOLEAN Xen
 217   )
 218 {
 219   //
 220   // Disable A20 Mask
 221   //
 222   IoOr8 (0x92, BIT1);
 223
 224   //
 225   // Build the CPU hob with 36-bit addressing and 16-bits of IO space.
 226   //
 227   BuildCpuHob (36, 16);
 228
 229   if (!Xen) {
 230     //
 231     // Set the PM I/O base address to 0x400
 232     //
 233     PciAndThenOr32 (PCI_LIB_ADDRESS (0, 1, 3, 0x40), (UINT32) ~0xfc0, 0x400);
 234   }
 235 }
 236
 237
 238 VOID
 239 BootModeInitialization (
 240   )
 241 {
 242   EFI_STATUS Status;
 243
 244   Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);
 245   ASSERT_EFI_ERROR (Status);
 246
 247   Status = PeiServicesInstallPpi (mPpiBootMode);
 248   ASSERT_EFI_ERROR (Status);
 249 }
 250
 251
 252 VOID
 253 ReserveEmuVariableNvStore (
 254   )
 255 {
 256   EFI_PHYSICAL_ADDRESS VariableStore;
 257
 258   //
 259   // Allocate storage for NV variables early on so it will be
 260   // at a consistent address.  Since VM memory is preserved
 261   // across reboots, this allows the NV variable storage to survive
 262   // a VM reboot.
 263   //
 264   VariableStore =
 265     (EFI_PHYSICAL_ADDRESS)(UINTN)
 266       AllocateRuntimePool (
 267         2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)
 268         );
 269   DEBUG ((EFI_D_INFO,
 270           "Reserved variable store memory: 0x%lX; size: %dkb\n",
 271           VariableStore,
 272           (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / 1024
 273         ));
 274   PcdSet64 (PcdEmuVariableNvStoreReserved, VariableStore);
 275 }
 276
 277
 278 VOID
 279 DebugDumpCmos (
 280   VOID
 281   )
 282 {
 283   UINTN  Loop;
 284
 285   DEBUG ((EFI_D_INFO, "CMOS:\n"));
 286
 287   for (Loop = 0; Loop < 0x80; Loop++) {
 288     if ((Loop % 0x10) == 0) {
 289       DEBUG ((EFI_D_INFO, "%02x:", Loop));
 290     }
 291     DEBUG ((EFI_D_INFO, " %02x", CmosRead8 (Loop)));
 292     if ((Loop % 0x10) == 0xf) {
 293       DEBUG ((EFI_D_INFO, "\n"));
 294     }
 295   }
 296 }
 297
 298
 299 /**
 300   Perform Platform PEI initialization.
 301
 302   @param  FileHandle      Handle of the file being invoked.
 303   @param  PeiServices     Describes the list of possible PEI Services.
 304
 305   @return EFI_SUCCESS     The PEIM initialized successfully.
 306
 307 **/
 308 EFI_STATUS
 309 EFIAPI
 310 InitializePlatform (
 311   IN       EFI_PEI_FILE_HANDLE  FileHandle,
 312   IN CONST EFI_PEI_SERVICES     **PeiServices
 313   )
 314 {
 315   EFI_STATUS            Status;
 316   EFI_PHYSICAL_ADDRESS  TopOfMemory;
 317   BOOLEAN               Xen;
 318
 319   DEBUG ((EFI_D_ERROR, "Platform PEIM Loaded\n"));
 320
 321   DebugDumpCmos ();
 322
 323   TopOfMemory = MemDetect ();
 324
 325   Status = InitializeXen ();
 326   Xen = EFI_ERROR (Status) ? FALSE : TRUE;
 327
 328   ReserveEmuVariableNvStore ();
 329
 330   PeiFvInitialization ();
 331
 332   MemMapInitialization (TopOfMemory);
 333
 334   MiscInitialization (Xen);
 335
 336   BootModeInitialization ();
 337
 338   return EFI_SUCCESS;
 339 }