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[mirror_edk2.git] / PcAtChipsetPkg / PcAtChipsetPkg.dec
1 ## @file
2 # Public definitions for PcAtChipset package.
3 #
4 # This package is designed to public interfaces and implementation which follows
5 # PcAt defacto standard.
6 #
7 # Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
8 # Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
9 # Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.<BR>
10 #
11 # SPDX-License-Identifier: BSD-2-Clause-Patent
12 #
13 ##
14
15 [Defines]
16 DEC_SPECIFICATION = 0x00010005
17 PACKAGE_NAME = PcAtChipsetPkg
18 PACKAGE_UNI_FILE = PcAtChipsetPkg.uni
19 PACKAGE_GUID = B728689A-52D3-4b8c-AE89-2CE5514CC6DC
20 PACKAGE_VERSION = 0.3
21
22 [Includes]
23 Include
24
25 [LibraryClasses]
26 ## @libraryclass Provides functions to manage I/O APIC Redirection Table Entries.
27 #
28 IoApicLib|Include/Library/IoApicLib.h
29
30 [Guids]
31 gPcAtChipsetPkgTokenSpaceGuid = { 0x326ae723, 0xae32, 0x4589, { 0x98, 0xb8, 0xca, 0xc2, 0x3c, 0xdc, 0xc1, 0xb1 } }
32
33 #
34 # [Error.gPcAtChipsetPkgTokenSpaceGuid]
35 # 0x80000001 | Invalid value provided.
36 #
37
38 [PcdsFeatureFlag]
39 ## Indicates the HPET Timer will be configured to use MSI interrupts if the HPET timer supports them, or use I/O APIC interrupts.<BR><BR>
40 # TRUE - Configures the HPET Timer to use MSI interrupts if the HPET Timer supports them.<BR>
41 # FALSE - Configures the HPET Timer to use I/O APIC interrupts.<BR>
42 # @Prompt Configure HPET to use MSI.
43 gPcAtChipsetPkgTokenSpaceGuid.PcdHpetMsiEnable|TRUE|BOOLEAN|0x00001000
44
45 ## Indicates the RTC port registers are in MMIO space, or in I/O space.
46 # Default is I/O space.<BR><BR>
47 # TRUE - RTC port registers are in MMIO space.<BR>
48 # FALSE - RTC port registers are in I/O space.<BR>
49 # @Prompt RTC port registers use MMIO.
50 gPcAtChipsetPkgTokenSpaceGuid.PcdRtcUseMmio|FALSE|BOOLEAN|0x00000021
51
52 [PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]
53 ## This PCD specifies the base address of the HPET timer.
54 # @Prompt HPET base address.
55 gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress|0xFED00000|UINT32|0x00000009
56
57 ## This PCD specifies the Local APIC Interrupt Vector for the HPET Timer.
58 # @Prompt HPET local APIC vector.
59 gPcAtChipsetPkgTokenSpaceGuid.PcdHpetLocalApicVector|0x40|UINT8|0x0000000A
60
61 ## This PCD specifies the default period of the HPET Timer in 100 ns units.
62 # The default value of 100000 100 ns units is the same as 10 ms.
63 # @Prompt Default period of HPET timer.
64 gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT64|0x0000000B
65
66 ## This PCD specifies the base address of the IO APIC.
67 # @Prompt IO APIC base address.
68 gPcAtChipsetPkgTokenSpaceGuid.PcdIoApicBaseAddress|0xFEC00000|UINT32|0x0000000C
69
70 ## This PCD specifies the minimal valid year in RTC.
71 # @Prompt Minimal valid year in RTC.
72 gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear|1998|UINT16|0x0000000D
73
74 ## This PCD specifies the maximal valid year in RTC.
75 # @Prompt Maximal valid year in RTC.
76 # @Expression 0x80000001 | gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear < gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear + 100
77 gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear|2097|UINT16|0x0000000E
78
79 ## Specifies RTC Index Register address in MMIO space.
80 # @Prompt RTC Index Register address
81 gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister64|0x0|UINT64|0x00000022
82
83 ## Specifies RTC Target Register address in MMIO space.
84 # @Prompt RTC Target Register address
85 gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister64|0x0|UINT64|0x00000023
86
87 [PcdsFixedAtBuild, PcdsPatchableInModule]
88 ## Defines the ACPI register set base address.
89 # The invalid 0xFFFF is as its default value. It must be configured to the real value.
90 # @Prompt ACPI Timer IO Port Address
91 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress |0xFFFF|UINT16|0x00000010
92
93 ## Defines the PCI Bus Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
94 # @Prompt ACPI Hardware PCI Bus Number
95 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber | 0x00| UINT8|0x00000011
96
97 ## Defines the PCI Device Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
98 # The invalid 0xFF is as its default value. It must be configured to the real value.
99 # @Prompt ACPI Hardware PCI Device Number
100 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber | 0xFF| UINT8|0x00000012
101
102 ## Defines the PCI Function Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
103 # The invalid 0xFF is as its default value. It must be configured to the real value.
104 # @Prompt ACPI Hardware PCI Function Number
105 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber | 0xFF| UINT8|0x00000013
106
107 ## Defines the PCI Register Offset of the PCI device that contains the Enable for ACPI hardware registers.
108 # The invalid 0xFFFF is as its default value. It must be configured to the real value.
109 # @Prompt ACPI Hardware PCI Register Offset
110 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset |0xFFFF|UINT16|0x00000014
111
112 ## Defines the bit mask that must be set to enable the APIC hardware register BAR.
113 # @Prompt ACPI Hardware PCI Bar Enable BitMask
114 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask | 0x00| UINT8|0x00000015
115
116 ## Defines the PCI Register Offset of the PCI device that contains the BAR for ACPI hardware registers.
117 # The invalid 0xFFFF is as its default value. It must be configured to the real value.
118 # @Prompt ACPI Hardware PCI Bar Register Offset
119 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset |0xFFFF|UINT16|0x00000016
120
121 ## Defines the offset to the 32-bit Timer Value register that resides within the ACPI BAR.
122 # @Prompt Offset to 32-bit Timer register in ACPI BAR
123 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset |0x0008|UINT16|0x00000017
124
125 ## Defines the bit mask to retrieve ACPI IO Port Base Address
126 # @Prompt ACPI IO Port Base Address Mask
127 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask |0xFFFE|UINT16|0x00000018
128
129 ## Reset Control Register address in I/O space.
130 # @Prompt Reset Control Register address
131 gPcAtChipsetPkgTokenSpaceGuid.PcdResetControlRegister|0x64|UINT64|0x00000019
132
133 ## 8bit Reset Control Register value for cold reset.
134 # @Prompt Reset Control Register value for cold reset
135 gPcAtChipsetPkgTokenSpaceGuid.PcdResetControlValueColdReset|0xFE|UINT8|0x0000001A
136
137 ## Specifies the initial value for Register_A in RTC.
138 # @Prompt Initial value for Register_A in RTC.
139 gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterA|0x26|UINT8|0x0000001B
140
141 ## Specifies the initial value for Register_B in RTC.
142 # @Prompt Initial value for Register_B in RTC.
143 gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterB|0x02|UINT8|0x0000001C
144
145 ## Specifies the initial value for Register_D in RTC.
146 # @Prompt Initial value for Register_D in RTC.
147 gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD|0x00|UINT8|0x0000001D
148
149 ## Specifies RTC Index Register address in I/O space.
150 # @Prompt RTC Index Register address
151 gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|0x70|UINT8|0x0000001E
152
153 ## Specifies RTC Target Register address in I/O space.
154 # @Prompt RTC Target Register address
155 gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|0x71|UINT8|0x0000001F
156
157 ## RTC Update Timeout Value(microsecond).
158 # @Prompt RTC Update Timeout Value.
159 gPcAtChipsetPkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout|100000|UINT32|0x00000020
160
161 [UserExtensions.TianoCore."ExtraFiles"]
162 PcAtChipsetPkgExtra.uni