PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c

   1 /** @file
   2   Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation
   3
   4 Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
   5 This program and the accompanying materials are
   6 licensed and made available under the terms and conditions of the BSD License
   7 which accompanies this distribution.  The full text of the license may be found at
   8 http://opensource.org/licenses/bsd-license.php
   9
  10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #include "PciHostBridge.h"
  16
  17 //
  18 // Hard code: Root Bridge Number within the host bridge
  19 //            Root Bridge's attribute
  20 //            Root Bridge's device path
  21 //            Root Bridge's resource appeture
  22 //
  23 UINTN RootBridgeNumber[1] = { 1 };
  24
  25 UINT64 RootBridgeAttribute[1][1] = { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM };
  26
  27 EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {
  28   {
  29     ACPI_DEVICE_PATH,
  30     ACPI_DP,
  31     (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
  32     (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8),
  33     EISA_PNP_ID(0x0A03),
  34     0,
  35     END_DEVICE_PATH_TYPE,
  36     END_ENTIRE_DEVICE_PATH_SUBTYPE,
  37     END_DEVICE_PATH_LENGTH,
  38     0
  39   }
  40 };
  41
  42 PCI_ROOT_BRIDGE_RESOURCE_APPETURE  mResAppeture[1][1] = {
  43   {0, 0xff, 0x80000000, 0xffffffff, 0, 0xffff}
  44 };
  45
  46 EFI_HANDLE mDriverImageHandle;
  47
  48 PCI_HOST_BRIDGE_INSTANCE mPciHostBridgeInstanceTemplate = {
  49   PCI_HOST_BRIDGE_SIGNATURE,  // Signature
  50   NULL,                       // HostBridgeHandle
  51   0,                          // RootBridgeNumber
  52   {NULL, NULL},               // Head
  53   FALSE,                      // ResourceSubiteed
  54   TRUE,                       // CanRestarted
  55   {
  56     NotifyPhase,
  57     GetNextRootBridge,
  58     GetAttributes,
  59     StartBusEnumeration,
  60     SetBusNumbers,
  61     SubmitResources,
  62     GetProposedResources,
  63     PreprocessController
  64   }
  65 };
  66
  67 //
  68 // Implementation
  69 //
  70
  71 /**
  72   Entry point of this driver
  73
  74   @param ImageHandle     Handle of driver image
  75   @param SystemTable     Point to EFI_SYSTEM_TABLE
  76
  77   @retval EFI_OUT_OF_RESOURCES  Can not allocate memory resource
  78   @retval EFI_DEVICE_ERROR      Can not install the protocol instance
  79   @retval EFI_SUCCESS           Success to initialize the Pci host bridge.
  80 **/
  81 EFI_STATUS
  82 EFIAPI
  83 InitializePciHostBridge (
  84   IN EFI_HANDLE        ImageHandle,
  85   IN EFI_SYSTEM_TABLE  *SystemTable
  86   )
  87 {
  88   EFI_STATUS                  Status;
  89   UINTN                       Loop1;
  90   UINTN                       Loop2;
  91   PCI_HOST_BRIDGE_INSTANCE    *HostBridge;
  92   PCI_ROOT_BRIDGE_INSTANCE    *PrivateData;
  93
  94   mDriverImageHandle = ImageHandle;
  95
  96   //
  97   // Create Host Bridge Device Handle
  98   //
  99   for (Loop1 = 0; Loop1 < HOST_BRIDGE_NUMBER; Loop1++) {
 100     HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE), &mPciHostBridgeInstanceTemplate);
 101     if (HostBridge == NULL) {
 102       return EFI_OUT_OF_RESOURCES;
 103     }
 104
 105     HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];
 106     InitializeListHead (&HostBridge->Head);
 107
 108     Status = gBS->InstallMultipleProtocolInterfaces (
 109                     &HostBridge->HostBridgeHandle,
 110                     &gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,
 111                     NULL
 112                     );
 113     if (EFI_ERROR (Status)) {
 114       FreePool (HostBridge);
 115       return EFI_DEVICE_ERROR;
 116     }
 117
 118     //
 119     // Create Root Bridge Device Handle in this Host Bridge
 120     //
 121
 122     for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {
 123       PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));
 124       if (PrivateData == NULL) {
 125         return EFI_OUT_OF_RESOURCES;
 126       }
 127
 128       PrivateData->Signature = PCI_ROOT_BRIDGE_SIGNATURE;
 129       PrivateData->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];
 130
 131       RootBridgeConstructor (
 132         &PrivateData->Io,
 133         HostBridge->HostBridgeHandle,
 134         RootBridgeAttribute[Loop1][Loop2],
 135         &mResAppeture[Loop1][Loop2]
 136         );
 137
 138       Status = gBS->InstallMultipleProtocolInterfaces(
 139                       &PrivateData->Handle,
 140                       &gEfiDevicePathProtocolGuid,      PrivateData->DevicePath,
 141                       &gEfiPciRootBridgeIoProtocolGuid, &PrivateData->Io,
 142                       NULL
 143                       );
 144       if (EFI_ERROR (Status)) {
 145         FreePool(PrivateData);
 146         return EFI_DEVICE_ERROR;
 147       }
 148
 149       InsertTailList (&HostBridge->Head, &PrivateData->Link);
 150     }
 151   }
 152
 153   return EFI_SUCCESS;
 154 }
 155
 156
 157 /**
 158    These are the notifications from the PCI bus driver that it is about to enter a certain
 159    phase of the PCI enumeration process.
 160
 161    This member function can be used to notify the host bridge driver to perform specific actions,
 162    including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
 163    Eight notification points are defined at this time. See belows:
 164    EfiPciHostBridgeBeginEnumeration       Resets the host bridge PCI apertures and internal data
 165                                           structures. The PCI enumerator should issue this notification
 166                                           before starting a fresh enumeration process. Enumeration cannot
 167                                           be restarted after sending any other notification such as
 168                                           EfiPciHostBridgeBeginBusAllocation.
 169    EfiPciHostBridgeBeginBusAllocation     The bus allocation phase is about to begin. No specific action is
 170                                           required here. This notification can be used to perform any
 171                                           chipset-specific programming.
 172    EfiPciHostBridgeEndBusAllocation       The bus allocation and bus programming phase is complete. No
 173                                           specific action is required here. This notification can be used to
 174                                           perform any chipset-specific programming.
 175    EfiPciHostBridgeBeginResourceAllocation
 176                                           The resource allocation phase is about to begin. No specific
 177                                           action is required here. This notification can be used to perform
 178                                           any chipset-specific programming.
 179    EfiPciHostBridgeAllocateResources      Allocates resources per previously submitted requests for all the PCI
 180                                           root bridges. These resource settings are returned on the next call to
 181                                           GetProposedResources(). Before calling NotifyPhase() with a Phase of
 182                                           EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
 183                                           for gathering I/O and memory requests for
 184                                           all the PCI root bridges and submitting these requests using
 185                                           SubmitResources(). This function pads the resource amount
 186                                           to suit the root bridge hardware, takes care of dependencies between
 187                                           the PCI root bridges, and calls the Global Coherency Domain (GCD)
 188                                           with the allocation request. In the case of padding, the allocated range
 189                                           could be bigger than what was requested.
 190    EfiPciHostBridgeSetResources           Programs the host bridge hardware to decode previously allocated
 191                                           resources (proposed resources) for all the PCI root bridges. After the
 192                                           hardware is programmed, reassigning resources will not be supported.
 193                                           The bus settings are not affected.
 194    EfiPciHostBridgeFreeResources          Deallocates resources that were previously allocated for all the PCI
 195                                           root bridges and resets the I/O and memory apertures to their initial
 196                                           state. The bus settings are not affected. If the request to allocate
 197                                           resources fails, the PCI enumerator can use this notification to
 198                                           deallocate previous resources, adjust the requests, and retry
 199                                           allocation.
 200    EfiPciHostBridgeEndResourceAllocation  The resource allocation phase is completed. No specific action is
 201                                           required here. This notification can be used to perform any chipsetspecific
 202                                           programming.
 203
 204    @param[in] This                The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 205    @param[in] Phase               The phase during enumeration
 206
 207    @retval EFI_NOT_READY          This phase cannot be entered at this time. For example, this error
 208                                   is valid for a Phase of EfiPciHostBridgeAllocateResources if
 209                                   SubmitResources() has not been called for one or more
 210                                   PCI root bridges before this call
 211    @retval EFI_DEVICE_ERROR       Programming failed due to a hardware error. This error is valid
 212                                   for a Phase of EfiPciHostBridgeSetResources.
 213    @retval EFI_INVALID_PARAMETER  Invalid phase parameter
 214    @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 215                                   This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the
 216                                   previously submitted resource requests cannot be fulfilled or
 217                                   were only partially fulfilled.
 218    @retval EFI_SUCCESS            The notification was accepted without any errors.
 219
 220 **/
 221 EFI_STATUS
 222 EFIAPI
 223 NotifyPhase(
 224   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 225   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE    Phase
 226   )
 227 {
 228   PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
 229   PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
 230   PCI_RESOURCE_TYPE                     Index;
 231   LIST_ENTRY                            *List;
 232   EFI_PHYSICAL_ADDRESS                  BaseAddress;
 233   UINT64                                AddrLen;
 234   UINTN                                 BitsOfAlignment;
 235   EFI_STATUS                            Status;
 236   EFI_STATUS                            ReturnStatus;
 237
 238   HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
 239
 240   switch (Phase) {
 241
 242   case EfiPciHostBridgeBeginEnumeration:
 243     if (HostBridgeInstance->CanRestarted) {
 244       //
 245       // Reset the Each Root Bridge
 246       //
 247       List = HostBridgeInstance->Head.ForwardLink;
 248
 249       while (List != &HostBridgeInstance->Head) {
 250         RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
 251         for (Index = TypeIo; Index < TypeMax; Index++) {
 252           RootBridgeInstance->ResAllocNode[Index].Type      = Index;
 253           RootBridgeInstance->ResAllocNode[Index].Base      = 0;
 254           RootBridgeInstance->ResAllocNode[Index].Length    = 0;
 255           RootBridgeInstance->ResAllocNode[Index].Status    = ResNone;
 256         }
 257
 258         List = List->ForwardLink;
 259       }
 260
 261       HostBridgeInstance->ResourceSubmited = FALSE;
 262       HostBridgeInstance->CanRestarted     = TRUE;
 263     } else {
 264       //
 265       // Can not restart
 266       //
 267       return EFI_NOT_READY;
 268     }
 269     break;
 270
 271   case EfiPciHostBridgeBeginBusAllocation:
 272     //
 273     // No specific action is required here, can perform any chipset specific programing
 274     //
 275     HostBridgeInstance->CanRestarted = FALSE;
 276     return EFI_SUCCESS;
 277     break;
 278
 279   case EfiPciHostBridgeEndBusAllocation:
 280     //
 281     // No specific action is required here, can perform any chipset specific programing
 282     //
 283     //HostBridgeInstance->CanRestarted = FALSE;
 284     return EFI_SUCCESS;
 285     break;
 286
 287   case EfiPciHostBridgeBeginResourceAllocation:
 288     //
 289     // No specific action is required here, can perform any chipset specific programing
 290     //
 291     //HostBridgeInstance->CanRestarted = FALSE;
 292     return EFI_SUCCESS;
 293     break;
 294
 295   case EfiPciHostBridgeAllocateResources:
 296     ReturnStatus = EFI_SUCCESS;
 297     if (HostBridgeInstance->ResourceSubmited) {
 298       //
 299       // Take care of the resource dependencies between the root bridges
 300       //
 301       List = HostBridgeInstance->Head.ForwardLink;
 302
 303       while (List != &HostBridgeInstance->Head) {
 304         RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
 305         for (Index = TypeIo; Index < TypeBus; Index++) {
 306           if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
 307
 308             AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
 309
 310             //
 311             // Get the number of '1' in Alignment.
 312             //
 313             BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);
 314
 315             switch (Index) {
 316
 317               case TypeIo:
 318                 //
 319                 // It is impossible for this chipset to align 0xFFFF for IO16
 320                 // So clear it
 321                 //
 322                 if (BitsOfAlignment >= 16) {
 323                   BitsOfAlignment = 0;
 324                 }
 325
 326                 Status = gDS->AllocateIoSpace (
 327                                 EfiGcdAllocateAnySearchBottomUp,
 328                                 EfiGcdIoTypeIo,
 329                                 BitsOfAlignment,
 330                                 AddrLen,
 331                                 &BaseAddress,
 332                                 mDriverImageHandle,
 333                                 NULL
 334                                 );
 335
 336                 if (!EFI_ERROR (Status)) {
 337                   RootBridgeInstance->ResAllocNode[Index].Base   = (UINTN)BaseAddress;
 338                   RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
 339                 } else {
 340                   ReturnStatus = Status;
 341                   if (Status != EFI_OUT_OF_RESOURCES) {
 342                     RootBridgeInstance->ResAllocNode[Index].Length = 0;
 343                   }
 344                 }
 345
 346                 break;
 347
 348
 349               case TypeMem32:
 350                 //
 351                 // It is impossible for this chipset to align 0xFFFFFFFF for Mem32
 352                 // So clear it
 353                 //
 354
 355                 if (BitsOfAlignment >= 32) {
 356                   BitsOfAlignment = 0;
 357                 }
 358
 359                 Status = gDS->AllocateMemorySpace (
 360                                 EfiGcdAllocateAnySearchBottomUp,
 361                                 EfiGcdMemoryTypeMemoryMappedIo,
 362                                 BitsOfAlignment,
 363                                 AddrLen,
 364                                 &BaseAddress,
 365                                 mDriverImageHandle,
 366                                 NULL
 367                                 );
 368
 369                 if (!EFI_ERROR (Status)) {
 370                   // We were able to allocate the PCI memory
 371                   RootBridgeInstance->ResAllocNode[Index].Base   = (UINTN)BaseAddress;
 372                   RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
 373
 374                 } else {
 375                   // Not able to allocate enough PCI memory
 376                   ReturnStatus = Status;
 377
 378                   if (Status != EFI_OUT_OF_RESOURCES) {
 379                     RootBridgeInstance->ResAllocNode[Index].Length = 0;
 380                   }
 381                   ASSERT (FALSE);
 382                 }
 383                 break;
 384
 385               case TypePMem32:
 386               case TypeMem64:
 387               case TypePMem64:
 388                   ReturnStatus = EFI_ABORTED;
 389                   break;
 390               default:
 391                 ASSERT (FALSE);
 392                 break;
 393               }; //end switch
 394           }
 395         }
 396
 397         List = List->ForwardLink;
 398       }
 399
 400       return ReturnStatus;
 401
 402     } else {
 403       return EFI_NOT_READY;
 404     }
 405     break;
 406
 407   case EfiPciHostBridgeSetResources:
 408     break;
 409
 410   case EfiPciHostBridgeFreeResources:
 411     ReturnStatus = EFI_SUCCESS;
 412     List = HostBridgeInstance->Head.ForwardLink;
 413     while (List != &HostBridgeInstance->Head) {
 414       RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
 415       for (Index = TypeIo; Index < TypeBus; Index++) {
 416         if (RootBridgeInstance->ResAllocNode[Index].Status == ResAllocated) {
 417           AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
 418           BaseAddress = RootBridgeInstance->ResAllocNode[Index].Base;
 419           switch (Index) {
 420
 421           case TypeIo:
 422             Status = gDS->FreeIoSpace (BaseAddress, AddrLen);
 423             if (EFI_ERROR (Status)) {
 424               ReturnStatus = Status;
 425             }
 426             break;
 427
 428           case TypeMem32:
 429             Status = gDS->FreeMemorySpace (BaseAddress, AddrLen);
 430             if (EFI_ERROR (Status)) {
 431               ReturnStatus = Status;
 432             }
 433             break;
 434
 435           case TypePMem32:
 436             break;
 437
 438           case TypeMem64:
 439             break;
 440
 441           case TypePMem64:
 442             break;
 443
 444           default:
 445             ASSERT (FALSE);
 446             break;
 447
 448           }; //end switch
 449           RootBridgeInstance->ResAllocNode[Index].Type      = Index;
 450           RootBridgeInstance->ResAllocNode[Index].Base      = 0;
 451           RootBridgeInstance->ResAllocNode[Index].Length    = 0;
 452           RootBridgeInstance->ResAllocNode[Index].Status    = ResNone;
 453         }
 454       }
 455
 456       List = List->ForwardLink;
 457     }
 458
 459     HostBridgeInstance->ResourceSubmited = FALSE;
 460     HostBridgeInstance->CanRestarted     = TRUE;
 461     return ReturnStatus;
 462     break;
 463
 464   case EfiPciHostBridgeEndResourceAllocation:
 465     HostBridgeInstance->CanRestarted = FALSE;
 466     break;
 467
 468   default:
 469     return EFI_INVALID_PARAMETER;
 470   }; // end switch
 471
 472   return EFI_SUCCESS;
 473 }
 474
 475 /**
 476    Return the device handle of the next PCI root bridge that is associated with this Host Bridge.
 477
 478    This function is called multiple times to retrieve the device handles of all the PCI root bridges that
 479    are associated with this PCI host bridge. Each PCI host bridge is associated with one or more PCI
 480    root bridges. On each call, the handle that was returned by the previous call is passed into the
 481    interface, and on output the interface returns the device handle of the next PCI root bridge. The
 482    caller can use the handle to obtain the instance of the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
 483    for that root bridge. When there are no more PCI root bridges to report, the interface returns
 484    EFI_NOT_FOUND. A PCI enumerator must enumerate the PCI root bridges in the order that they
 485    are returned by this function.
 486    For D945 implementation, there is only one root bridge in PCI host bridge.
 487
 488    @param[in]       This              The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 489    @param[in, out]  RootBridgeHandle  Returns the device handle of the next PCI root bridge.
 490
 491    @retval EFI_SUCCESS            If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the
 492                                   specific Host bridge and return EFI_SUCCESS.
 493    @retval EFI_NOT_FOUND          Can not find the any more root bridge in specific host bridge.
 494    @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not an EFI_HANDLE that was
 495                                   returned on a previous call to GetNextRootBridge().
 496 **/
 497 EFI_STATUS
 498 EFIAPI
 499 GetNextRootBridge(
 500   IN       EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 501   IN OUT   EFI_HANDLE                                       *RootBridgeHandle
 502   )
 503 {
 504   BOOLEAN                               NoRootBridge;
 505   LIST_ENTRY                            *List;
 506   PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
 507   PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
 508
 509   NoRootBridge = TRUE;
 510   HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
 511   List = HostBridgeInstance->Head.ForwardLink;
 512
 513
 514   while (List != &HostBridgeInstance->Head) {
 515     NoRootBridge = FALSE;
 516     RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
 517     if (*RootBridgeHandle == NULL) {
 518       //
 519       // Return the first Root Bridge Handle of the Host Bridge
 520       //
 521       *RootBridgeHandle = RootBridgeInstance->Handle;
 522       return EFI_SUCCESS;
 523     } else {
 524       if (*RootBridgeHandle == RootBridgeInstance->Handle) {
 525         //
 526         // Get next if have
 527         //
 528         List = List->ForwardLink;
 529         if (List!=&HostBridgeInstance->Head) {
 530           RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
 531           *RootBridgeHandle = RootBridgeInstance->Handle;
 532           return EFI_SUCCESS;
 533         } else {
 534           return EFI_NOT_FOUND;
 535         }
 536       }
 537     }
 538
 539     List = List->ForwardLink;
 540   } //end while
 541
 542   if (NoRootBridge) {
 543     return EFI_NOT_FOUND;
 544   } else {
 545     return EFI_INVALID_PARAMETER;
 546   }
 547 }
 548
 549 /**
 550    Returns the allocation attributes of a PCI root bridge.
 551
 552    The function returns the allocation attributes of a specific PCI root bridge. The attributes can vary
 553    from one PCI root bridge to another. These attributes are different from the decode-related
 554    attributes that are returned by the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.GetAttributes() member function. The
 555    RootBridgeHandle parameter is used to specify the instance of the PCI root bridge. The device
 556    handles of all the root bridges that are associated with this host bridge must be obtained by calling
 557    GetNextRootBridge(). The attributes are static in the sense that they do not change during or
 558    after the enumeration process. The hardware may provide mechanisms to change the attributes on
 559    the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is
 560    installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in
 561    "Related Definitions" below. The caller uses these attributes to combine multiple resource requests.
 562    For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to
 563    include requests for the prefetchable memory in the nonprefetchable memory pool and not request any
 564    prefetchable memory.
 565       Attribute                                 Description
 566    ------------------------------------         ----------------------------------------------------------------------
 567    EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM         If this bit is set, then the PCI root bridge does not support separate
 568                                                 windows for nonprefetchable and prefetchable memory. A PCI bus
 569                                                 driver needs to include requests for prefetchable memory in the
 570                                                 nonprefetchable memory pool.
 571
 572    EFI_PCI_HOST_BRIDGE_MEM64_DECODE             If this bit is set, then the PCI root bridge supports 64-bit memory
 573                                                 windows. If this bit is not set, the PCI bus driver needs to include
 574                                                 requests for a 64-bit memory address in the corresponding 32-bit
 575                                                 memory pool.
 576
 577    @param[in]   This               The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 578    @param[in]   RootBridgeHandle   The device handle of the PCI root bridge in which the caller is interested. Type
 579                                    EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
 580    @param[out]  Attributes         The pointer to attribte of root bridge, it is output parameter
 581
 582    @retval EFI_INVALID_PARAMETER   Attribute pointer is NULL
 583    @retval EFI_INVALID_PARAMETER   RootBridgehandle is invalid.
 584    @retval EFI_SUCCESS             Success to get attribute of interested root bridge.
 585
 586 **/
 587 EFI_STATUS
 588 EFIAPI
 589 GetAttributes(
 590   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 591   IN  EFI_HANDLE                                       RootBridgeHandle,
 592   OUT UINT64                                           *Attributes
 593   )
 594 {
 595   LIST_ENTRY                            *List;
 596   PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
 597   PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
 598
 599   if (Attributes == NULL) {
 600     return EFI_INVALID_PARAMETER;
 601   }
 602
 603   HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
 604   List = HostBridgeInstance->Head.ForwardLink;
 605
 606   while (List != &HostBridgeInstance->Head) {
 607     RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
 608     if (RootBridgeHandle == RootBridgeInstance->Handle) {
 609       *Attributes = RootBridgeInstance->RootBridgeAttrib;
 610       return EFI_SUCCESS;
 611     }
 612     List = List->ForwardLink;
 613   }
 614
 615   //
 616   // RootBridgeHandle is not an EFI_HANDLE
 617   // that was returned on a previous call to GetNextRootBridge()
 618   //
 619   return EFI_INVALID_PARAMETER;
 620 }
 621
 622 /**
 623    Sets up the specified PCI root bridge for the bus enumeration process.
 624
 625    This member function sets up the root bridge for bus enumeration and returns the PCI bus range
 626    over which the search should be performed in ACPI 2.0 resource descriptor format.
 627
 628    @param[in]   This              The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.
 629    @param[in]   RootBridgeHandle  The PCI Root Bridge to be set up.
 630    @param[out]  Configuration     Pointer to the pointer to the PCI bus resource descriptor.
 631
 632    @retval EFI_INVALID_PARAMETER Invalid Root bridge's handle
 633    @retval EFI_OUT_OF_RESOURCES  Fail to allocate ACPI resource descriptor tag.
 634    @retval EFI_SUCCESS           Sucess to allocate ACPI resource descriptor.
 635
 636 **/
 637 EFI_STATUS
 638 EFIAPI
 639 StartBusEnumeration(
 640   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 641   IN  EFI_HANDLE                                       RootBridgeHandle,
 642   OUT VOID                                             **Configuration
 643   )
 644 {
 645   LIST_ENTRY                            *List;
 646   PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
 647   PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
 648   VOID                                  *Buffer;
 649   UINT8                                 *Temp;
 650   UINT64                                BusStart;
 651   UINT64                                BusEnd;
 652
 653   HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
 654   List = HostBridgeInstance->Head.ForwardLink;
 655
 656   while (List != &HostBridgeInstance->Head) {
 657     RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
 658     if (RootBridgeHandle == RootBridgeInstance->Handle) {
 659       //
 660       // Set up the Root Bridge for Bus Enumeration
 661       //
 662       BusStart = RootBridgeInstance->BusBase;
 663       BusEnd   = RootBridgeInstance->BusLimit;
 664       //
 665       // Program the Hardware(if needed) if error return EFI_DEVICE_ERROR
 666       //
 667
 668       Buffer = AllocatePool (sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
 669       if (Buffer == NULL) {
 670         return EFI_OUT_OF_RESOURCES;
 671       }
 672
 673       Temp = (UINT8 *)Buffer;
 674
 675       ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Desc = 0x8A;
 676       ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Len  = 0x2B;
 677       ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->ResType = 2;
 678       ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0;
 679       ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->SpecificFlag = 0;
 680       ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrSpaceGranularity = 0;
 681       ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMin = BusStart;
 682       ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMax = 0;
 683       ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0;
 684       ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen = BusEnd - BusStart + 1;
 685
 686       Temp = Temp + sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
 687       ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
 688       ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
 689
 690       *Configuration = Buffer;
 691       return EFI_SUCCESS;
 692     }
 693     List = List->ForwardLink;
 694   }
 695
 696   return EFI_INVALID_PARAMETER;
 697 }
 698
 699 /**
 700    Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.
 701
 702    This member function programs the specified PCI root bridge to decode the bus range that is
 703    specified by the input parameter Configuration.
 704    The bus range information is specified in terms of the ACPI 2.0 resource descriptor format.
 705
 706    @param[in] This              The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
 707    @param[in] RootBridgeHandle  The PCI Root Bridge whose bus range is to be programmed
 708    @param[in] Configuration     The pointer to the PCI bus resource descriptor
 709
 710    @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
 711    @retval EFI_INVALID_PARAMETER  Configuration is NULL.
 712    @retval EFI_INVALID_PARAMETER  Configuration does not point to a valid ACPI 2.0 resource descriptor.
 713    @retval EFI_INVALID_PARAMETER  Configuration does not include a valid ACPI 2.0 bus resource descriptor.
 714    @retval EFI_INVALID_PARAMETER  Configuration includes valid ACPI 2.0 resource descriptors other than
 715                                   bus descriptors.
 716    @retval EFI_INVALID_PARAMETER  Configuration contains one or more invalid ACPI resource descriptors.
 717    @retval EFI_INVALID_PARAMETER  "Address Range Minimum" is invalid for this root bridge.
 718    @retval EFI_INVALID_PARAMETER  "Address Range Length" is invalid for this root bridge.
 719    @retval EFI_DEVICE_ERROR       Programming failed due to a hardware error.
 720    @retval EFI_SUCCESS            The bus range for the PCI root bridge was programmed.
 721
 722 **/
 723 EFI_STATUS
 724 EFIAPI
 725 SetBusNumbers(
 726   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 727   IN EFI_HANDLE                                       RootBridgeHandle,
 728   IN VOID                                             *Configuration
 729   )
 730 {
 731   LIST_ENTRY                            *List;
 732   PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
 733   PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
 734   UINT8                                 *Ptr;
 735   UINTN                                 BusStart;
 736   UINTN                                 BusEnd;
 737   UINTN                                 BusLen;
 738
 739   if (Configuration == NULL) {
 740     return EFI_INVALID_PARAMETER;
 741   }
 742
 743   Ptr = Configuration;
 744
 745   //
 746   // Check the Configuration is valid
 747   //
 748   if(*Ptr != ACPI_ADDRESS_SPACE_DESCRIPTOR) {
 749     return EFI_INVALID_PARAMETER;
 750   }
 751
 752   if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != 2) {
 753     return EFI_INVALID_PARAMETER;
 754   }
 755
 756   Ptr += sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
 757   if (*Ptr != ACPI_END_TAG_DESCRIPTOR) {
 758     return EFI_INVALID_PARAMETER;
 759   }
 760
 761   HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
 762   List = HostBridgeInstance->Head.ForwardLink;
 763
 764   Ptr = Configuration;
 765
 766   while (List != &HostBridgeInstance->Head) {
 767     RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
 768     if (RootBridgeHandle == RootBridgeInstance->Handle) {
 769       BusStart = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMin;
 770       BusLen = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen;
 771       BusEnd = BusStart + BusLen - 1;
 772
 773       if (BusStart > BusEnd) {
 774         return EFI_INVALID_PARAMETER;
 775       }
 776
 777       if ((BusStart < RootBridgeInstance->BusBase) || (BusEnd > RootBridgeInstance->BusLimit)) {
 778         return EFI_INVALID_PARAMETER;
 779       }
 780
 781       //
 782       // Update the Bus Range
 783       //
 784       RootBridgeInstance->ResAllocNode[TypeBus].Base   = BusStart;
 785       RootBridgeInstance->ResAllocNode[TypeBus].Length = BusLen;
 786       RootBridgeInstance->ResAllocNode[TypeBus].Status = ResAllocated;
 787
 788       //
 789       // Program the Root Bridge Hardware
 790       //
 791
 792       return EFI_SUCCESS;
 793     }
 794
 795     List = List->ForwardLink;
 796   }
 797
 798   return EFI_INVALID_PARAMETER;
 799 }
 800
 801
 802 /**
 803    Submits the I/O and memory resource requirements for the specified PCI root bridge.
 804
 805    This function is used to submit all the I/O and memory resources that are required by the specified
 806    PCI root bridge. The input parameter Configuration is used to specify the following:
 807    - The various types of resources that are required
 808    - The associated lengths in terms of ACPI 2.0 resource descriptor format
 809
 810    @param[in] This              Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
 811    @param[in] RootBridgeHandle  The PCI root bridge whose I/O and memory resource requirements are being submitted.
 812    @param[in] Configuration     The pointer to the PCI I/O and PCI memory resource descriptor.
 813
 814    @retval EFI_SUCCESS            The I/O and memory resource requests for a PCI root bridge were accepted.
 815    @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
 816    @retval EFI_INVALID_PARAMETER  Configuration is NULL.
 817    @retval EFI_INVALID_PARAMETER  Configuration does not point to a valid ACPI 2.0 resource descriptor.
 818    @retval EFI_INVALID_PARAMETER  Configuration includes requests for one or more resource types that are
 819                                   not supported by this PCI root bridge. This error will happen if the caller
 820                                   did not combine resources according to Attributes that were returned by
 821                                   GetAllocAttributes().
 822    @retval EFI_INVALID_PARAMETER  Address Range Maximum" is invalid.
 823    @retval EFI_INVALID_PARAMETER  "Address Range Length" is invalid for this PCI root bridge.
 824    @retval EFI_INVALID_PARAMETER  "Address Space Granularity" is invalid for this PCI root bridge.
 825
 826 **/
 827 EFI_STATUS
 828 EFIAPI
 829 SubmitResources(
 830   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 831   IN EFI_HANDLE                                       RootBridgeHandle,
 832   IN VOID                                             *Configuration
 833   )
 834 {
 835   LIST_ENTRY                            *List;
 836   PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
 837   PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
 838   UINT8                                 *Temp;
 839   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR     *Ptr;
 840   UINT64                                AddrLen;
 841   UINT64                                Alignment;
 842
 843   //
 844   // Check the input parameter: Configuration
 845   //
 846   if (Configuration == NULL) {
 847     return EFI_INVALID_PARAMETER;
 848   }
 849
 850   HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
 851   List = HostBridgeInstance->Head.ForwardLink;
 852
 853   Temp = (UINT8 *)Configuration;
 854   while ( *Temp == 0x8A) {
 855     Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
 856   }
 857   if (*Temp != 0x79) {
 858     return EFI_INVALID_PARAMETER;
 859   }
 860
 861   Temp = (UINT8 *)Configuration;
 862   while (List != &HostBridgeInstance->Head) {
 863     RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
 864     if (RootBridgeHandle == RootBridgeInstance->Handle) {
 865       while ( *Temp == 0x8A) {
 866         Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
 867
 868         //
 869         // Check Address Length
 870         //
 871         if (Ptr->AddrLen > 0xffffffff) {
 872           return EFI_INVALID_PARAMETER;
 873         }
 874
 875         //
 876         // Check address range alignment
 877         //
 878         if (Ptr->AddrRangeMax >= 0xffffffff || Ptr->AddrRangeMax != (GetPowerOfTwo64 (Ptr->AddrRangeMax + 1) - 1)) {
 879           return EFI_INVALID_PARAMETER;
 880         }
 881
 882         switch (Ptr->ResType) {
 883
 884         case 0:
 885
 886           //
 887           // Check invalid Address Sapce Granularity
 888           //
 889           if (Ptr->AddrSpaceGranularity != 32) {
 890             return EFI_INVALID_PARAMETER;
 891           }
 892
 893           //
 894           // check the memory resource request is supported by PCI root bridge
 895           //
 896           if (RootBridgeInstance->RootBridgeAttrib == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&
 897                Ptr->SpecificFlag == 0x06) {
 898             return EFI_INVALID_PARAMETER;
 899           }
 900
 901           AddrLen = Ptr->AddrLen;
 902           Alignment = Ptr->AddrRangeMax;
 903           if (Ptr->AddrSpaceGranularity == 32) {
 904             if (Ptr->SpecificFlag == 0x06) {
 905               //
 906               // Apply from GCD
 907               //
 908               RootBridgeInstance->ResAllocNode[TypePMem32].Status = ResSubmitted;
 909             } else {
 910               RootBridgeInstance->ResAllocNode[TypeMem32].Length = AddrLen;
 911               RootBridgeInstance->ResAllocNode[TypeMem32].Alignment = Alignment;
 912               RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested;
 913               HostBridgeInstance->ResourceSubmited = TRUE;
 914             }
 915           }
 916
 917           if (Ptr->AddrSpaceGranularity == 64) {
 918             if (Ptr->SpecificFlag == 0x06) {
 919               RootBridgeInstance->ResAllocNode[TypePMem64].Status = ResSubmitted;
 920             } else {
 921               RootBridgeInstance->ResAllocNode[TypeMem64].Status = ResSubmitted;
 922             }
 923           }
 924           break;
 925
 926         case 1:
 927           AddrLen = (UINTN) Ptr->AddrLen;
 928           Alignment = (UINTN) Ptr->AddrRangeMax;
 929           RootBridgeInstance->ResAllocNode[TypeIo].Length  = AddrLen;
 930           RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;
 931           RootBridgeInstance->ResAllocNode[TypeIo].Status  = ResRequested;
 932           HostBridgeInstance->ResourceSubmited = TRUE;
 933           break;
 934
 935         default:
 936             break;
 937         };
 938
 939         Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
 940       }
 941
 942       return EFI_SUCCESS;
 943     }
 944
 945     List = List->ForwardLink;
 946   }
 947
 948   return EFI_INVALID_PARAMETER;
 949 }
 950
 951 /**
 952    Returns the proposed resource settings for the specified PCI root bridge.
 953
 954    This member function returns the proposed resource settings for the specified PCI root bridge. The
 955    proposed resource settings are prepared when NotifyPhase() is called with a Phase of
 956    EfiPciHostBridgeAllocateResources. The output parameter Configuration
 957    specifies the following:
 958    - The various types of resources, excluding bus resources, that are allocated
 959    - The associated lengths in terms of ACPI 2.0 resource descriptor format
 960
 961    @param[in]  This              Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
 962    @param[in]  RootBridgeHandle  The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
 963    @param[out] Configuration     The pointer to the pointer to the PCI I/O and memory resource descriptor.
 964
 965    @retval EFI_SUCCESS            The requested parameters were returned.
 966    @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
 967    @retval EFI_DEVICE_ERROR       Programming failed due to a hardware error.
 968    @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 969
 970 **/
 971 EFI_STATUS
 972 EFIAPI
 973 GetProposedResources(
 974   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 975   IN  EFI_HANDLE                                       RootBridgeHandle,
 976   OUT VOID                                             **Configuration
 977   )
 978 {
 979   LIST_ENTRY                            *List;
 980   PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
 981   PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
 982   UINTN                                 Index;
 983   UINTN                                 Number;
 984   VOID                                  *Buffer;
 985   UINT8                                 *Temp;
 986   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR     *Ptr;
 987   UINT64                                ResStatus;
 988
 989   Buffer = NULL;
 990   Number = 0;
 991   //
 992   // Get the Host Bridge Instance from the resource allocation protocol
 993   //
 994   HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
 995   List = HostBridgeInstance->Head.ForwardLink;
 996
 997   //
 998   // Enumerate the root bridges in this host bridge
 999   //
1000   while (List != &HostBridgeInstance->Head) {
1001     RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
1002     if (RootBridgeHandle == RootBridgeInstance->Handle) {
1003       for (Index = 0; Index < TypeBus; Index ++) {
1004         if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
1005           Number ++;
1006         }
1007       }
1008
1009       if (Number ==  0) {
1010         return EFI_INVALID_PARAMETER;
1011       }
1012
1013       Buffer = AllocateZeroPool (Number * sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
1014       if (Buffer == NULL) {
1015         return EFI_OUT_OF_RESOURCES;
1016       }
1017
1018       Temp = Buffer;
1019       for (Index = 0; Index < TypeBus; Index ++) {
1020         if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
1021           Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
1022           ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;
1023
1024           switch (Index) {
1025
1026           case TypeIo:
1027             //
1028             // Io
1029             //
1030             Ptr->Desc = 0x8A;
1031             Ptr->Len  = 0x2B;
1032             Ptr->ResType = 1;
1033             Ptr->GenFlag = 0;
1034             Ptr->SpecificFlag = 0;
1035             Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
1036             Ptr->AddrRangeMax = 0;
1037             Ptr->AddrTranslationOffset = \
1038                  (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
1039             Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
1040             break;
1041
1042           case TypeMem32:
1043             //
1044             // Memory 32
1045             //
1046             Ptr->Desc = 0x8A;
1047             Ptr->Len  = 0x2B;
1048             Ptr->ResType = 0;
1049             Ptr->GenFlag = 0;
1050             Ptr->SpecificFlag = 0;
1051             Ptr->AddrSpaceGranularity = 32;
1052             Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
1053             Ptr->AddrRangeMax = 0;
1054             Ptr->AddrTranslationOffset = \
1055                  (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
1056             Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
1057             break;
1058
1059           case TypePMem32:
1060             //
1061             // Prefetch memory 32
1062             //
1063             Ptr->Desc = 0x8A;
1064             Ptr->Len  = 0x2B;
1065             Ptr->ResType = 0;
1066             Ptr->GenFlag = 0;
1067             Ptr->SpecificFlag = 6;
1068             Ptr->AddrSpaceGranularity = 32;
1069             Ptr->AddrRangeMin = 0;
1070             Ptr->AddrRangeMax = 0;
1071             Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1072             Ptr->AddrLen = 0;
1073             break;
1074
1075           case TypeMem64:
1076             //
1077             // Memory 64
1078             //
1079             Ptr->Desc = 0x8A;
1080             Ptr->Len  = 0x2B;
1081             Ptr->ResType = 0;
1082             Ptr->GenFlag = 0;
1083             Ptr->SpecificFlag = 0;
1084             Ptr->AddrSpaceGranularity = 64;
1085             Ptr->AddrRangeMin = 0;
1086             Ptr->AddrRangeMax = 0;
1087             Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1088             Ptr->AddrLen = 0;
1089             break;
1090
1091           case TypePMem64:
1092             //
1093             // Prefetch memory 64
1094             //
1095             Ptr->Desc = 0x8A;
1096             Ptr->Len  = 0x2B;
1097             Ptr->ResType = 0;
1098             Ptr->GenFlag = 0;
1099             Ptr->SpecificFlag = 6;
1100             Ptr->AddrSpaceGranularity = 64;
1101             Ptr->AddrRangeMin = 0;
1102             Ptr->AddrRangeMax = 0;
1103             Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1104             Ptr->AddrLen = 0;
1105             break;
1106           };
1107
1108           Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
1109         }
1110       }
1111
1112       ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
1113       ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
1114
1115       *Configuration = Buffer;
1116
1117       return EFI_SUCCESS;
1118     }
1119
1120     List = List->ForwardLink;
1121   }
1122
1123   return EFI_INVALID_PARAMETER;
1124 }
1125
1126 /**
1127    Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
1128    stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
1129    PCI controllers before enumeration.
1130
1131    This function is called during the PCI enumeration process. No specific action is expected from this
1132    member function. It allows the host bridge driver to preinitialize individual PCI controllers before
1133    enumeration.
1134
1135    @param This              Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
1136    @param RootBridgeHandle  The associated PCI root bridge handle. Type EFI_HANDLE is defined in
1137                             InstallProtocolInterface() in the UEFI 2.0 Specification.
1138    @param PciAddress        The address of the PCI device on the PCI bus. This address can be passed to the
1139                             EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI
1140                             configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for
1141                             the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
1142    @param Phase             The phase of the PCI device enumeration.
1143
1144    @retval EFI_SUCCESS              The requested parameters were returned.
1145    @retval EFI_INVALID_PARAMETER    RootBridgeHandle is not a valid root bridge handle.
1146    @retval EFI_INVALID_PARAMETER    Phase is not a valid phase that is defined in
1147                                     EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
1148    @retval EFI_DEVICE_ERROR         Programming failed due to a hardware error. The PCI enumerator should
1149                                     not enumerate this device, including its child devices if it is a PCI-to-PCI
1150                                     bridge.
1151
1152 **/
1153 EFI_STATUS
1154 EFIAPI
1155 PreprocessController (
1156   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL          *This,
1157   IN  EFI_HANDLE                                                RootBridgeHandle,
1158   IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS               PciAddress,
1159   IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE              Phase
1160   )
1161 {
1162   PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;
1163   PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;
1164   LIST_ENTRY                            *List;
1165
1166   HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
1167   List = HostBridgeInstance->Head.ForwardLink;
1168
1169   //
1170   // Enumerate the root bridges in this host bridge
1171   //
1172   while (List != &HostBridgeInstance->Head) {
1173     RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
1174     if (RootBridgeHandle == RootBridgeInstance->Handle) {
1175       break;
1176     }
1177     List = List->ForwardLink;
1178   }
1179   if (List == &HostBridgeInstance->Head) {
1180     return EFI_INVALID_PARAMETER;
1181   }
1182
1183   if (Phase < EfiPciBeforeChildBusEnumeration || Phase > EfiMaxPciHostBridgeEnumerationPhase) {
1184     return EFI_INVALID_PARAMETER;
1185   }
1186
1187   return EFI_SUCCESS;
1188 }