PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h

   1 /** @file
   2   The Header file of the Pci Host Bridge Driver
   3
   4   Copyright (c) 2008 - 2009, Intel Corporation<BR> All rights
   5   reserved. This program and the accompanying materials are
   6   licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef _PCI_HOST_BRIDGE_H_
  16 #define _PCI_HOST_BRIDGE_H_
  17
  18 #include <PiDxe.h>
  19
  20 #include <IndustryStandard/Pci.h>
  21 #include <IndustryStandard/Acpi.h>
  22
  23 #include <Protocol/PciHostBridgeResourceAllocation.h>
  24 #include <Protocol/PciRootBridgeIo.h>
  25 #include <Protocol/CpuIo2.h>
  26 #include <Protocol/Metronome.h>
  27 #include <Protocol/DevicePath.h>
  28
  29
  30 #include <Library/BaseLib.h>
  31 #include <Library/DebugLib.h>
  32 #include <Library/BaseMemoryLib.h>
  33 #include <Library/MemoryAllocationLib.h>
  34 #include <Library/UefiLib.h>
  35 #include <Library/UefiBootServicesTableLib.h>
  36 #include <Library/DxeServicesTableLib.h>
  37 #include <Library/DevicePathLib.h>
  38
  39 //
  40 // Hard code the host bridge number in the platform.
  41 // In this chipset, there is only one host bridge.
  42 //
  43 #define HOST_BRIDGE_NUMBER  1
  44
  45 #define PCI_HOST_BRIDGE_SIGNATURE  SIGNATURE_32('e', 'h', 's', 't')
  46 typedef struct {
  47   UINTN                                             Signature;
  48   EFI_HANDLE                                        HostBridgeHandle;
  49   UINTN                                             RootBridgeNumber;
  50   LIST_ENTRY                                        Head;
  51   BOOLEAN                                           ResourceSubmited;
  52   BOOLEAN                                           CanRestarted;
  53   EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  ResAlloc;
  54 } PCI_HOST_BRIDGE_INSTANCE;
  55
  56 #define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) \
  57   CR(a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)
  58
  59 //
  60 // Driver Entry Point
  61 //
  62 EFI_STATUS
  63 EFIAPI
  64 EfiMain (
  65   IN EFI_HANDLE       ImageHandle,
  66   IN EFI_SYSTEM_TABLE *SystemTable
  67   );
  68
  69 //
  70 //  HostBridge Resource Allocation interface
  71 //
  72 EFI_STATUS
  73 EFIAPI
  74 NotifyPhase(
  75   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
  76   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE    Phase
  77   );
  78
  79 EFI_STATUS
  80 EFIAPI
  81 GetNextRootBridge(
  82   IN       EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
  83   IN OUT   EFI_HANDLE                                       *RootBridgeHandle
  84   );
  85
  86 EFI_STATUS
  87 EFIAPI
  88 GetAttributes(
  89   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
  90   IN  EFI_HANDLE                                       RootBridgeHandle,
  91   OUT UINT64                                           *Attributes
  92   );
  93
  94 EFI_STATUS
  95 EFIAPI
  96 StartBusEnumeration(
  97   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
  98   IN  EFI_HANDLE                                       RootBridgeHandle,
  99   OUT VOID                                             **Configuration
 100   );
 101
 102 EFI_STATUS
 103 EFIAPI
 104 SetBusNumbers(
 105   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 106   IN EFI_HANDLE                                       RootBridgeHandle,
 107   IN VOID                                             *Configuration
 108   );
 109
 110 EFI_STATUS
 111 EFIAPI
 112 SubmitResources(
 113   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 114   IN EFI_HANDLE                                       RootBridgeHandle,
 115   IN VOID                                             *Configuration
 116   );
 117
 118 EFI_STATUS
 119 EFIAPI
 120 GetProposedResources(
 121   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 122   IN  EFI_HANDLE                                       RootBridgeHandle,
 123   OUT VOID                                             **Configuration
 124   );
 125
 126 EFI_STATUS
 127 EFIAPI
 128 PreprocessController (
 129   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *This,
 130   IN  EFI_HANDLE                                        RootBridgeHandle,
 131   IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS       PciAddress,
 132   IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE      Phase
 133   );
 134
 135
 136 //
 137 // Define resource status constant
 138 //
 139 #define EFI_RESOURCE_NONEXISTENT   0xFFFFFFFFFFFFFFFFULL
 140 #define EFI_RESOURCE_LESS          0xFFFFFFFFFFFFFFFEULL
 141
 142
 143 //
 144 // Driver Instance Data Prototypes
 145 //
 146
 147 typedef struct {
 148   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION  Operation;
 149   UINTN                                      NumberOfBytes;
 150   UINTN                                      NumberOfPages;
 151   EFI_PHYSICAL_ADDRESS                       HostAddress;
 152   EFI_PHYSICAL_ADDRESS                       MappedHostAddress;
 153 } MAP_INFO;
 154
 155 typedef struct {
 156   ACPI_HID_DEVICE_PATH              AcpiDevicePath;
 157   EFI_DEVICE_PATH_PROTOCOL          EndDevicePath;
 158 } EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
 159
 160 typedef struct {
 161   UINT64          BusBase;
 162   UINT64          BusLimit;
 163
 164   UINT64          MemBase;
 165   UINT64          MemLimit;
 166
 167   UINT64          IoBase;
 168   UINT64          IoLimit;
 169 } PCI_ROOT_BRIDGE_RESOURCE_APPETURE;
 170
 171 typedef enum {
 172   TypeIo = 0,
 173   TypeMem32,
 174   TypePMem32,
 175   TypeMem64,
 176   TypePMem64,
 177   TypeBus,
 178   TypeMax
 179 } PCI_RESOURCE_TYPE;
 180
 181 typedef enum {
 182   ResNone = 0,
 183   ResSubmitted,
 184   ResRequested,
 185   ResAllocated,
 186   ResStatusMax
 187 } RES_STATUS;
 188
 189 typedef struct {
 190   PCI_RESOURCE_TYPE Type;
 191   UINT64            Base;
 192   UINT64            Length;
 193   UINT64            Alignment;
 194   RES_STATUS        Status;
 195 } PCI_RES_NODE;
 196
 197 #define PCI_ROOT_BRIDGE_SIGNATURE  SIGNATURE_32('e', '2', 'p', 'b')
 198
 199 typedef struct {
 200   UINT32                 Signature;
 201   LIST_ENTRY             Link;
 202   EFI_HANDLE             Handle;
 203   UINT64                 RootBridgeAttrib;
 204   UINT64                 Attributes;
 205   UINT64                 Supports;
 206
 207   //
 208   // Specific for this memory controller: Bus, I/O, Mem
 209   //
 210   PCI_RES_NODE           ResAllocNode[6];
 211
 212   //
 213   // Addressing for Memory and I/O and Bus arrange
 214   //
 215   UINT64                 BusBase;
 216   UINT64                 MemBase;
 217   UINT64                 IoBase;
 218   UINT64                 BusLimit;
 219   UINT64                 MemLimit;
 220   UINT64                 IoLimit;
 221
 222   EFI_LOCK               PciLock;
 223   UINTN                  PciAddress;
 224   UINTN                  PciData;
 225
 226   EFI_DEVICE_PATH_PROTOCOL                *DevicePath;
 227   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL         Io;
 228
 229 } PCI_ROOT_BRIDGE_INSTANCE;
 230
 231
 232 //
 233 // Driver Instance Data Macros
 234 //
 235 #define DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) \
 236   CR(a, PCI_ROOT_BRIDGE_INSTANCE, Io, PCI_ROOT_BRIDGE_SIGNATURE)
 237
 238
 239 #define DRIVER_INSTANCE_FROM_LIST_ENTRY(a) \
 240   CR(a, PCI_ROOT_BRIDGE_INSTANCE, Link, PCI_ROOT_BRIDGE_SIGNATURE)
 241
 242
 243 EFI_STATUS
 244 RootBridgeConstructor (
 245   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL    *Protocol,
 246   IN EFI_HANDLE                         HostBridgeHandle,
 247   IN UINT64                             Attri,
 248   IN PCI_ROOT_BRIDGE_RESOURCE_APPETURE  *ResAppeture
 249   );
 250
 251 #endif