PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h

   1 /** @file
   2   The Header file of the Pci Host Bridge Driver
   3
   4   Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
   5   This program and the accompanying materials are
   6   licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef _PCI_HOST_BRIDGE_H_
  16 #define _PCI_HOST_BRIDGE_H_
  17
  18 #include <PiDxe.h>
  19
  20 #include <IndustryStandard/Pci.h>
  21 #include <IndustryStandard/Acpi.h>
  22
  23 #include <Protocol/PciHostBridgeResourceAllocation.h>
  24 #include <Protocol/PciRootBridgeIo.h>
  25 #include <Protocol/Metronome.h>
  26 #include <Protocol/DevicePath.h>
  27
  28
  29 #include <Library/BaseLib.h>
  30 #include <Library/DebugLib.h>
  31 #include <Library/BaseMemoryLib.h>
  32 #include <Library/MemoryAllocationLib.h>
  33 #include <Library/UefiLib.h>
  34 #include <Library/UefiBootServicesTableLib.h>
  35 #include <Library/DxeServicesTableLib.h>
  36 #include <Library/DevicePathLib.h>
  37 #include <Library/IoLib.h>
  38 #include <Library/PciLib.h>
  39
  40 //
  41 // Hard code the host bridge number in the platform.
  42 // In this chipset, there is only one host bridge.
  43 //
  44 #define HOST_BRIDGE_NUMBER  1
  45
  46 #define MAX_PCI_DEVICE_NUMBER      31
  47 #define MAX_PCI_FUNCTION_NUMBER    7
  48 #define MAX_PCI_REG_ADDRESS        0xFF
  49
  50 typedef enum {
  51   IoOperation,
  52   MemOperation,
  53   PciOperation
  54 } OPERATION_TYPE;
  55
  56 #define PCI_HOST_BRIDGE_SIGNATURE  SIGNATURE_32('e', 'h', 's', 't')
  57 typedef struct {
  58   UINTN                                             Signature;
  59   EFI_HANDLE                                        HostBridgeHandle;
  60   UINTN                                             RootBridgeNumber;
  61   LIST_ENTRY                                        Head;
  62   BOOLEAN                                           ResourceSubmited;
  63   BOOLEAN                                           CanRestarted;
  64   EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  ResAlloc;
  65 } PCI_HOST_BRIDGE_INSTANCE;
  66
  67 #define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) \
  68   CR(a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)
  69
  70 //
  71 // Driver Entry Point
  72 //
  73 EFI_STATUS
  74 EFIAPI
  75 EfiMain (
  76   IN EFI_HANDLE       ImageHandle,
  77   IN EFI_SYSTEM_TABLE *SystemTable
  78   );
  79
  80 //
  81 //  HostBridge Resource Allocation interface
  82 //
  83 EFI_STATUS
  84 EFIAPI
  85 NotifyPhase(
  86   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
  87   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE    Phase
  88   );
  89
  90 EFI_STATUS
  91 EFIAPI
  92 GetNextRootBridge(
  93   IN       EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
  94   IN OUT   EFI_HANDLE                                       *RootBridgeHandle
  95   );
  96
  97 EFI_STATUS
  98 EFIAPI
  99 GetAttributes(
 100   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 101   IN  EFI_HANDLE                                       RootBridgeHandle,
 102   OUT UINT64                                           *Attributes
 103   );
 104
 105 EFI_STATUS
 106 EFIAPI
 107 StartBusEnumeration(
 108   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 109   IN  EFI_HANDLE                                       RootBridgeHandle,
 110   OUT VOID                                             **Configuration
 111   );
 112
 113 EFI_STATUS
 114 EFIAPI
 115 SetBusNumbers(
 116   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 117   IN EFI_HANDLE                                       RootBridgeHandle,
 118   IN VOID                                             *Configuration
 119   );
 120
 121 EFI_STATUS
 122 EFIAPI
 123 SubmitResources(
 124   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 125   IN EFI_HANDLE                                       RootBridgeHandle,
 126   IN VOID                                             *Configuration
 127   );
 128
 129 EFI_STATUS
 130 EFIAPI
 131 GetProposedResources(
 132   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 133   IN  EFI_HANDLE                                       RootBridgeHandle,
 134   OUT VOID                                             **Configuration
 135   );
 136
 137 EFI_STATUS
 138 EFIAPI
 139 PreprocessController (
 140   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *This,
 141   IN  EFI_HANDLE                                        RootBridgeHandle,
 142   IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS       PciAddress,
 143   IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE      Phase
 144   );
 145
 146
 147 //
 148 // Define resource status constant
 149 //
 150 #define EFI_RESOURCE_NONEXISTENT   0xFFFFFFFFFFFFFFFFULL
 151 #define EFI_RESOURCE_LESS          0xFFFFFFFFFFFFFFFEULL
 152
 153
 154 //
 155 // Driver Instance Data Prototypes
 156 //
 157
 158 typedef struct {
 159   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION  Operation;
 160   UINTN                                      NumberOfBytes;
 161   UINTN                                      NumberOfPages;
 162   EFI_PHYSICAL_ADDRESS                       HostAddress;
 163   EFI_PHYSICAL_ADDRESS                       MappedHostAddress;
 164 } MAP_INFO;
 165
 166 typedef struct {
 167   ACPI_HID_DEVICE_PATH              AcpiDevicePath;
 168   EFI_DEVICE_PATH_PROTOCOL          EndDevicePath;
 169 } EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
 170
 171 typedef struct {
 172   UINT64          BusBase;
 173   UINT64          BusLimit;
 174
 175   UINT64          MemBase;
 176   UINT64          MemLimit;
 177
 178   UINT64          IoBase;
 179   UINT64          IoLimit;
 180 } PCI_ROOT_BRIDGE_RESOURCE_APPETURE;
 181
 182 typedef enum {
 183   TypeIo = 0,
 184   TypeMem32,
 185   TypePMem32,
 186   TypeMem64,
 187   TypePMem64,
 188   TypeBus,
 189   TypeMax
 190 } PCI_RESOURCE_TYPE;
 191
 192 typedef enum {
 193   ResNone = 0,
 194   ResSubmitted,
 195   ResRequested,
 196   ResAllocated,
 197   ResStatusMax
 198 } RES_STATUS;
 199
 200 typedef struct {
 201   PCI_RESOURCE_TYPE Type;
 202   UINT64            Base;
 203   UINT64            Length;
 204   UINT64            Alignment;
 205   RES_STATUS        Status;
 206 } PCI_RES_NODE;
 207
 208 #define PCI_ROOT_BRIDGE_SIGNATURE  SIGNATURE_32('e', '2', 'p', 'b')
 209
 210 typedef struct {
 211   UINT32                 Signature;
 212   LIST_ENTRY             Link;
 213   EFI_HANDLE             Handle;
 214   UINT64                 RootBridgeAttrib;
 215   UINT64                 Attributes;
 216   UINT64                 Supports;
 217
 218   //
 219   // Specific for this memory controller: Bus, I/O, Mem
 220   //
 221   PCI_RES_NODE           ResAllocNode[6];
 222
 223   //
 224   // Addressing for Memory and I/O and Bus arrange
 225   //
 226   UINT64                 BusBase;
 227   UINT64                 MemBase;
 228   UINT64                 IoBase;
 229   UINT64                 BusLimit;
 230   UINT64                 MemLimit;
 231   UINT64                 IoLimit;
 232
 233   UINTN                  PciAddress;
 234   UINTN                  PciData;
 235
 236   EFI_DEVICE_PATH_PROTOCOL                *DevicePath;
 237   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL         Io;
 238
 239 } PCI_ROOT_BRIDGE_INSTANCE;
 240
 241
 242 //
 243 // Driver Instance Data Macros
 244 //
 245 #define DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) \
 246   CR(a, PCI_ROOT_BRIDGE_INSTANCE, Io, PCI_ROOT_BRIDGE_SIGNATURE)
 247
 248
 249 #define DRIVER_INSTANCE_FROM_LIST_ENTRY(a) \
 250   CR(a, PCI_ROOT_BRIDGE_INSTANCE, Link, PCI_ROOT_BRIDGE_SIGNATURE)
 251
 252
 253 EFI_STATUS
 254 RootBridgeConstructor (
 255   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL    *Protocol,
 256   IN EFI_HANDLE                         HostBridgeHandle,
 257   IN UINT64                             Attri,
 258   IN PCI_ROOT_BRIDGE_RESOURCE_APPETURE  *ResAppeture
 259   );
 260
 261 #endif