TscTimerLib in PerformancePkg is a BASE type library, which should be used by any...
[mirror_edk2.git] / PerformancePkg / Library / PeiTscTimerLib / PeiTscTimerLib.c
1 /** @file
2 A Pei Timer Library implementation which uses the Time Stamp Counter in the processor.
3
4 For Pentium 4 processors, Intel Xeon processors (family [0FH], models [03H and higher]);
5 for Intel Core Solo and Intel Core Duo processors (family [06H], model [0EH]);
6 for the Intel Xeon processor 5100 series and Intel Core 2 Duo processors (family [06H], model [0FH]);
7 for Intel Core 2 and Intel Xeon processors (family [06H], display_model [17H]);
8 for Intel Atom processors (family [06H], display_model [1CH]):
9 the time-stamp counter increments at a constant rate.
10 That rate may be set by the maximum core-clock to bus-clock ratio of the processor or may be set by
11 the maximum resolved frequency at which the processor is booted. The maximum resolved frequency may
12 differ from the maximum qualified frequency of the processor.
13
14 The specific processor configuration determines the behavior. Constant TSC behavior ensures that the
15 duration of each clock tick is uniform and supports the use of the TSC as a wall clock timer even if
16 the processor core changes frequency. This is the architectural behavior moving forward.
17
18 A Processor's support for invariant TSC is indicated by CPUID.0x80000007.EDX[8].
19
20 Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>
21 This program and the accompanying materials
22 are licensed and made available under the terms and conditions of the BSD License
23 which accompanies this distribution. The full text of the license may be found at
24 http://opensource.org/licenses/bsd-license.php
25
26 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
27 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
28
29 **/
30
31 #include <PiPei.h>
32 #include <Ich/GenericIch.h>
33
34 #include <Library/TimerLib.h>
35 #include <Library/BaseLib.h>
36 #include <Library/IoLib.h>
37 #include <Library/PciLib.h>
38 #include <Library/PcdLib.h>
39 #include <Library/HobLib.h>
40
41 #include <Guid/TscFrequency.h>
42
43 /** Get TSC frequency from TSC frequency GUID HOB, if the HOB is not found, build it.
44
45 The TSC counting frequency is determined by comparing how far it counts
46 during a 1ms period as determined by the ACPI timer. The ACPI timer is
47 used because it counts at a known frequency.
48 If ACPI I/O space not enabled, this function will enable it. Then the
49 TSC is sampled, followed by waiting for 3579 clocks of the ACPI timer, or 1ms.
50 The TSC is then sampled again. The difference multiplied by 1000 is the TSC
51 frequency. There will be a small error because of the overhead of reading
52 the ACPI timer.
53
54 @return The number of TSC counts per second.
55
56 **/
57 UINT64
58 InternalGetTscFrequency (
59 VOID
60 )
61 {
62 EFI_HOB_GUID_TYPE *GuidHob;
63 VOID *DataInHob;
64 UINT64 StartTSC;
65 UINT64 EndTSC;
66 UINT32 TimerAddr;
67 UINT32 Ticks;
68 UINT64 TscFrequency;
69
70 //
71 // Get TSC frequency from TSC frequency GUID HOB.
72 //
73 GuidHob = GetFirstGuidHob (&gEfiTscFrequencyGuid);
74 if (GuidHob != NULL) {
75 DataInHob = GET_GUID_HOB_DATA (GuidHob);
76 TscFrequency = * (UINT64 *) DataInHob;
77 return TscFrequency;
78 }
79
80 //
81 // TSC frequency GUID HOB is not found, build it.
82 //
83
84 //
85 // If ACPI I/O space is not enabled yet, program ACPI I/O base address and enable it.
86 //
87 if ((PciRead8 (PCI_ICH_LPC_ADDRESS (R_ICH_LPC_ACPI_CNT)) & B_ICH_LPC_ACPI_CNT_ACPI_EN) == 0) {
88 PciWrite16 (PCI_ICH_LPC_ADDRESS (R_ICH_LPC_ACPI_BASE), PcdGet16 (PcdPerfPkgAcpiIoPortBaseAddress));
89 PciOr8 (PCI_ICH_LPC_ADDRESS (R_ICH_LPC_ACPI_CNT), B_ICH_LPC_ACPI_CNT_ACPI_EN);
90 }
91
92 //
93 // ACPI I/O space should be enabled now, locate the ACPI Timer.
94 // ACPI I/O base address maybe have be initialized by other driver with different value,
95 // So get it from PCI space directly.
96 //
97 TimerAddr = ((PciRead16 (PCI_ICH_LPC_ADDRESS (R_ICH_LPC_ACPI_BASE))) & B_ICH_LPC_ACPI_BASE_BAR) + R_ACPI_PM1_TMR;
98 Ticks = IoRead32 (TimerAddr) + (3579); // Set Ticks to 1ms in the future
99 StartTSC = AsmReadTsc(); // Get base value for the TSC
100 //
101 // Wait until the ACPI timer has counted 1ms.
102 // Timer wrap-arounds are handled correctly by this function.
103 // When the current ACPI timer value is greater than 'Ticks', the while loop will exit.
104 //
105 while (((Ticks - IoRead32 (TimerAddr)) & BIT23) == 0) {
106 CpuPause();
107 }
108 EndTSC = AsmReadTsc(); // TSC value 1ms later
109
110 TscFrequency = MultU64x32 (
111 (EndTSC - StartTSC), // Number of TSC counts in 1ms
112 1000 // Number of ms in a second
113 );
114 //
115 // TscFrequency is now equal to the number of TSC counts per second, build GUID HOB for it.
116 //
117 BuildGuidDataHob (
118 &gEfiTscFrequencyGuid,
119 &TscFrequency,
120 sizeof (UINT64)
121 );
122
123 return TscFrequency;
124 }
125
126 /** Stalls the CPU for at least the given number of ticks.
127
128 Stalls the CPU for at least the given number of ticks. It's invoked by
129 MicroSecondDelay() and NanoSecondDelay().
130
131 @param[in] Delay A period of time to delay in ticks.
132
133 **/
134 VOID
135 InternalX86Delay (
136 IN UINT64 Delay
137 )
138 {
139 UINT64 Ticks;
140
141 //
142 // The target timer count is calculated here
143 //
144 Ticks = AsmReadTsc() + Delay;
145
146 //
147 // Wait until time out
148 // Timer wrap-arounds are NOT handled correctly by this function.
149 // Thus, this function must be called within 10 years of reset since
150 // Intel guarantees a minimum of 10 years before the TSC wraps.
151 //
152 while (AsmReadTsc() <= Ticks) CpuPause();
153 }
154
155 /** Stalls the CPU for at least the specified number of MicroSeconds.
156
157 @param[in] MicroSeconds The minimum number of microseconds to delay.
158
159 @return The value of MicroSeconds input.
160
161 **/
162 UINTN
163 EFIAPI
164 MicroSecondDelay (
165 IN UINTN MicroSeconds
166 )
167 {
168 InternalX86Delay (
169 DivU64x32 (
170 MultU64x64 (
171 InternalGetTscFrequency (),
172 MicroSeconds
173 ),
174 1000000u
175 )
176 );
177 return MicroSeconds;
178 }
179
180 /** Stalls the CPU for at least the specified number of NanoSeconds.
181
182 @param[in] NanoSeconds The minimum number of nanoseconds to delay.
183
184 @return The value of NanoSeconds input.
185
186 **/
187 UINTN
188 EFIAPI
189 NanoSecondDelay (
190 IN UINTN NanoSeconds
191 )
192 {
193 InternalX86Delay (
194 DivU64x32 (
195 MultU64x32 (
196 InternalGetTscFrequency (),
197 (UINT32)NanoSeconds
198 ),
199 1000000000u
200 )
201 );
202 return NanoSeconds;
203 }
204
205 /** Retrieves the current value of the 64-bit free running Time-Stamp counter.
206
207 The time-stamp counter (as implemented in the P6 family, Pentium, Pentium M,
208 Pentium 4, Intel Xeon, Intel Core Solo and Intel Core Duo processors and
209 later processors) is a 64-bit counter that is set to 0 following a RESET of
210 the processor. Following a RESET, the counter increments even when the
211 processor is halted by the HLT instruction or the external STPCLK# pin. Note
212 that the assertion of the external DPSLP# pin may cause the time-stamp
213 counter to stop.
214
215 The properties of the counter can be retrieved by the
216 GetPerformanceCounterProperties() function.
217
218 @return The current value of the free running performance counter.
219
220 **/
221 UINT64
222 EFIAPI
223 GetPerformanceCounter (
224 VOID
225 )
226 {
227 return AsmReadTsc();
228 }
229
230 /** Retrieves the 64-bit frequency in Hz and the range of performance counter
231 values.
232
233 If StartValue is not NULL, then the value that the performance counter starts
234 with, 0x0, is returned in StartValue. If EndValue is not NULL, then the value
235 that the performance counter end with, 0xFFFFFFFFFFFFFFFF, is returned in
236 EndValue.
237
238 The 64-bit frequency of the performance counter, in Hz, is always returned.
239 To determine average processor clock frequency, Intel recommends the use of
240 EMON logic to count processor core clocks over the period of time for which
241 the average is required.
242
243
244 @param[out] StartValue Pointer to where the performance counter's starting value is saved, or NULL.
245 @param[out] EndValue Pointer to where the performance counter's ending value is saved, or NULL.
246
247 @return The frequency in Hz.
248
249 **/
250 UINT64
251 EFIAPI
252 GetPerformanceCounterProperties (
253 OUT UINT64 *StartValue, OPTIONAL
254 OUT UINT64 *EndValue OPTIONAL
255 )
256 {
257 if (StartValue != NULL) {
258 *StartValue = 0;
259 }
260 if (EndValue != NULL) {
261 *EndValue = 0xFFFFFFFFFFFFFFFFull;
262 }
263
264 return InternalGetTscFrequency ();
265 }