PerformancePkg/Library/TscTimerLib/TscTimerLibShare.c

   1 /** @file
   2   The Timer Library implementation which uses the Time Stamp Counter in the processor.
   3
   4   For Pentium 4 processors, Intel Xeon processors (family [0FH], models [03H and higher]);
   5     for Intel Core Solo and Intel Core Duo processors (family [06H], model [0EH]);
   6     for the Intel Xeon processor 5100 series and Intel Core 2 Duo processors (family [06H], model [0FH]);
   7     for Intel Core 2 and Intel Xeon processors (family [06H], display_model [17H]);
   8     for Intel Atom processors (family [06H], display_model [1CH]):
   9   the time-stamp counter increments at a constant rate.
  10   That rate may be set by the maximum core-clock to bus-clock ratio of the processor or may be set by
  11   the maximum resolved frequency at which the processor is booted. The maximum resolved frequency may
  12   differ from the maximum qualified frequency of the processor.
  13
  14   The specific processor configuration determines the behavior. Constant TSC behavior ensures that the
  15   duration of each clock tick is uniform and supports the use of the TSC as a wall clock timer even if
  16   the processor core changes frequency. This is the architectural behavior moving forward.
  17
  18   A Processor's support for invariant TSC is indicated by CPUID.0x80000007.EDX[8].
  19
  20   Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>
  21   This program and the accompanying materials
  22   are licensed and made available under the terms and conditions of the BSD License
  23   which accompanies this distribution. The full text of the license may be found at
  24   http://opensource.org/licenses/bsd-license.php
  25
  26   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  27   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  28
  29 **/
  30
  31 #include "TscTimerLibInternal.h"
  32
  33 /**  Calculate TSC frequency.
  34
  35   The TSC counting frequency is determined by comparing how far it counts
  36   during a 1ms period as determined by the ACPI timer. The ACPI timer is
  37   used because it counts at a known frequency.
  38   If ACPI I/O space not enabled, this function will enable it. Then the
  39   TSC is sampled, followed by waiting for 3579 clocks of the ACPI timer, or 1ms.
  40   The TSC is then sampled again. The difference multiplied by 1000 is the TSC
  41   frequency. There will be a small error because of the overhead of reading
  42   the ACPI timer. An attempt is made to determine and compensate for this error.
  43
  44   @return The number of TSC counts per second.
  45
  46 **/
  47 UINT64
  48 InternalCalculateTscFrequency (
  49   VOID
  50   )
  51 {
  52   UINT64      StartTSC;
  53   UINT64      EndTSC;
  54   UINT32      TimerAddr;
  55   UINT32      Ticks;
  56   UINT64      TscFrequency;
  57
  58   //
  59   // If ACPI I/O space is not enabled yet, program ACPI I/O base address and enable it.
  60   //
  61   if ((PciRead8 (PCI_ICH_LPC_ADDRESS (R_ICH_LPC_ACPI_CNT)) & B_ICH_LPC_ACPI_CNT_ACPI_EN) == 0) {
  62     PciWrite16 (PCI_ICH_LPC_ADDRESS (R_ICH_LPC_ACPI_BASE), PcdGet16 (PcdPerfPkgAcpiIoPortBaseAddress));
  63     PciOr8 (PCI_ICH_LPC_ADDRESS (R_ICH_LPC_ACPI_CNT), B_ICH_LPC_ACPI_CNT_ACPI_EN);
  64   }
  65
  66   //
  67   // ACPI I/O space should be enabled now, locate the ACPI Timer.
  68   // ACPI I/O base address maybe have be initialized by other driver with different value,
  69   // So get it from PCI space directly.
  70   //
  71   TimerAddr = ((PciRead16 (PCI_ICH_LPC_ADDRESS (R_ICH_LPC_ACPI_BASE))) & B_ICH_LPC_ACPI_BASE_BAR) + R_ACPI_PM1_TMR;
  72   Ticks    = IoRead32 (TimerAddr) + (3579);   // Set Ticks to 1ms in the future
  73   StartTSC = AsmReadTsc();                    // Get base value for the TSC
  74   //
  75   // Wait until the ACPI timer has counted 1ms.
  76   // Timer wrap-arounds are handled correctly by this function.
  77   // When the current ACPI timer value is greater than 'Ticks', the while loop will exit.
  78   //
  79   while (((Ticks - IoRead32 (TimerAddr)) & BIT23) == 0) {
  80     CpuPause();
  81   }
  82   EndTSC = AsmReadTsc();    // TSC value 1ms later
  83
  84   TscFrequency =   MultU64x32 (
  85                       (EndTSC - StartTSC),    // Number of TSC counts in 1ms
  86                       1000                    // Number of ms in a second
  87                     );
  88
  89   return TscFrequency;
  90 }
  91
  92 /**  Stalls the CPU for at least the given number of ticks.
  93
  94   Stalls the CPU for at least the given number of ticks. It's invoked by
  95   MicroSecondDelay() and NanoSecondDelay().
  96
  97   @param[in]  Delay     A period of time to delay in ticks.
  98
  99 **/
 100 VOID
 101 InternalX86Delay (
 102   IN      UINT64                    Delay
 103   )
 104 {
 105   UINT64                             Ticks;
 106
 107   //
 108   // The target timer count is calculated here
 109   //
 110   Ticks = AsmReadTsc() + Delay;
 111
 112   //
 113   // Wait until time out
 114   // Timer wrap-arounds are NOT handled correctly by this function.
 115   // Thus, this function must be called within 10 years of reset since
 116   // Intel guarantees a minimum of 10 years before the TSC wraps.
 117   //
 118   while (AsmReadTsc() <= Ticks) CpuPause();
 119 }
 120
 121 /**  Stalls the CPU for at least the specified number of MicroSeconds.
 122
 123   @param[in]  MicroSeconds  The minimum number of microseconds to delay.
 124
 125   @return The value of MicroSeconds input.
 126
 127 **/
 128 UINTN
 129 EFIAPI
 130 MicroSecondDelay (
 131   IN      UINTN                     MicroSeconds
 132   )
 133 {
 134   InternalX86Delay (
 135     DivU64x32 (
 136       MultU64x64 (
 137         InternalGetTscFrequency (),
 138         MicroSeconds
 139       ),
 140       1000000u
 141     )
 142   );
 143   return MicroSeconds;
 144 }
 145
 146 /**  Stalls the CPU for at least the specified number of NanoSeconds.
 147
 148   @param[in]  NanoSeconds The minimum number of nanoseconds to delay.
 149
 150   @return The value of NanoSeconds input.
 151
 152 **/
 153 UINTN
 154 EFIAPI
 155 NanoSecondDelay (
 156   IN      UINTN                     NanoSeconds
 157   )
 158 {
 159   InternalX86Delay (
 160     DivU64x32 (
 161       MultU64x32 (
 162         InternalGetTscFrequency (),
 163         (UINT32)NanoSeconds
 164       ),
 165     1000000000u
 166     )
 167   );
 168   return NanoSeconds;
 169 }
 170
 171 /**  Retrieves the current value of the 64-bit free running Time-Stamp counter.
 172
 173   The time-stamp counter (as implemented in the P6 family, Pentium, Pentium M,
 174   Pentium 4, Intel Xeon, Intel Core Solo and Intel Core Duo processors and
 175   later processors) is a 64-bit counter that is set to 0 following a RESET of
 176   the processor.  Following a RESET, the counter increments even when the
 177   processor is halted by the HLT instruction or the external STPCLK# pin. Note
 178   that the assertion of the external DPSLP# pin may cause the time-stamp
 179   counter to stop.
 180
 181   The properties of the counter can be retrieved by the
 182   GetPerformanceCounterProperties() function.
 183
 184   @return The current value of the free running performance counter.
 185
 186 **/
 187 UINT64
 188 EFIAPI
 189 GetPerformanceCounter (
 190   VOID
 191   )
 192 {
 193   return AsmReadTsc();
 194 }
 195
 196 /**  Retrieves the 64-bit frequency in Hz and the range of performance counter
 197   values.
 198
 199   If StartValue is not NULL, then the value that the performance counter starts
 200   with, 0x0, is returned in StartValue. If EndValue is not NULL, then the value
 201   that the performance counter end with, 0xFFFFFFFFFFFFFFFF, is returned in
 202   EndValue.
 203
 204   The 64-bit frequency of the performance counter, in Hz, is always returned.
 205   To determine average processor clock frequency, Intel recommends the use of
 206   EMON logic to count processor core clocks over the period of time for which
 207   the average is required.
 208
 209
 210   @param[out]   StartValue  Pointer to where the performance counter's starting value is saved, or NULL.
 211   @param[out]   EndValue    Pointer to where the performance counter's ending value is saved, or NULL.
 212
 213   @return The frequency in Hz.
 214
 215 **/
 216 UINT64
 217 EFIAPI
 218 GetPerformanceCounterProperties (
 219   OUT      UINT64                    *StartValue,  OPTIONAL
 220   OUT      UINT64                    *EndValue     OPTIONAL
 221   )
 222 {
 223   if (StartValue != NULL) {
 224     *StartValue = 0;
 225   }
 226   if (EndValue != NULL) {
 227     *EndValue = 0xFFFFFFFFFFFFFFFFull;
 228   }
 229
 230   return InternalGetTscFrequency ();
 231 }
 232
 233 /**
 234   Converts elapsed ticks of performance counter to time in nanoseconds.
 235
 236   This function converts the elapsed ticks of running performance counter to
 237   time value in unit of nanoseconds.
 238
 239   @param  Ticks     The number of elapsed ticks of running performance counter.
 240
 241   @return The elapsed time in nanoseconds.
 242
 243 **/
 244 UINT64
 245 EFIAPI
 246 GetTimeInNanoSecond (
 247   IN      UINT64                     Ticks
 248   )
 249 {
 250   UINT64  Frequency;
 251   UINT64  NanoSeconds;
 252   UINT64  Remainder;
 253   INTN    Shift;
 254
 255   Frequency = GetPerformanceCounterProperties (NULL, NULL);
 256
 257   //
 258   //          Ticks
 259   // Time = --------- x 1,000,000,000
 260   //        Frequency
 261   //
 262   NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);
 263
 264   //
 265   // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.
 266   // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,
 267   // i.e. highest bit set in Remainder should <= 33.
 268   //
 269   Shift = MAX (0, HighBitSet64 (Remainder) - 33);
 270   Remainder = RShiftU64 (Remainder, (UINTN) Shift);
 271   Frequency = RShiftU64 (Frequency, (UINTN) Shift);
 272   NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);
 273
 274   return NanoSeconds;
 275 }