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1 /** @file
2 CPU power management control methods
3
4 Copyright (c) 2013-2015 Intel Corporation.
5
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 DefinitionBlock (
17 "CPUPM.aml",
18 "SSDT",
19 0x01,
20 "SsgPmm",
21 "CpuPm",
22 0x0010
23 )
24 {
25 External(\_PR.CPU0, DeviceObj)
26 External(CFGD, FieldUnitObj)
27
28 Scope(\)
29 {
30 // Config DWord, modified during POST
31 // Bit definitions are the same as PPMFlags:
32 // CFGD[0] = PPM_GV3 = GV3
33 // CFGD[1] = PPM_TURBO = Turbo Mode
34 // CFGD[2] = PPM_SUPER_LFM = N/2 Ratio
35 // CFGD[4] = PPM_C1 = C1 Capable, Enabled
36 // CFGD[5] = PPM_C2 = C2 Capable, Enabled
37 // CFGD[6] = PPM_C3 = C3 Capable, Enabled
38 // CFGD[7] = PPM_C4 = C4 Capable, Enabled
39 // CFGD[8] = PPM_C5 = C5/Deep C4 Capable, Enabled
40 // CFGD[9] = PPM_C6 = C6 Capable, Enabled
41 // CFGD[10] = PPM_C1E = C1E Enabled
42 // CFGD[11] = PPM_C2E = C2E Enabled
43 // CFGD[12] = PPM_C3E = C3E Enabled
44 // CFGD[13] = PPM_C4E = C4E Enabled
45 // CFGD[14] = PPM_HARD_C4E = Hard C4E Capable, Enabled
46 // CFGD[16] = PPM_TM1 = Thermal Monitor 1
47 // CFGD[17] = PPM_TM2 = Thermal Monitor 2
48 // CFGD[19] = PPM_PHOT = Bi-directional ProcHot
49 // CFGD[21] = PPM_MWAIT_EXT = MWAIT extensions supported
50 // CFGD[24] = PPM_CMP = CMP supported, Enabled
51 // CFGD[28] = PPM_TSTATE = CPU T states supported
52 //
53 // Name(CFGD, 0x80000000)
54 // External Defined in GNVS
55
56 Name(PDC0,0x80000000) // CPU0 _PDC Flags.
57
58 // We load it in AcpiPlatform
59 //Name(SSDT,Package()
60 //{
61 // "CPU0IST ", 0x80000000, 0x80000000,
62 // "CPU1IST ", 0x80000000, 0x80000000,
63 // "CPU0CST ", 0x80000000, 0x80000000,
64 // "CPU1CST ", 0x80000000, 0x80000000,
65 //})
66 }
67 Scope(\_PR.CPU0)
68 {
69 Method(_PDC, 1)
70 {
71 //
72 // Store result of PDC.
73 //
74 CreateDWordField(Arg0,8,CAP0) // Point to 3rd DWORD.
75 Store(CAP0,PDC0) // Store It in PDC0.
76 }
77 }
78
79 }