QuarkPlatformPkg/QuarkMin.fdf

   1 ## @file
   2 # FDF file of Clanton Peak CRB platform with 32-bit DXE
   3 #
   4 # This package provides QuarkNcSocId platform specific modules.
   5 # Copyright (c) 2013 - 2017 Intel Corporation.
   6 #
   7 # This program and the accompanying materials
   8 # are licensed and made available under the terms and conditions of the BSD License
   9 # which accompanies this distribution.  The full text of the license may be found at
  10 # http://opensource.org/licenses/bsd-license.php
  11 #
  12 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14 #
  15 ##
  16
  17 ################################################################################
  18 #
  19 # Defines Section - statements that will be processed to create a Makefile.
  20 #
  21 ################################################################################
  22 [Defines]
  23 #                  Address 0x100000000 (4 GB reset address)
  24 #                                 Base                               Size
  25 #                                      +---------------------------+
  26 #                           FLASH_BASE | FD.Quark:                 | 0x800000 (8 MB)
  27 #                           0xFF800000 | BaseAddress               |
  28 #                                      +---------------------------+
  29 #
  30 # Flash offsets are 0 based, but are relative to FD.Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part.
  31 # 0xFF800000 + 0x400000 = 0xFFC00000.
  32 #
  33 #                          Address 0x0 (0xFF800000 for 8 MB SPI part)
  34 #                                      +---------------------------+
  35 #                FLASH_FV_PAYLOAD_BASE | Payload Image             | FLASH_FV_PAYLOAD_SIZE
  36 #                           0x00400000 |                           | 0x00100000
  37 #                                      +---------------------------+
  38 #                   FLASH_FV_MAIN_BASE | FvMain Image (Compressed) | FLASH_FV_MAIN_SIZE
  39 #                           0x00500000 |                           | 0x001E0000
  40 #                                      +---------------------------+
  41 #                      NVRAM_AREA_BASE | NVRAM Area=               | NVRAM_AREA_SIZE
  42 #                           0x006E0000 | Variable + FTW Working +  |
  43 #                                      | FTW Spare                 |
  44 #                                      +---+-------------------+---+
  45 #                 NVRAM_AREA_VARIABLE_BASE |                   | NVRAM_AREA_VARIABLE_SIZE
  46 #                                          |                   |
  47 #                                          +-------------------+
  48 #                         FTW_WORKING_BASE |                   | FTW_WORKING_SIZE
  49 #                                          |                   |
  50 #                                          +-------------------+
  51 #                           FTW_SPARE_BASE |                   | FTW_SPARE_SIZE
  52 #                                          |                   |
  53 #                                      +---+-------------------+---+
  54 #                      RMU_BINARY_BASE | RMU Binary                | RMU_BINARY_SIZE
  55 #                           0x00700000 |                           | 0x00008000
  56 #                                      +---------------------------+
  57 #                   PLATFORM_DATA_BASE | PlatformData Binary       | PLATFORM_DATA_SIZE
  58 #                           0x00710000 |                           | 0x00001000
  59 #                                      +---------------------------+
  60 #                FVRECOVERY_IMAGE_BASE | FVRECOVERY Image          | FVRECOVERY_IMAGE_SIZE
  61 #                             0x720000 |                           | 0x000E0000
  62 #                                      +---------------------------+
  63
  64   #
  65   # Define value used to compute FLASH regions below reset vector location just below 4GB
  66   #
  67   DEFINE RESET_ADDRESS                           = 0x100000000       # 4 GB
  68
  69   #
  70   # Set size of FLASH to 8MB
  71   #
  72   DEFINE FLASH_SIZE                              = 0x800000
  73   DEFINE FLASH_BASE                              = $(RESET_ADDRESS) - $(FLASH_SIZE)                                                      # The base address of the Flash Device
  74
  75   #
  76   # Set FLASH block size to 4KB
  77   #
  78   DEFINE FLASH_BLOCKSIZE                         = 0x1000            # 4 KB
  79
  80   #
  81   # Misc settings
  82   #
  83   DEFINE FLASH_BLOCKSIZE_DATA                    = 0x00, 0x10, 0x00, 0x00                                                                # equivalent for DATA blocks
  84
  85   #
  86   # Start PAYLOAD at 4MB into 8MB FLASH
  87   #
  88   DEFINE FLASH_FV_PAYLOAD_BASE                   = 0x00400000
  89   DEFINE FLASH_FV_PAYLOAD_SIZE                   = 0x00100000
  90
  91   #
  92   # Put FVMAIN between PAYLOAD and RMU Binary
  93   #
  94   DEFINE FLASH_FV_MAIN_BASE                      = 0x00500000
  95   DEFINE FLASH_FV_MAIN_SIZE                      = 0x001E0000
  96
  97   #
  98   # Place NV Storage just above Platform Data Base
  99   #
 100   DEFINE NVRAM_AREA_VARIABLE_BASE                = 0x006E0000
 101   DEFINE NVRAM_AREA_SIZE                         = 0x00020000
 102
 103   DEFINE NVRAM_AREA_VARIABLE_SIZE                = 0x0000E000
 104   DEFINE FTW_WORKING_BASE                        = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE)
 105   DEFINE FTW_WORKING_SIZE                        = 0x00002000
 106   DEFINE FTW_SPARE_BASE                          = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE)
 107   DEFINE FTW_SPARE_SIZE                          = $(NVRAM_AREA_SIZE) - $(NVRAM_AREA_VARIABLE_SIZE) - $(FTW_WORKING_SIZE)
 108
 109   #
 110   # RMU Binary must be at fixed address 1MB below 4GB (0xFFF00000)
 111   #
 112   DEFINE RMU_BINARY_BASE                         = 0x00700000  # HW fixed address
 113   DEFINE RMU_BINARY_SIZE                         = 0x00008000  # HW fixed address, so fixed size
 114
 115   #
 116   # Platform Data Base must be 64KB above RMU
 117   #
 118   DEFINE VPD_BASE                                = 0x00708000
 119   DEFINE VPD_SIZE                                = 0x00001000
 120
 121   #
 122   # Place FV Recovery above NV Storage
 123   #
 124   DEFINE FVRECOVERY_IMAGE_SIZE                   = 0x000F0000
 125   DEFINE FVRECOVERY_IMAGE_BASE                   = $(FLASH_SIZE) - $(FVRECOVERY_IMAGE_SIZE)
 126
 127 ################################################################################
 128 #
 129 # FD Section
 130 # The [FD] Section is made up of the definition statements and a
 131 # description of what goes into  the Flash Device Image.  Each FD section
 132 # defines one flash "device" image.  A flash device image may be one of
 133 # the following: Removable media bootable image (like a boot floppy
 134 # image,) an Option ROM image (that would be "flashed" into an add-in
 135 # card,) a System "Flash"  image (that would be burned into a system's
 136 # flash) or an Update ("Capsule") image that will be used to update and
 137 # existing system flash.
 138 #
 139 ################################################################################
 140 [FD.Quark]
 141 BaseAddress   = 0xFF800000                   #The base address of the Flash Device; set to same value as FLASH_BASE.
 142 Size          = 0x800000                     #The size in bytes of the Flash Device; set to same value as FLASH_SIZE.
 143 ErasePolarity = 1
 144 BlockSize     = $(FLASH_BLOCKSIZE)
 145 NumBlocks     = 0x800                        #The number of blocks for the Flash Device.
 146
 147 SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE)
 148 SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize        = $(FLASH_SIZE)
 149
 150 ################################################################################
 151 #
 152 # Following are lists of FD Region layout which correspond to the locations of different
 153 # images within the flash device.
 154 #
 155 # Regions must be defined in ascending order and may not overlap.
 156 #
 157 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
 158 # the pipe "|" character, followed by the size of the region, also in hex with the leading
 159 # "0x" characters. Like:
 160 # Offset|Size
 161 # PcdOffsetCName|PcdSizeCName
 162 # RegionType <FV, DATA, or FILE>
 163 #
 164 ################################################################################
 165
 166 ########################################################
 167 # Quark Payload Image
 168 ########################################################
 169 $(FLASH_FV_PAYLOAD_BASE)|$(FLASH_FV_PAYLOAD_SIZE)
 170 gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize
 171 FV = PAYLOAD
 172
 173 ########################################################
 174 # Quark FVMAIN Image (Compressed)
 175 ########################################################
 176 $(FLASH_FV_MAIN_BASE)|$(FLASH_FV_MAIN_SIZE)
 177 gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize
 178 FV = FVMAIN_COMPACT
 179
 180 #############################################################################
 181 # Quark NVRAM Area
 182 # Quark NVRAM Area contains: Variable + FTW Working + FTW Spare
 183 #############################################################################
 184 $(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE)
 185 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
 186 #NV_VARIABLE_STORE
 187 DATA = {
 188   ## This is the EFI_FIRMWARE_VOLUME_HEADER
 189   # ZeroVector []
 190   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 191   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 192   # FileSystemGuid: gEfiSystemNvDataFvGuid         =
 193   #  { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
 194   0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
 195   0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
 196   # FvLength: 0x20000
 197   0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
 198   #Signature "_FVH"       #Attributes
 199   0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
 200   #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
 201   0x48, 0x00, 0x19, 0xF9, 0x00, 0x00, 0x00, 0x02,
 202   #Blockmap[0]: 32 Blocks * 0x1000 Bytes / Block
 203   0x20, 0x00, 0x00, 0x00, $(FLASH_BLOCKSIZE_DATA),
 204   #Blockmap[1]: End
 205   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 206   ## This is the VARIABLE_STORE_HEADER
 207   !if $(SECURE_BOOT_ENABLE)
 208     # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 } }
 209     0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
 210     0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
 211   !else
 212     #  Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
 213     0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
 214     0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
 215   !endif
 216   #Size: 0x0E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x0DFB8
 217   # This can speed up the Variable Dispatch a bit.
 218   0xB8, 0xDF, 0x00, 0x00,
 219   #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
 220   0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 221 }
 222
 223 $(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE)
 224 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
 225 #NV_FTW_WORKING
 226 DATA = {
 227   # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid         =
 228   #  { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65,  0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
 229   0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49,
 230   0xa0, 0xce, 0x65,  0x0, 0xfd, 0x9f, 0x1b, 0x95,
 231   # Crc:UINT32            #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
 232   0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,
 233   # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
 234   0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 235 }
 236
 237 $(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE)
 238 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
 239 #NV_FTW_SPARE
 240
 241 #########################################################
 242 # Quark Remote Management Unit Binary
 243 #########################################################
 244 $(RMU_BINARY_BASE)|$(RMU_BINARY_SIZE)
 245 INF  QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/QuarkMicrocode.inf
 246
 247 #########################################################
 248 # PlatformData Binary, default for standalone is none built-in so user selects.
 249 #########################################################
 250 $(VPD_BASE)|$(VPD_SIZE)
 251 gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress
 252 FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin
 253
 254 #######################
 255 # Quark FVRECOVERY Image
 256 #######################
 257 $(FVRECOVERY_IMAGE_BASE)|$(FVRECOVERY_IMAGE_SIZE)
 258 gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize
 259 FV = FVRECOVERY
 260
 261 ################################################################################
 262 #
 263 # FV Section
 264 #
 265 # [FV] section is used to define what components or modules are placed within a flash
 266 # device file.  This section also defines order the components and modules are positioned
 267 # within the image.  The [FV] section consists of define statements, set statements and
 268 # module statements.
 269 #
 270 ################################################################################
 271 [FV.FVRECOVERY]
 272 BlockSize          = $(FLASH_BLOCKSIZE)
 273 FvAlignment        = 16         #FV alignment and FV attributes setting.
 274 ERASE_POLARITY     = 1
 275 MEMORY_MAPPED      = TRUE
 276 STICKY_WRITE       = TRUE
 277 LOCK_CAP           = TRUE
 278 LOCK_STATUS        = TRUE
 279 WRITE_DISABLED_CAP = TRUE
 280 WRITE_ENABLED_CAP  = TRUE
 281 WRITE_STATUS       = TRUE
 282 WRITE_LOCK_CAP     = TRUE
 283 WRITE_LOCK_STATUS  = TRUE
 284 READ_DISABLED_CAP  = TRUE
 285 READ_ENABLED_CAP   = TRUE
 286 READ_STATUS        = TRUE
 287 READ_LOCK_CAP      = TRUE
 288 READ_LOCK_STATUS   = TRUE
 289 FvNameGuid         = 18D6D9F4-2EEF-4913-AEE6-BE61C6DA6CC8
 290
 291 ################################################################################
 292 #
 293 # The INF statements point to EDK component and EDK II module INF files, which will be placed into this FV image.
 294 # Parsing tools will scan the INF file to determine the type of component or module.
 295 # The component or module type is used to reference the standard rules
 296 # defined elsewhere in the FDF file.
 297 #
 298 # The format for INF statements is:
 299 # INF $(PathAndInfFileName)
 300 #
 301 ################################################################################
 302
 303 ##
 304 #  PEI Apriori file example, more PEIM module added later.
 305 ##
 306 APRIORI PEI {
 307   INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 308   # PlatformConfigPei should be immediately after Pcd driver.
 309   INF  QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf
 310   INF  MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf
 311 }
 312
 313 ##
 314 #  SEC Phase modules
 315 ##
 316 INF  UefiCpuPkg/SecCore/SecCore.inf
 317
 318 INF  MdeModulePkg/Core/Pei/PeiMain.inf
 319
 320 ##
 321 #  PEI Phase RAW Data files.
 322 ##
 323 FILE FREEFORM = PCD(gEfiQuarkNcSocIdTokenSpaceGuid.PcdQuarkMicrocodeFile) {
 324   SECTION RAW = QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin
 325 }
 326
 327 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 328 INF  QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf
 329 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
 330 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
 331 INF  RuleOverride = NORELOC  QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/MemoryInitPei.inf
 332 INF  QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.inf
 333 INF  MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf
 334 INF  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
 335
 336 ################################################################################
 337 #
 338 # FV Section
 339 #
 340 # [FV] section is used to define what components or modules are placed within a flash
 341 # device file.  This section also defines order the components and modules are positioned
 342 # within the image.  The [FV] section consists of define statements, set statements and
 343 # module statements.
 344 #
 345 ################################################################################
 346 [FV.FVMAIN]
 347 BlockSize          = $(FLASH_BLOCKSIZE)
 348 FvAlignment        = 16
 349 ERASE_POLARITY     = 1
 350 MEMORY_MAPPED      = TRUE
 351 STICKY_WRITE       = TRUE
 352 LOCK_CAP           = TRUE
 353 LOCK_STATUS        = TRUE
 354 WRITE_DISABLED_CAP = TRUE
 355 WRITE_ENABLED_CAP  = TRUE
 356 WRITE_STATUS       = TRUE
 357 WRITE_LOCK_CAP     = TRUE
 358 WRITE_LOCK_STATUS  = TRUE
 359 READ_DISABLED_CAP  = TRUE
 360 READ_ENABLED_CAP   = TRUE
 361 READ_STATUS        = TRUE
 362 READ_LOCK_CAP      = TRUE
 363 READ_LOCK_STATUS   = TRUE
 364 FvNameGuid         = 30D9ED01-38D2-418a-90D5-C561750BF80F
 365
 366 ##
 367 #  DXE Phase modules
 368 ##
 369 INF  MdeModulePkg/Core/Dxe/DxeMain.inf
 370 INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 371
 372 !if $(SOURCE_DEBUG_ENABLE)
 373   INF  SourceLevelDebugPkg/DebugAgentDxe/DebugAgentDxe.inf
 374 !endif
 375
 376 #
 377 # Early SoC / Platform modules
 378 #
 379 INF  QuarkPlatformPkg/Platform/Dxe/PlatformInit/PlatformInitDxe.inf
 380
 381 ##
 382 #  EDK Core modules
 383 ##
 384 INF  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
 385
 386 INF  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
 387 INF  UefiCpuPkg/CpuDxe/CpuDxe.inf
 388 INF  MdeModulePkg/Universal/Metronome/Metronome.inf
 389 INF  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
 390 INF  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
 391 INF  MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
 392 INF  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
 393 INF  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
 394 INF  MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
 395 INF  PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
 396 INF  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
 397 INF  MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
 398
 399 #
 400 # Platform
 401 #
 402 INF  MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 403 #INF  MdeModulePkg/Application/UiApp/UiApp.inf
 404
 405 INF  QuarkPlatformPkg/Pci/Dxe/PciHostBridge/PciHostBridge.inf
 406 INF  QuarkSocPkg/QuarkNorthCluster/QNCInit/Dxe/QNCInitDxe.inf
 407 INF  PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
 408 INF  QuarkPlatformPkg/Platform/Dxe/Setup/DxePlatform.inf
 409
 410 #
 411 # PCI
 412 #
 413 INF  QuarkPlatformPkg/Pci/Dxe/PciPlatform/PciPlatform.inf
 414 INF  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
 415 INF  QuarkSocPkg/QuarkSouthCluster/IohInit/Dxe/IohInitDxe.inf
 416 !if $(SOURCE_DEBUG_ENABLE)
 417 !else
 418 INF  MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf
 419 !endif
 420
 421 #
 422 # Console
 423 #
 424 INF  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
 425 INF  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
 426 INF  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
 427
 428 INF  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 429 INF  MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
 430 INF  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
 431 INF  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
 432
 433 #
 434 # File System Modules
 435 #
 436 INF  MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
 437
 438 #
 439 # Performance Application
 440 #
 441 !if $(PERFORMANCE_ENABLE)
 442 INF  ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
 443 !endif
 444
 445 ################################################################################
 446 #
 447 # FV Section
 448 #
 449 # [FV] section is used to define what components or modules are placed within a flash
 450 # device file.  This section also defines order the components and modules are positioned
 451 # within the image.  The [FV] section consists of define statements, set statements and
 452 # module statements.
 453 #
 454 ################################################################################
 455 [FV.FVMAIN_COMPACT]
 456 FvAlignment        = 16
 457 ERASE_POLARITY     = 1
 458 MEMORY_MAPPED      = TRUE
 459 STICKY_WRITE       = TRUE
 460 LOCK_CAP           = TRUE
 461 LOCK_STATUS        = TRUE
 462 WRITE_DISABLED_CAP = TRUE
 463 WRITE_ENABLED_CAP  = TRUE
 464 WRITE_STATUS       = TRUE
 465 WRITE_LOCK_CAP     = TRUE
 466 WRITE_LOCK_STATUS  = TRUE
 467 READ_DISABLED_CAP  = TRUE
 468 READ_ENABLED_CAP   = TRUE
 469 READ_STATUS        = TRUE
 470 READ_LOCK_CAP      = TRUE
 471 READ_LOCK_STATUS   = TRUE
 472
 473 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
 474   SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 {    # TIANO COMPRESS GUID
 475     SECTION FV_IMAGE = FVMAIN
 476   }
 477 }
 478
 479 ################################################################################
 480 #
 481 # FV Section
 482 #
 483 # [FV] section is used to define what components or modules are placed within a flash
 484 # device file.  This section also defines order the components and modules are positioned
 485 # within the image.  The [FV] section consists of define statements, set statements and
 486 # module statements.
 487 #
 488 ################################################################################
 489 [FV.PAYLOAD]
 490 BlockSize          = $(FLASH_BLOCKSIZE)
 491 FvAlignment        = 16         #FV alignment and FV attributes setting.
 492 ERASE_POLARITY     = 1
 493 MEMORY_MAPPED      = TRUE
 494 STICKY_WRITE       = TRUE
 495 LOCK_CAP           = TRUE
 496 LOCK_STATUS        = TRUE
 497 WRITE_DISABLED_CAP = TRUE
 498 WRITE_ENABLED_CAP  = TRUE
 499 WRITE_STATUS       = TRUE
 500 WRITE_LOCK_CAP     = TRUE
 501 WRITE_LOCK_STATUS  = TRUE
 502 READ_DISABLED_CAP  = TRUE
 503 READ_ENABLED_CAP   = TRUE
 504 READ_STATUS        = TRUE
 505 READ_LOCK_CAP      = TRUE
 506 READ_LOCK_STATUS   = TRUE
 507
 508 #
 509 # Shell and Applications
 510 #
 511 INF  ShellPkg/Application/Shell/Shell.inf
 512
 513 ################################################################################
 514 #
 515 # Rules are use with the [FV] section's module INF type to define
 516 # how an FFS file is created for a given INF file. The following Rule are the default
 517 # rules for the different module type. User can add the customized rules to define the
 518 # content of the FFS file.
 519 #
 520 ################################################################################
 521 [Rule.Common.SEC]
 522   FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
 523     TE  TE    Align = 8       $(INF_OUTPUT)/$(MODULE_NAME).efi
 524     RAW BIN   Align = 16      |.com
 525   }
 526
 527 [Rule.Common.PEI_CORE]
 528   FILE PEI_CORE = $(NAMED_GUID)            {
 529     TE       TE               $(INF_OUTPUT)/$(MODULE_NAME).efi
 530     UI       STRING="$(MODULE_NAME)" Optional
 531     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 532   }
 533
 534 [Rule.Common.PEIM.NORELOC]
 535   FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED  {
 536      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 537      TE        TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
 538      UI        STRING="$(MODULE_NAME)" Optional
 539      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 540   }
 541
 542 [Rule.Common.PEIM]
 543   FILE PEIM = $(NAMED_GUID)               {
 544      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 545      TE        TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
 546      UI        STRING="$(MODULE_NAME)" Optional
 547      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 548   }
 549
 550 [Rule.Common.DXE_CORE]
 551   FILE DXE_CORE = $(NAMED_GUID) {
 552     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 553     UI        STRING="$(MODULE_NAME)" Optional
 554     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 555   }
 556
 557 [Rule.Common.UEFI_DRIVER]
 558   FILE DRIVER = $(NAMED_GUID) {
 559     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 560     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 561     UI        STRING="$(MODULE_NAME)" Optional
 562     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 563   }
 564
 565 [Rule.Common.DXE_DRIVER]
 566   FILE DRIVER = $(NAMED_GUID) {
 567     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 568     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 569     UI        STRING="$(MODULE_NAME)" Optional
 570     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 571   }
 572
 573 [Rule.Common.DXE_RUNTIME_DRIVER]
 574   FILE DRIVER = $(NAMED_GUID) {
 575     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 576     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 577     UI        STRING="$(MODULE_NAME)" Optional
 578     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 579   }
 580
 581 [Rule.Common.DXE_SMM_DRIVER]
 582   FILE SMM = $(NAMED_GUID) {
 583     SMM_DEPEX SMM_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 584     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 585     UI        STRING="$(MODULE_NAME)" Optional
 586     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 587   }
 588
 589 [Rule.Common.SMM_CORE]
 590   FILE SMM_CORE = $(NAMED_GUID) {
 591     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 592     UI        STRING="$(MODULE_NAME)" Optional
 593     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 594   }
 595
 596 [Rule.Common.UEFI_APPLICATION]
 597   FILE APPLICATION = $(NAMED_GUID) {
 598     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 599     UI        STRING="$(MODULE_NAME)" Optional
 600     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 601   }
 602
 603 [Rule.Common.UEFI_APPLICATION.UI]
 604   FILE APPLICATION = $(NAMED_GUID) {
 605     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 606     UI        STRING="Enter Setup"
 607     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 608   }
 609
 610 [Rule.Common.USER_DEFINED.ACPITABLE]
 611   FILE FREEFORM = $(NAMED_GUID) {
 612     RAW ACPI               |.acpi
 613     RAW ASL                |.aml
 614   }