QuarkPlatformPkg/QuarkMin.fdf

   1 ## @file
   2 # FDF file of Clanton Peak CRB platform with 32-bit DXE
   3 #
   4 # This package provides QuarkNcSocId platform specific modules.
   5 # Copyright (c) 2013 - 2019 Intel Corporation.
   6 #
   7 # SPDX-License-Identifier: BSD-2-Clause-Patent
   8 #
   9 ##
  10
  11 ################################################################################
  12 #
  13 # Defines Section - statements that will be processed to create a Makefile.
  14 #
  15 ################################################################################
  16 [Defines]
  17 #                  Address 0x100000000 (4 GB reset address)
  18 #                                 Base                               Size
  19 #                                      +---------------------------+
  20 #                           FLASH_BASE | FD.Quark:                 | 0x800000 (8 MB)
  21 #                           0xFF800000 | BaseAddress               |
  22 #                                      +---------------------------+
  23 #
  24 # Flash offsets are 0 based, but are relative to FD.Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part.
  25 # 0xFF800000 + 0x400000 = 0xFFC00000.
  26 #
  27 #                          Address 0x0 (0xFF800000 for 8 MB SPI part)
  28 #                                      +---------------------------+
  29 #                FLASH_FV_PAYLOAD_BASE | Payload Image             | FLASH_FV_PAYLOAD_SIZE
  30 #                           0x00400000 |                           | 0x00100000
  31 #                                      +---------------------------+
  32 #                   FLASH_FV_MAIN_BASE | FvMain Image (Compressed) | FLASH_FV_MAIN_SIZE
  33 #                           0x00500000 |                           | 0x001E0000
  34 #                                      +---------------------------+
  35 #                      NVRAM_AREA_BASE | NVRAM Area=               | NVRAM_AREA_SIZE
  36 #                           0x006E0000 | Variable + FTW Working +  |
  37 #                                      | FTW Spare                 |
  38 #                                      +---+-------------------+---+
  39 #                 NVRAM_AREA_VARIABLE_BASE |                   | NVRAM_AREA_VARIABLE_SIZE
  40 #                                          |                   |
  41 #                                          +-------------------+
  42 #                         FTW_WORKING_BASE |                   | FTW_WORKING_SIZE
  43 #                                          |                   |
  44 #                                          +-------------------+
  45 #                           FTW_SPARE_BASE |                   | FTW_SPARE_SIZE
  46 #                                          |                   |
  47 #                                      +---+-------------------+---+
  48 #                      RMU_BINARY_BASE | RMU Binary                | RMU_BINARY_SIZE
  49 #                           0x00700000 |                           | 0x00008000
  50 #                                      +---------------------------+
  51 #                   PLATFORM_DATA_BASE | PlatformData Binary       | PLATFORM_DATA_SIZE
  52 #                           0x00710000 |                           | 0x00001000
  53 #                                      +---------------------------+
  54 #                FVRECOVERY_IMAGE_BASE | FVRECOVERY Image          | FVRECOVERY_IMAGE_SIZE
  55 #                             0x720000 |                           | 0x000E0000
  56 #                                      +---------------------------+
  57
  58   #
  59   # Define value used to compute FLASH regions below reset vector location just below 4GB
  60   #
  61   DEFINE RESET_ADDRESS                           = 0x100000000       # 4 GB
  62
  63   #
  64   # Set size of FLASH to 8MB
  65   #
  66   DEFINE FLASH_SIZE                              = 0x800000
  67   DEFINE FLASH_BASE                              = $(RESET_ADDRESS) - $(FLASH_SIZE)                                                      # The base address of the Flash Device
  68
  69   #
  70   # Set FLASH block size to 4KB
  71   #
  72   DEFINE FLASH_BLOCKSIZE                         = 0x1000            # 4 KB
  73
  74   #
  75   # Misc settings
  76   #
  77   DEFINE FLASH_BLOCKSIZE_DATA                    = 0x00, 0x10, 0x00, 0x00                                                                # equivalent for DATA blocks
  78
  79   #
  80   # Start PAYLOAD at 4MB into 8MB FLASH
  81   #
  82   DEFINE FLASH_FV_PAYLOAD_BASE                   = 0x00400000
  83   DEFINE FLASH_FV_PAYLOAD_SIZE                   = 0x00100000
  84
  85   #
  86   # Put FVMAIN between PAYLOAD and RMU Binary
  87   #
  88   DEFINE FLASH_FV_MAIN_BASE                      = 0x00500000
  89   DEFINE FLASH_FV_MAIN_SIZE                      = 0x001E0000
  90
  91   #
  92   # Place NV Storage just above Platform Data Base
  93   #
  94   DEFINE NVRAM_AREA_VARIABLE_BASE                = 0x006E0000
  95   DEFINE NVRAM_AREA_SIZE                         = 0x00020000
  96
  97   DEFINE NVRAM_AREA_VARIABLE_SIZE                = 0x0000E000
  98   DEFINE FTW_WORKING_BASE                        = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE)
  99   DEFINE FTW_WORKING_SIZE                        = 0x00002000
 100   DEFINE FTW_SPARE_BASE                          = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE)
 101   DEFINE FTW_SPARE_SIZE                          = $(NVRAM_AREA_SIZE) - $(NVRAM_AREA_VARIABLE_SIZE) - $(FTW_WORKING_SIZE)
 102
 103   #
 104   # RMU Binary must be at fixed address 1MB below 4GB (0xFFF00000)
 105   #
 106   DEFINE RMU_BINARY_BASE                         = 0x00700000  # HW fixed address
 107   DEFINE RMU_BINARY_SIZE                         = 0x00008000  # HW fixed address, so fixed size
 108
 109   #
 110   # Platform Data Base must be 64KB above RMU
 111   #
 112   DEFINE VPD_BASE                                = 0x00708000
 113   DEFINE VPD_SIZE                                = 0x00001000
 114
 115   #
 116   # Place FV Recovery above NV Storage
 117   #
 118   DEFINE FVRECOVERY_IMAGE_SIZE                   = 0x000F0000
 119   DEFINE FVRECOVERY_IMAGE_BASE                   = $(FLASH_SIZE) - $(FVRECOVERY_IMAGE_SIZE)
 120
 121 ################################################################################
 122 #
 123 # FD Section
 124 # The [FD] Section is made up of the definition statements and a
 125 # description of what goes into  the Flash Device Image.  Each FD section
 126 # defines one flash "device" image.  A flash device image may be one of
 127 # the following: Removable media bootable image (like a boot floppy
 128 # image,) an Option ROM image (that would be "flashed" into an add-in
 129 # card,) a System "Flash"  image (that would be burned into a system's
 130 # flash) or an Update ("Capsule") image that will be used to update and
 131 # existing system flash.
 132 #
 133 ################################################################################
 134 [FD.Quark]
 135 BaseAddress   = 0xFF800000                   #The base address of the Flash Device; set to same value as FLASH_BASE.
 136 Size          = 0x800000                     #The size in bytes of the Flash Device; set to same value as FLASH_SIZE.
 137 ErasePolarity = 1
 138 BlockSize     = $(FLASH_BLOCKSIZE)
 139 NumBlocks     = 0x800                        #The number of blocks for the Flash Device.
 140
 141 SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE)
 142 SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize        = $(FLASH_SIZE)
 143
 144 ################################################################################
 145 #
 146 # Following are lists of FD Region layout which correspond to the locations of different
 147 # images within the flash device.
 148 #
 149 # Regions must be defined in ascending order and may not overlap.
 150 #
 151 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
 152 # the pipe "|" character, followed by the size of the region, also in hex with the leading
 153 # "0x" characters. Like:
 154 # Offset|Size
 155 # PcdOffsetCName|PcdSizeCName
 156 # RegionType <FV, DATA, or FILE>
 157 #
 158 ################################################################################
 159
 160 ########################################################
 161 # Quark Payload Image
 162 ########################################################
 163 $(FLASH_FV_PAYLOAD_BASE)|$(FLASH_FV_PAYLOAD_SIZE)
 164 gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize
 165 FV = PAYLOAD
 166
 167 ########################################################
 168 # Quark FVMAIN Image (Compressed)
 169 ########################################################
 170 $(FLASH_FV_MAIN_BASE)|$(FLASH_FV_MAIN_SIZE)
 171 gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize
 172 FV = FVMAIN_COMPACT
 173
 174 #############################################################################
 175 # Quark NVRAM Area
 176 # Quark NVRAM Area contains: Variable + FTW Working + FTW Spare
 177 #############################################################################
 178 $(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE)
 179 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
 180 #NV_VARIABLE_STORE
 181 DATA = {
 182   ## This is the EFI_FIRMWARE_VOLUME_HEADER
 183   # ZeroVector []
 184   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 185   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 186   # FileSystemGuid: gEfiSystemNvDataFvGuid         =
 187   #  { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
 188   0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
 189   0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
 190   # FvLength: 0x20000
 191   0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
 192   #Signature "_FVH"       #Attributes
 193   0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
 194   #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
 195   0x48, 0x00, 0x19, 0xF9, 0x00, 0x00, 0x00, 0x02,
 196   #Blockmap[0]: 32 Blocks * 0x1000 Bytes / Block
 197   0x20, 0x00, 0x00, 0x00, $(FLASH_BLOCKSIZE_DATA),
 198   #Blockmap[1]: End
 199   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 200   ## This is the VARIABLE_STORE_HEADER
 201   !if $(SECURE_BOOT_ENABLE)
 202     # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 } }
 203     0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
 204     0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
 205   !else
 206     #  Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
 207     0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
 208     0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
 209   !endif
 210   #Size: 0x0E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x0DFB8
 211   # This can speed up the Variable Dispatch a bit.
 212   0xB8, 0xDF, 0x00, 0x00,
 213   #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
 214   0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 215 }
 216
 217 $(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE)
 218 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
 219 #NV_FTW_WORKING
 220 DATA = {
 221   # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid         =
 222   #  { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65,  0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
 223   0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49,
 224   0xa0, 0xce, 0x65,  0x0, 0xfd, 0x9f, 0x1b, 0x95,
 225   # Crc:UINT32            #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
 226   0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,
 227   # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
 228   0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 229 }
 230
 231 $(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE)
 232 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
 233 #NV_FTW_SPARE
 234
 235 #########################################################
 236 # Quark Remote Management Unit Binary
 237 #########################################################
 238 $(RMU_BINARY_BASE)|$(RMU_BINARY_SIZE)
 239 INF  QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/QuarkMicrocode.inf
 240
 241 #########################################################
 242 # PlatformData Binary, default for standalone is none built-in so user selects.
 243 #########################################################
 244 $(VPD_BASE)|$(VPD_SIZE)
 245 gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress
 246 FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin
 247
 248 #######################
 249 # Quark FVRECOVERY Image
 250 #######################
 251 $(FVRECOVERY_IMAGE_BASE)|$(FVRECOVERY_IMAGE_SIZE)
 252 gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize
 253 FV = FVRECOVERY
 254
 255 ################################################################################
 256 #
 257 # FV Section
 258 #
 259 # [FV] section is used to define what components or modules are placed within a flash
 260 # device file.  This section also defines order the components and modules are positioned
 261 # within the image.  The [FV] section consists of define statements, set statements and
 262 # module statements.
 263 #
 264 ################################################################################
 265 [FV.FVRECOVERY]
 266 BlockSize          = $(FLASH_BLOCKSIZE)
 267 FvAlignment        = 16         #FV alignment and FV attributes setting.
 268 ERASE_POLARITY     = 1
 269 MEMORY_MAPPED      = TRUE
 270 STICKY_WRITE       = TRUE
 271 LOCK_CAP           = TRUE
 272 LOCK_STATUS        = TRUE
 273 WRITE_DISABLED_CAP = TRUE
 274 WRITE_ENABLED_CAP  = TRUE
 275 WRITE_STATUS       = TRUE
 276 WRITE_LOCK_CAP     = TRUE
 277 WRITE_LOCK_STATUS  = TRUE
 278 READ_DISABLED_CAP  = TRUE
 279 READ_ENABLED_CAP   = TRUE
 280 READ_STATUS        = TRUE
 281 READ_LOCK_CAP      = TRUE
 282 READ_LOCK_STATUS   = TRUE
 283 FvNameGuid         = 18D6D9F4-2EEF-4913-AEE6-BE61C6DA6CC8
 284
 285 ################################################################################
 286 #
 287 # The INF statements point to EDK component and EDK II module INF files, which will be placed into this FV image.
 288 # Parsing tools will scan the INF file to determine the type of component or module.
 289 # The component or module type is used to reference the standard rules
 290 # defined elsewhere in the FDF file.
 291 #
 292 # The format for INF statements is:
 293 # INF $(PathAndInfFileName)
 294 #
 295 ################################################################################
 296
 297 ##
 298 #  PEI Apriori file example, more PEIM module added later.
 299 ##
 300 APRIORI PEI {
 301   INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 302   # PlatformConfigPei should be immediately after Pcd driver.
 303   INF  QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf
 304   INF  MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf
 305 }
 306
 307 ##
 308 #  SEC Phase modules
 309 ##
 310 INF  UefiCpuPkg/SecCore/SecCore.inf
 311
 312 INF  MdeModulePkg/Core/Pei/PeiMain.inf
 313
 314 ##
 315 #  PEI Phase RAW Data files.
 316 ##
 317 FILE FREEFORM = PCD(gEfiQuarkNcSocIdTokenSpaceGuid.PcdQuarkMicrocodeFile) {
 318   SECTION RAW = QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin
 319 }
 320
 321 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 322 INF  QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf
 323 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
 324 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
 325 INF  RuleOverride = NORELOC  QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/MemoryInitPei.inf
 326 INF  QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.inf
 327 INF  MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf
 328 INF  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
 329
 330 ################################################################################
 331 #
 332 # FV Section
 333 #
 334 # [FV] section is used to define what components or modules are placed within a flash
 335 # device file.  This section also defines order the components and modules are positioned
 336 # within the image.  The [FV] section consists of define statements, set statements and
 337 # module statements.
 338 #
 339 ################################################################################
 340 [FV.FVMAIN]
 341 BlockSize          = $(FLASH_BLOCKSIZE)
 342 FvAlignment        = 16
 343 ERASE_POLARITY     = 1
 344 MEMORY_MAPPED      = TRUE
 345 STICKY_WRITE       = TRUE
 346 LOCK_CAP           = TRUE
 347 LOCK_STATUS        = TRUE
 348 WRITE_DISABLED_CAP = TRUE
 349 WRITE_ENABLED_CAP  = TRUE
 350 WRITE_STATUS       = TRUE
 351 WRITE_LOCK_CAP     = TRUE
 352 WRITE_LOCK_STATUS  = TRUE
 353 READ_DISABLED_CAP  = TRUE
 354 READ_ENABLED_CAP   = TRUE
 355 READ_STATUS        = TRUE
 356 READ_LOCK_CAP      = TRUE
 357 READ_LOCK_STATUS   = TRUE
 358 FvNameGuid         = 30D9ED01-38D2-418a-90D5-C561750BF80F
 359
 360 ##
 361 #  DXE Phase modules
 362 ##
 363 INF  MdeModulePkg/Core/Dxe/DxeMain.inf
 364 INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 365
 366 !if $(SOURCE_DEBUG_ENABLE)
 367   INF  SourceLevelDebugPkg/DebugAgentDxe/DebugAgentDxe.inf
 368 !endif
 369
 370 #
 371 # Early SoC / Platform modules
 372 #
 373 INF  QuarkPlatformPkg/Platform/Dxe/PlatformInit/PlatformInitDxe.inf
 374
 375 ##
 376 #  EDK Core modules
 377 ##
 378 INF  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
 379
 380 INF  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
 381 INF  UefiCpuPkg/CpuDxe/CpuDxe.inf
 382 INF  MdeModulePkg/Universal/Metronome/Metronome.inf
 383 INF  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
 384 INF  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
 385 INF  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
 386 INF  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
 387 INF  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
 388 INF  MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
 389 INF  PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
 390 INF  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
 391 INF  MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
 392
 393 #
 394 # Platform
 395 #
 396 INF  MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 397 #INF  MdeModulePkg/Application/UiApp/UiApp.inf
 398
 399 INF  QuarkPlatformPkg/Pci/Dxe/PciHostBridge/PciHostBridge.inf
 400 INF  QuarkSocPkg/QuarkNorthCluster/QNCInit/Dxe/QNCInitDxe.inf
 401 INF  PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
 402 INF  QuarkPlatformPkg/Platform/Dxe/Setup/DxePlatform.inf
 403
 404 #
 405 # PCI
 406 #
 407 INF  QuarkPlatformPkg/Pci/Dxe/PciPlatform/PciPlatform.inf
 408 INF  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
 409 INF  QuarkSocPkg/QuarkSouthCluster/IohInit/Dxe/IohInitDxe.inf
 410 !if $(SOURCE_DEBUG_ENABLE)
 411 !else
 412 INF  MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf
 413 !endif
 414
 415 #
 416 # Console
 417 #
 418 INF  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
 419 INF  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
 420 INF  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
 421
 422 INF  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 423 INF  MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
 424 INF  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
 425 INF  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
 426
 427 #
 428 # File System Modules
 429 #
 430 INF  MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
 431
 432 #
 433 # Performance Application
 434 #
 435 !if $(PERFORMANCE_ENABLE)
 436 INF  ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
 437 !endif
 438
 439 ################################################################################
 440 #
 441 # FV Section
 442 #
 443 # [FV] section is used to define what components or modules are placed within a flash
 444 # device file.  This section also defines order the components and modules are positioned
 445 # within the image.  The [FV] section consists of define statements, set statements and
 446 # module statements.
 447 #
 448 ################################################################################
 449 [FV.FVMAIN_COMPACT]
 450 FvAlignment        = 16
 451 ERASE_POLARITY     = 1
 452 MEMORY_MAPPED      = TRUE
 453 STICKY_WRITE       = TRUE
 454 LOCK_CAP           = TRUE
 455 LOCK_STATUS        = TRUE
 456 WRITE_DISABLED_CAP = TRUE
 457 WRITE_ENABLED_CAP  = TRUE
 458 WRITE_STATUS       = TRUE
 459 WRITE_LOCK_CAP     = TRUE
 460 WRITE_LOCK_STATUS  = TRUE
 461 READ_DISABLED_CAP  = TRUE
 462 READ_ENABLED_CAP   = TRUE
 463 READ_STATUS        = TRUE
 464 READ_LOCK_CAP      = TRUE
 465 READ_LOCK_STATUS   = TRUE
 466
 467 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
 468   SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 {    # TIANO COMPRESS GUID
 469     SECTION FV_IMAGE = FVMAIN
 470   }
 471 }
 472
 473 ################################################################################
 474 #
 475 # FV Section
 476 #
 477 # [FV] section is used to define what components or modules are placed within a flash
 478 # device file.  This section also defines order the components and modules are positioned
 479 # within the image.  The [FV] section consists of define statements, set statements and
 480 # module statements.
 481 #
 482 ################################################################################
 483 [FV.PAYLOAD]
 484 BlockSize          = $(FLASH_BLOCKSIZE)
 485 FvAlignment        = 16         #FV alignment and FV attributes setting.
 486 ERASE_POLARITY     = 1
 487 MEMORY_MAPPED      = TRUE
 488 STICKY_WRITE       = TRUE
 489 LOCK_CAP           = TRUE
 490 LOCK_STATUS        = TRUE
 491 WRITE_DISABLED_CAP = TRUE
 492 WRITE_ENABLED_CAP  = TRUE
 493 WRITE_STATUS       = TRUE
 494 WRITE_LOCK_CAP     = TRUE
 495 WRITE_LOCK_STATUS  = TRUE
 496 READ_DISABLED_CAP  = TRUE
 497 READ_ENABLED_CAP   = TRUE
 498 READ_STATUS        = TRUE
 499 READ_LOCK_CAP      = TRUE
 500 READ_LOCK_STATUS   = TRUE
 501
 502 #
 503 # Shell and Applications
 504 #
 505 INF  ShellPkg/Application/Shell/Shell.inf
 506
 507 ################################################################################
 508 #
 509 # Rules are use with the [FV] section's module INF type to define
 510 # how an FFS file is created for a given INF file. The following Rule are the default
 511 # rules for the different module type. User can add the customized rules to define the
 512 # content of the FFS file.
 513 #
 514 ################################################################################
 515 [Rule.Common.SEC]
 516   FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
 517     TE  TE    Align = 8       $(INF_OUTPUT)/$(MODULE_NAME).efi
 518     RAW BIN   Align = 16      |.com
 519   }
 520
 521 [Rule.Common.PEI_CORE]
 522   FILE PEI_CORE = $(NAMED_GUID)            {
 523     TE       TE               $(INF_OUTPUT)/$(MODULE_NAME).efi
 524     UI       STRING="$(MODULE_NAME)" Optional
 525     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 526   }
 527
 528 [Rule.Common.PEIM.NORELOC]
 529   FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED  {
 530      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 531      TE        TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
 532      UI        STRING="$(MODULE_NAME)" Optional
 533      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 534   }
 535
 536 [Rule.Common.PEIM]
 537   FILE PEIM = $(NAMED_GUID)               {
 538      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 539      TE        TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
 540      UI        STRING="$(MODULE_NAME)" Optional
 541      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 542   }
 543
 544 [Rule.Common.DXE_CORE]
 545   FILE DXE_CORE = $(NAMED_GUID) {
 546     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 547     UI        STRING="$(MODULE_NAME)" Optional
 548     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 549   }
 550
 551 [Rule.Common.UEFI_DRIVER]
 552   FILE DRIVER = $(NAMED_GUID) {
 553     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 554     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 555     UI        STRING="$(MODULE_NAME)" Optional
 556     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 557   }
 558
 559 [Rule.Common.DXE_DRIVER]
 560   FILE DRIVER = $(NAMED_GUID) {
 561     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 562     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 563     UI        STRING="$(MODULE_NAME)" Optional
 564     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 565   }
 566
 567 [Rule.Common.DXE_RUNTIME_DRIVER]
 568   FILE DRIVER = $(NAMED_GUID) {
 569     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 570     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 571     UI        STRING="$(MODULE_NAME)" Optional
 572     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 573   }
 574
 575 [Rule.Common.DXE_SMM_DRIVER]
 576   FILE SMM = $(NAMED_GUID) {
 577     SMM_DEPEX SMM_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 578     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 579     UI        STRING="$(MODULE_NAME)" Optional
 580     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 581   }
 582
 583 [Rule.Common.SMM_CORE]
 584   FILE SMM_CORE = $(NAMED_GUID) {
 585     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 586     UI        STRING="$(MODULE_NAME)" Optional
 587     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 588   }
 589
 590 [Rule.Common.UEFI_APPLICATION]
 591   FILE APPLICATION = $(NAMED_GUID) {
 592     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 593     UI        STRING="$(MODULE_NAME)" Optional
 594     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 595   }
 596
 597 [Rule.Common.UEFI_APPLICATION.UI]
 598   FILE APPLICATION = $(NAMED_GUID) {
 599     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 600     UI        STRING="Enter Setup"
 601     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 602   }
 603
 604 [Rule.Common.USER_DEFINED.ACPITABLE]
 605   FILE FREEFORM = $(NAMED_GUID) {
 606     RAW ACPI               |.acpi
 607     RAW ASL                |.aml
 608   }