QuarkSocPkg/QuarkNorthCluster/Include/IntelQNCConfig.h

   1 /** @file
   2 Some configuration of QNC Package
   3
   4 Copyright (c) 2013-2015 Intel Corporation.
   5
   6 This program and the accompanying materials
   7 are licensed and made available under the terms and conditions of the BSD License
   8 which accompanies this distribution.  The full text of the license may be found at
   9 http://opensource.org/licenses/bsd-license.php
  10
  11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15
  16 #ifndef __INTEL_QNC_CONFIG_H__
  17 #define __INTEL_QNC_CONFIG_H__
  18
  19 //
  20 // QNC Fixed configurations.
  21 //
  22
  23 //
  24 // Memory arbiter fixed config values.
  25 //
  26 #define QNC_FIXED_CONFIG_ASTATUS  ((UINT32) (\
  27           (ASTATUS_PRI_NORMAL << ASTATUS0_DEFAULT_BP) | \
  28           (ASTATUS_PRI_NORMAL << ASTATUS1_DEFAULT_BP) | \
  29           (ASTATUS_PRI_URGENT << ASTATUS0_RASISED_BP) | \
  30           (ASTATUS_PRI_URGENT << ASTATUS1_RASISED_BP) \
  31           ))
  32
  33 //
  34 // Memory Manager fixed config values.
  35 //
  36 #define V_DRAM_NON_HOST_RQ_LIMIT                    2
  37
  38 //
  39 // RMU Thermal config fixed config values for TS in Vref Mode.
  40 //
  41 #define V_TSCGF1_CONFIG_ISNSCURRENTSEL_VREF_MODE    0x04
  42 #define V_TSCGF2_CONFIG2_ISPARECTRL_VREF_MODE       0x01
  43 #define V_TSCGF1_CONFIG_IBGEN_VREF_MODE             1
  44 #define V_TSCGF2_CONFIG_IDSCONTROL_VREF_MODE        0x011b
  45 #define V_TSCGF2_CONFIG2_ICALCOARSETUNE_VREF_MODE   0x34
  46
  47 //
  48 // RMU Thermal config fixed config values for TS in Ratiometric mode.
  49 //
  50 #define V_TSCGF1_CONFIG_ISNSCURRENTSEL_RATIO_MODE   0x04
  51 #define V_TSCGF1_CONFIG_ISNSCHOPSEL_RATIO_MODE      0x02
  52 #define V_TSCGF1_CONFIG_ISNSINTERNALVREFEN_RATIO_MODE 1
  53 #define V_TSCGF2_CONFIG_IDSCONTROL_RATIO_MODE       0x011f
  54 #define V_TSCGF2_CONFIG_IDSTIMING_RATIO_MODE        0x0001
  55 #define V_TSCGF2_CONFIG2_ICALCONFIGSEL_RATIO_MODE   0x01
  56 #define V_TSCGF2_CONFIG2_ISPARECTRL_RATIO_MODE      0x00
  57 #define V_TSCGF1_CONFIG_IBGEN_RATIO_MODE            0
  58 #define V_TSCGF1_CONFIG_IBGCHOPEN_RATIO_MODE        0
  59 #define V_TSCGF3_CONFIG_ITSGAMMACOEFF_RATIO_MODE    0xC8
  60 #define V_TSCGF2_CONFIG2_ICALCOARSETUNE_RATIO_MODE  0x17
  61
  62 //
  63 // iCLK fixed config values.
  64 //
  65 #define V_MUXTOP_FLEX2                              3
  66 #define V_MUXTOP_FLEX1                              1
  67
  68 //
  69 // PCIe Root Port fixed config values.
  70 //
  71 #define V_PCIE_ROOT_PORT_SBIC_VALUE                 (B_QNC_PCIE_IOSFSBCTL_SBIC_IDLE_NEVER)
  72
  73 //
  74 // QNC structures for configuration.
  75 //
  76
  77 typedef union {
  78   struct {
  79     UINT32  PortErrorMask               :8;
  80     UINT32  SlotImplemented             :1;
  81     UINT32  Reserved1                   :1;
  82     UINT32  AspmEnable                  :1;
  83     UINT32  AspmAutoEnable              :1;
  84     UINT32  AspmL0sEnable               :2;
  85     UINT32  AspmL1Enable                :1;
  86     UINT32  PmeInterruptEnable          :1;
  87     UINT32  PhysicalSlotNumber          :13;
  88     UINT32  Reserved2                   :1;
  89     UINT32  PmSciEnable                 :1;
  90     UINT32  HotplugSciEnable            :1;
  91   } Bits;
  92   UINT32 Uint32;
  93 } PCIEXP_ROOT_PORT_CONFIGURATION;
  94
  95 typedef union {
  96   UINT32 Uint32;
  97   struct {
  98     UINT32 Pcie_0     :1;   // 0: Disabled; 1: Enabled*
  99     UINT32 Pcie_1     :1;   // 0: Disabled; 1: Enabled*
 100     UINT32 Smbus      :1;   // 0: Disabled; 1: Enabled*
 101     UINT32 Rsvd       :29;  // 0
 102   } Bits;
 103 } QNC_DEVICE_ENABLES;
 104
 105 #endif
 106