QuarkSocPkg/QncSmmDispatcher: Fix context passed to SMI handlers
[mirror_edk2.git] / QuarkSocPkg / QuarkNorthCluster / Include / IntelQNCRegs.h
1 /** @file
2 Registers definition for Intel QuarkNcSocId.
3
4 Copyright (c) 2013-2015 Intel Corporation.
5
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #ifndef __INTEL_QNC_REGS_H__
17 #define __INTEL_QNC_REGS_H__
18
19 #include <QNCAccess.h>
20
21 //
22 // PCI HostBridge Segment number
23 //
24 #define QNC_PCI_HOST_BRIDGE_SEGMENT_NUMBER 0
25
26 //
27 // PCI RootBridge resource allocation's attribute
28 //
29 #define QNC_PCI_ROOT_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTE \
30 EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM
31
32 //
33 // PCI HostBridge resource appeture
34 //
35 #define QNC_PCI_HOST_BRIDGE_RESOURCE_APPETURE_BUSBASE 0x0
36 #define QNC_PCI_HOST_BRIDGE_RESOURCE_APPETURE_BUSLIMIT 0xff
37 #define QNC_PCI_HOST_BRIDGE_RESOURCE_APPETURE_TSEG_SIZE 0x10000000
38
39 //
40 // PCI RootBridge configure port
41 //
42 #define QNC_PCI_ROOT_BRIDGE_CONFIGURATION_ADDRESS_PORT 0xCF8
43 #define QNC_PCI_ROOT_BRIDGE_CONFIGURATION_DATA_PORT 0xCFC
44
45 //
46 // PCI Rootbridge's support feature
47 //
48 #define QNC_PCI_ROOT_BRIDGE_SUPPORTED (EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | \
49 EFI_PCI_ATTRIBUTE_ISA_IO | \
50 EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO | \
51 EFI_PCI_ATTRIBUTE_VGA_MEMORY | \
52 EFI_PCI_ATTRIBUTE_VGA_IO)
53
54 #endif // __INTEL_QNC_REGS_H__