2 QNC Smm Library Services that implements SMM Region access, S/W SMI generation and detection.
4 Copyright (c) 2013-2015 Intel Corporation.
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 #include <IntelQNCRegs.h>
19 #include <Library/DebugLib.h>
20 #include <Library/PcdLib.h>
21 #include <Library/IoLib.h>
22 #include <Uefi/UefiBaseType.h>
23 #include <Library/QNCAccessLib.h>
25 #define BOOT_SERVICE_SOFTWARE_SMI_DATA 0
26 #define RUNTIME_SOFTWARE_SMI_DATA 1
29 Triggers a run time or boot time SMI.
31 This function triggers a software SMM interrupt and set the APMC status with an 8-bit Data.
33 @param Data The value to set the APMC status.
47 GPE0BLK_Base
= (UINT16
)(LpcPciCfg32 (R_QNC_LPC_GPE0BLK
) & 0xFFFF);
53 IoOr32 ((GPE0BLK_Base
+ R_QNC_GPE0BLK_SMIE
), B_QNC_GPE0BLK_SMIE_APM
);
56 // Enable SMI globally
58 NewValue
= QNCPortRead (QUARK_NC_HOST_BRIDGE_SB_PORT_ID
, QNC_MSG_FSBIC_REG_HMISC
);
60 QNCPortWrite (QUARK_NC_HOST_BRIDGE_SB_PORT_ID
, QNC_MSG_FSBIC_REG_HMISC
, NewValue
);
65 IoWrite8 (PcdGet16 (PcdSmmDataPort
), Data
);
68 // Generate the APM SMI
70 IoWrite8 (PcdGet16 (PcdSmmActivationPort
), PcdGet8 (PcdSmmActivationData
));
73 // Clear the APM SMI Status Bit
75 IoWrite32 ((GPE0BLK_Base
+ R_QNC_GPE0BLK_SMIS
), B_QNC_GPE0BLK_SMIS_APM
);
80 IoOr32 ((GPE0BLK_Base
+ R_QNC_GPE0BLK_SMIS
), B_QNC_GPE0BLK_SMIS_EOS
);
85 Triggers an SMI at boot time.
87 This function triggers a software SMM interrupt at boot time.
92 TriggerBootServiceSoftwareSmi (
96 InternalTriggerSmi (BOOT_SERVICE_SOFTWARE_SMI_DATA
);
101 Triggers an SMI at run time.
103 This function triggers a software SMM interrupt at run time.
108 TriggerRuntimeSoftwareSmi (
112 InternalTriggerSmi (RUNTIME_SOFTWARE_SMI_DATA
);
117 Gets the software SMI data.
119 This function tests if a software SMM interrupt happens. If a software SMI happens,
120 it retrieves the SMM data and returns it as a non-negative value; otherwise a negative
123 @return Data The data retrieved from SMM data port in case of a software SMI;
124 otherwise a negative value.
128 InternalGetSwSmiData (
135 SmiStatus
= IoRead8 ((UINT16
)(LpcPciCfg32 (R_QNC_LPC_GPE0BLK
) & 0xFFFF) + R_QNC_GPE0BLK_SMIS
);
136 if (((SmiStatus
& B_QNC_GPE0BLK_SMIS_APM
) != 0) &&
137 (IoRead8 (PcdGet16 (PcdSmmActivationPort
)) == PcdGet8 (PcdSmmActivationData
))) {
138 Data
= IoRead8 (PcdGet16 (PcdSmmDataPort
));
139 return (INTN
)(UINTN
)Data
;
147 Test if a boot time software SMI happened.
149 This function tests if a software SMM interrupt happened. If a software SMM interrupt happened and
150 it was triggered at boot time, it returns TRUE. Otherwise, it returns FALSE.
152 @retval TRUE A software SMI triggered at boot time happened.
153 @retval FLASE No software SMI happened or the software SMI was triggered at run time.
158 IsBootServiceSoftwareSmi (
162 return (BOOLEAN
) (InternalGetSwSmiData () == BOOT_SERVICE_SOFTWARE_SMI_DATA
);
167 Test if a run time software SMI happened.
169 This function tests if a software SMM interrupt happened. If a software SMM interrupt happened and
170 it was triggered at run time, it returns TRUE. Otherwise, it returns FALSE.
172 @retval TRUE A software SMI triggered at run time happened.
173 @retval FLASE No software SMI happened or the software SMI was triggered at boot time.
178 IsRuntimeSoftwareSmi (
182 return (BOOLEAN
) (InternalGetSwSmiData () == RUNTIME_SOFTWARE_SMI_DATA
);
189 Clear APM SMI Status Bit; Set the EOS bit.
204 GPE0BLK_Base
= (UINT16
)(LpcPciCfg32 (R_QNC_LPC_GPE0BLK
) & 0xFFFF);
207 // Clear the APM SMI Status Bit
209 IoOr16 (GPE0BLK_Base
+ R_QNC_GPE0BLK_SMIS
, B_QNC_GPE0BLK_SMIS_APM
);
214 IoOr32 (GPE0BLK_Base
+ R_QNC_GPE0BLK_SMIS
, B_QNC_GPE0BLK_SMIS_EOS
);
218 This routine is the chipset code that accepts a request to "open" a region of SMRAM.
219 The region could be legacy ABSEG, HSEG, or TSEG near top of physical memory.
220 The use of "open" means that the memory is visible from all boot-service
223 @retval FALSE Cannot open a locked SMRAM region
224 @retval TRUE Success to open SMRAM region.
234 // Read the SMRAM register
235 Smram
= QncHsmmcRead ();
238 // Is the platform locked?
240 if (Smram
& SMM_LOCKED
) {
241 // Cannot Open a locked region
242 DEBUG ((EFI_D_WARN
, "Cannot open a locked SMRAM region\n"));
247 // Open all SMRAM regions for Host access only
249 Smram
|= (SMM_WRITE_OPEN
| SMM_READ_OPEN
); // Open for Host.
250 Smram
&= ~(NON_HOST_SMM_WR_OPEN
| NON_HOST_SMM_RD_OPEN
); // Not for others.
253 // Write the SMRAM register
255 QncHsmmcWrite (Smram
);
261 This routine is the chipset code that accepts a request to "close" a region of SMRAM.
262 The region could be legacy AB or TSEG near top of physical memory.
263 The use of "close" means that the memory is only visible from SMM agents,
264 not from BS or RT code.
266 @retval FALSE Cannot open a locked SMRAM region
267 @retval TRUE Success to open SMRAM region.
271 QNCCloseSmramRegion (
277 // Read the SMRAM register.
278 Smram
= QncHsmmcRead ();
281 // Is the platform locked?
283 if(Smram
& SMM_LOCKED
) {
284 // Cannot Open a locked region
285 DEBUG ((EFI_D_WARN
, "Cannot close a locked SMRAM region\n"));
289 Smram
&= (~(SMM_WRITE_OPEN
| SMM_READ_OPEN
| NON_HOST_SMM_WR_OPEN
| NON_HOST_SMM_RD_OPEN
));
291 QncHsmmcWrite (Smram
);
297 This routine is the chipset code that accepts a request to "lock" SMRAM.
298 The region could be legacy AB or TSEG near top of physical memory.
299 The use of "lock" means that the memory can no longer be opened
310 // Read the SMRAM register.
311 Smram
= QncHsmmcRead ();
312 if(Smram
& SMM_LOCKED
) {
313 DEBUG ((EFI_D_WARN
, "SMRAM region already locked!\n"));
317 QncHsmmcWrite (Smram
);