2 QNC Smm Library Services that implements SMM Region access, S/W SMI generation and detection.
4 Copyright (c) 2013-2016 Intel Corporation.
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 #include <IntelQNCRegs.h>
19 #include <Library/DebugLib.h>
20 #include <Library/PcdLib.h>
21 #include <Library/IoLib.h>
22 #include <Library/QNCAccessLib.h>
24 #define BOOT_SERVICE_SOFTWARE_SMI_DATA 0
25 #define RUNTIME_SOFTWARE_SMI_DATA 1
28 Triggers a run time or boot time SMI.
30 This function triggers a software SMM interrupt and set the APMC status with an 8-bit Data.
32 @param Data The value to set the APMC status.
46 GPE0BLK_Base
= (UINT16
)(LpcPciCfg32 (R_QNC_LPC_GPE0BLK
) & 0xFFFF);
52 IoOr32 ((GPE0BLK_Base
+ R_QNC_GPE0BLK_SMIE
), B_QNC_GPE0BLK_SMIE_APM
);
55 // Enable SMI globally
57 NewValue
= QNCPortRead (QUARK_NC_HOST_BRIDGE_SB_PORT_ID
, QNC_MSG_FSBIC_REG_HMISC
);
59 QNCPortWrite (QUARK_NC_HOST_BRIDGE_SB_PORT_ID
, QNC_MSG_FSBIC_REG_HMISC
, NewValue
);
64 IoWrite8 (PcdGet16 (PcdSmmDataPort
), Data
);
67 // Generate the APM SMI
69 IoWrite8 (PcdGet16 (PcdSmmActivationPort
), PcdGet8 (PcdSmmActivationData
));
72 // Clear the APM SMI Status Bit
74 IoWrite32 ((GPE0BLK_Base
+ R_QNC_GPE0BLK_SMIS
), B_QNC_GPE0BLK_SMIS_APM
);
79 IoOr32 ((GPE0BLK_Base
+ R_QNC_GPE0BLK_SMIS
), B_QNC_GPE0BLK_SMIS_EOS
);
84 Triggers an SMI at boot time.
86 This function triggers a software SMM interrupt at boot time.
91 TriggerBootServiceSoftwareSmi (
95 InternalTriggerSmi (BOOT_SERVICE_SOFTWARE_SMI_DATA
);
100 Triggers an SMI at run time.
102 This function triggers a software SMM interrupt at run time.
107 TriggerRuntimeSoftwareSmi (
111 InternalTriggerSmi (RUNTIME_SOFTWARE_SMI_DATA
);
116 Gets the software SMI data.
118 This function tests if a software SMM interrupt happens. If a software SMI happens,
119 it retrieves the SMM data and returns it as a non-negative value; otherwise a negative
122 @return Data The data retrieved from SMM data port in case of a software SMI;
123 otherwise a negative value.
127 InternalGetSwSmiData (
134 SmiStatus
= IoRead8 ((UINT16
)(LpcPciCfg32 (R_QNC_LPC_GPE0BLK
) & 0xFFFF) + R_QNC_GPE0BLK_SMIS
);
135 if (((SmiStatus
& B_QNC_GPE0BLK_SMIS_APM
) != 0) &&
136 (IoRead8 (PcdGet16 (PcdSmmActivationPort
)) == PcdGet8 (PcdSmmActivationData
))) {
137 Data
= IoRead8 (PcdGet16 (PcdSmmDataPort
));
138 return (INTN
)(UINTN
)Data
;
146 Test if a boot time software SMI happened.
148 This function tests if a software SMM interrupt happened. If a software SMM interrupt happened and
149 it was triggered at boot time, it returns TRUE. Otherwise, it returns FALSE.
151 @retval TRUE A software SMI triggered at boot time happened.
152 @retval FLASE No software SMI happened or the software SMI was triggered at run time.
157 IsBootServiceSoftwareSmi (
161 return (BOOLEAN
) (InternalGetSwSmiData () == BOOT_SERVICE_SOFTWARE_SMI_DATA
);
166 Test if a run time software SMI happened.
168 This function tests if a software SMM interrupt happened. If a software SMM interrupt happened and
169 it was triggered at run time, it returns TRUE. Otherwise, it returns FALSE.
171 @retval TRUE A software SMI triggered at run time happened.
172 @retval FLASE No software SMI happened or the software SMI was triggered at boot time.
177 IsRuntimeSoftwareSmi (
181 return (BOOLEAN
) (InternalGetSwSmiData () == RUNTIME_SOFTWARE_SMI_DATA
);
188 Clear APM SMI Status Bit; Set the EOS bit.
203 GPE0BLK_Base
= (UINT16
)(LpcPciCfg32 (R_QNC_LPC_GPE0BLK
) & 0xFFFF);
206 // Clear the APM SMI Status Bit
208 IoOr16 (GPE0BLK_Base
+ R_QNC_GPE0BLK_SMIS
, B_QNC_GPE0BLK_SMIS_APM
);
213 IoOr32 (GPE0BLK_Base
+ R_QNC_GPE0BLK_SMIS
, B_QNC_GPE0BLK_SMIS_EOS
);
217 This routine is the chipset code that accepts a request to "open" a region of SMRAM.
218 The region could be legacy ABSEG, HSEG, or TSEG near top of physical memory.
219 The use of "open" means that the memory is visible from all boot-service
222 @retval FALSE Cannot open a locked SMRAM region
223 @retval TRUE Success to open SMRAM region.
233 // Read the SMRAM register
234 Smram
= QncHsmmcRead ();
237 // Is the platform locked?
239 if (Smram
& SMM_LOCKED
) {
240 // Cannot Open a locked region
241 DEBUG ((EFI_D_WARN
, "Cannot open a locked SMRAM region\n"));
246 // Open all SMRAM regions for Host access only
248 Smram
|= (SMM_WRITE_OPEN
| SMM_READ_OPEN
); // Open for Host.
249 Smram
&= ~(NON_HOST_SMM_WR_OPEN
| NON_HOST_SMM_RD_OPEN
); // Not for others.
252 // Write the SMRAM register
254 QncHsmmcWrite (Smram
);
260 This routine is the chipset code that accepts a request to "close" a region of SMRAM.
261 The region could be legacy AB or TSEG near top of physical memory.
262 The use of "close" means that the memory is only visible from SMM agents,
263 not from BS or RT code.
265 @retval FALSE Cannot open a locked SMRAM region
266 @retval TRUE Success to open SMRAM region.
270 QNCCloseSmramRegion (
276 // Read the SMRAM register.
277 Smram
= QncHsmmcRead ();
280 // Is the platform locked?
282 if(Smram
& SMM_LOCKED
) {
283 // Cannot Open a locked region
284 DEBUG ((EFI_D_WARN
, "Cannot close a locked SMRAM region\n"));
288 Smram
&= (~(SMM_WRITE_OPEN
| SMM_READ_OPEN
| NON_HOST_SMM_WR_OPEN
| NON_HOST_SMM_RD_OPEN
));
290 QncHsmmcWrite (Smram
);
296 This routine is the chipset code that accepts a request to "lock" SMRAM.
297 The region could be legacy AB or TSEG near top of physical memory.
298 The use of "lock" means that the memory can no longer be opened
309 // Read the SMRAM register.
310 Smram
= QncHsmmcRead ();
311 if(Smram
& SMM_LOCKED
) {
312 DEBUG ((EFI_D_WARN
, "SMRAM region already locked!\n"));
316 QncHsmmcWrite (Smram
);