2 This file contains the definination for host controller
3 register operation routines.
5 Copyright (c) 2013-2015 Intel Corporation.
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
22 #define HC_STATE_RESET 0x0
23 #define HC_STATE_RESUME 0x1
24 #define HC_STATE_OPERATIONAL 0x2
25 #define HC_STATE_SUSPEND 0x3
27 #define PERIODIC_ENABLE 0x01
28 #define ISOCHRONOUS_ENABLE 0x02
29 #define CONTROL_ENABLE 0x04
30 #define BULK_ENABLE 0x08
31 #define CONTROL_BULK_RATIO 0x10
33 #define HC_FUNCTIONAL_STATE 0x20
34 #define INTERRUPT_ROUTING 0x40
37 #define CONTROL_LIST_FILLED 0x02
38 #define BULK_LIST_FILLED 0x04
39 #define CHANGE_OWNER_REQUEST 0x08
41 #define SCHEDULE_OVERRUN_COUNT 0x10
43 #define SCHEDULE_OVERRUN 0x00001
44 #define WRITEBACK_DONE_HEAD 0x00002
45 #define START_OF_FRAME 0x00004
46 #define RESUME_DETECT 0x00008
47 #define UNRECOVERABLE_ERROR 0x00010
48 #define FRAME_NUMBER_OVERFLOW 0x00020
49 #define ROOTHUB_STATUS_CHANGE 0x00040
50 #define OWNERSHIP_CHANGE 0x00080
52 #define MASTER_INTERRUPT 0x00400
54 #define CONTROL_HEAD 0x001
55 #define BULK_HEAD 0x002
56 #define DONE_HEAD 0x004
59 #define Hc_PERIODIC_CURRENT 0x002
60 #define Hc_CONTOL_HEAD 0x004
61 #define Hc_CONTROL_CURRENT_PTR 0x008
62 #define Hc_BULK_HEAD 0x010
63 #define Hc_BULK_CURRENT_PTR 0x020
64 #define Hc_DONE_HEAD 0x040
66 #define FRAME_INTERVAL 0x008
67 #define FS_LARGEST_DATA_PACKET 0x010
68 #define FRMINT_TOGGLE 0x020
69 #define FRAME_REMAINING 0x040
70 #define FRAME_REMAIN_TOGGLE 0x080
72 #define RH_DESC_A 0x00001
73 #define RH_DESC_B 0x00002
74 #define RH_NUM_DS_PORTS 0x00004
75 #define RH_NO_PSWITCH 0x00008
76 #define RH_PSWITCH_MODE 0x00010
77 #define RH_DEVICE_TYPE 0x00020
78 #define RH_OC_PROT_MODE 0x00040
79 #define RH_NOC_PROT 0x00080
80 #define RH_POTPGT 0x00100
81 #define RH_NO_POTPGT 0x00200
82 #define RH_DEV_REMOVABLE 0x00400
83 #define RH_PORT_PWR_CTRL_MASK 0x00800
85 #define RH_LOCAL_PSTAT 0x00001
86 #define RH_OC_ID 0x00002
87 #define RH_REMOTE_WK_ENABLE 0x00004
88 #define RH_LOCAL_PSTAT_CHANGE 0x00008
89 #define RH_OC_ID_CHANGE 0x00010
90 #define RH_CLR_RMT_WK_ENABLE 0x00020
92 #define RH_CLEAR_PORT_ENABLE 0x0001
93 #define RH_SET_PORT_ENABLE 0x0002
94 #define RH_SET_PORT_SUSPEND 0x0004
95 #define RH_CLEAR_SUSPEND_STATUS 0x0008
96 #define RH_SET_PORT_RESET 0x0010
97 #define RH_SET_PORT_POWER 0x0020
98 #define RH_CLEAR_PORT_POWER 0x0040
99 #define RH_CONNECT_STATUS_CHANGE 0x10000
100 #define RH_PORT_ENABLE_STAT_CHANGE 0x20000
101 #define RH_PORT_SUSPEND_STAT_CHANGE 0x40000
102 #define RH_OC_INDICATOR_CHANGE 0x80000
103 #define RH_PORT_RESET_STAT_CHANGE 0x100000
105 #define RH_CURR_CONNECT_STAT 0x0001
106 #define RH_PORT_ENABLE_STAT 0x0002
107 #define RH_PORT_SUSPEND_STAT 0x0004
108 #define RH_PORT_OC_INDICATOR 0x0008
109 #define RH_PORT_RESET_STAT 0x0010
110 #define RH_PORT_POWER_STAT 0x0020
111 #define RH_LSDEVICE_ATTACHED 0x0040
113 #define RESET_SYSTEM_BUS (1 << 0)
114 #define RESET_HOST_CONTROLLER (1 << 1)
115 #define RESET_CLOCK_GENERATION (1 << 2)
116 #define RESET_SSE_GLOBAL (1 << 5)
117 #define RESET_PSPL (1 << 6)
118 #define RESET_PCPL (1 << 7)
119 #define RESET_SSEP1 (1 << 9)
120 #define RESET_SSEP2 (1 << 10)
121 #define RESET_SSEP3 (1 << 11)
123 #define ONE_SECOND 1000000
124 #define ONE_MILLI_SEC 1000
125 #define MAX_BYTES_PER_TD 0x1000
126 #define MAX_RETRY_TIMES 100
127 #define PORT_NUMBER_ON_MAINSTONE2 1
131 // Operational Register Offsets
135 // Command & Status Registers Offsets
137 #define HC_REVISION 0x00
138 #define HC_CONTROL 0x04
139 #define HC_COMMAND_STATUS 0x08
140 #define HC_INTERRUPT_STATUS 0x0C
141 #define HC_INTERRUPT_ENABLE 0x10
142 #define HC_INTERRUPT_DISABLE 0x14
145 // Memory Pointer Offsets
148 #define HC_PERIODIC_CURRENT 0x1C
149 #define HC_CONTROL_HEAD 0x20
150 #define HC_CONTROL_CURRENT_PTR 0x24
151 #define HC_BULK_HEAD 0x28
152 #define HC_BULK_CURRENT_PTR 0x2C
153 #define HC_DONE_HEAD 0x30
156 // Frame Register Offsets
158 #define HC_FRM_INTERVAL 0x34
159 #define HC_FRM_REMAINING 0x38
160 #define HC_FRM_NUMBER 0x3C
161 #define HC_PERIODIC_START 0x40
162 #define HC_LS_THREASHOLD 0x44
165 // Root Hub Register Offsets
167 #define HC_RH_DESC_A 0x48
168 #define HC_RH_DESC_B 0x4C
169 #define HC_RH_STATUS 0x50
170 #define HC_RH_PORT_STATUS 0x54
172 #define USBHOST_OFFSET_UHCHR 0x64 // Usb Host reset register
174 #define OHC_BAR_INDEX 0
177 // Usb Host controller register offset
179 #define USBHOST_OFFSET_UHCREV 0x0 // Usb Host revision register
180 #define USBHOST_OFFSET_UHCHCON 0x4 // Usb Host control register
181 #define USBHOST_OFFSET_UHCCOMS 0x8 // Usb Host Command Status register
182 #define USBHOST_OFFSET_UHCINTS 0xC // Usb Host Interrupt Status register
183 #define USBHOST_OFFSET_UHCINTE 0x10 // Usb Host Interrupt Enable register
184 #define USBHOST_OFFSET_UHCINTD 0x14 // Usb Host Interrupt Disable register
185 #define USBHOST_OFFSET_UHCHCCA 0x18 // Usb Host Controller Communication Area
186 #define USBHOST_OFFSET_UHCPCED 0x1C // Usb Host Period Current Endpoint Descriptor
187 #define USBHOST_OFFSET_UHCCHED 0x20 // Usb Host Control Head Endpoint Descriptor
188 #define USBHOST_OFFSET_UHCCCED 0x24 // Usb Host Control Current Endpoint Descriptor
189 #define USBHOST_OFFSET_UHCBHED 0x28 // Usb Host Bulk Head Endpoint Descriptor
190 #define USBHOST_OFFSET_UHCBCED 0x2C // Usb Host Bulk Current Endpoint Descriptor
191 #define USBHOST_OFFSET_UHCDHEAD 0x30 // Usb Host Done Head register
192 #define USBHOST_OFFSET_UHCFMI 0x34 // Usb Host Frame Interval register
193 #define USBHOST_OFFSET_UHCFMR 0x38 // Usb Host Frame Remaining register
194 #define USBHOST_OFFSET_UHCFMN 0x3C // Usb Host Frame Number register
195 #define USBHOST_OFFSET_UHCPERS 0x40 // Usb Host Periodic Start register
196 #define USBHOST_OFFSET_UHCLST 0x44 // Usb Host Low-Speed Threshold register
197 #define USBHOST_OFFSET_UHCRHDA 0x48 // Usb Host Root Hub Descriptor A register
198 #define USBHOST_OFFSET_UHCRHDB 0x4C // Usb Host Root Hub Descriptor B register
199 #define USBHOST_OFFSET_UHCRHS 0x50 // Usb Host Root Hub Status register
200 #define USBHOST_OFFSET_UHCRHPS1 0x54 // Usb Host Root Hub Port Status 1 register
203 // Usb Host controller register bit fields
219 UINT32 ControlBulkRatio
:2;
220 UINT32 PeriodicEnable
:1;
221 UINT32 IsochronousEnable
:1;
222 UINT32 ControlEnable
:1;
224 UINT32 FunctionalState
:2;
225 UINT32 InterruptRouting
:1;
226 UINT32 RemoteWakeup
:1;
227 UINT32 RemoteWakeupEnable
:1;
233 UINT32 ControlListFilled
:1;
234 UINT32 BulkListFilled
:1;
235 UINT32 ChangeOwnerRequest
:1;
237 UINT32 ScheduleOverrunCount
:2;
242 UINT32 SchedulingOverrun
:1;
243 UINT32 WriteBackDone
:1;
245 UINT32 ResumeDetected
:1;
246 UINT32 UnrecoverableError
:1;
247 UINT32 FrameNumOverflow
:1;
248 UINT32 RHStatusChange
:1;
250 UINT32 OwnerChange
:1;
252 } HcINTERRUPT_STATUS
;
255 UINT32 SchedulingOverrunInt
:1;
256 UINT32 WriteBackDoneInt
:1;
258 UINT32 ResumeDetectedInt
:1;
259 UINT32 UnrecoverableErrorInt
:1;
260 UINT32 FrameNumOverflowInt
:1;
261 UINT32 RHStatusChangeInt
:1;
263 UINT32 OwnerChangedInt
:1;
264 UINT32 MasterInterruptEnable
:1;
265 } HcINTERRUPT_CONTROL
;
278 UINT32 FrameInterval
:14;
280 UINT32 FSMaxDataPacket
:15;
281 UINT32 FrmIntervalToggle
:1;
285 UINT32 FrameRemaining
:14;
287 UINT32 FrameRemainingToggle
:1;
291 UINT32 FrameNumber
:16;
296 UINT32 PeriodicStart
:14;
301 UINT32 LsThreshold
:12;
306 UINT32 NumDownStrmPorts
:8;
307 UINT32 PowerSwitchMode
:1;
308 UINT32 NoPowerSwitch
:1;
310 UINT32 OverCurrentProtMode
:1;
311 UINT32 NoOverCurrentProtMode
:1;
313 UINT32 PowerOnToPowerGoodTime
:8;
317 UINT32 DeviceRemovable
:16;
318 UINT32 PortPowerControlMask
:16;
322 UINT32 LocalPowerStat
:1;
323 UINT32 OverCurrentIndicator
:1;
325 UINT32 DevRemoteWakeupEnable
:1;
326 UINT32 LocalPowerStatChange
:1;
327 UINT32 OverCurrentIndicatorChange
:1;
329 UINT32 ClearRemoteWakeupEnable
:1;
333 UINT32 CurrentConnectStat
:1;
335 UINT32 SuspendStat
:1;
336 UINT32 OCIndicator
:1;
340 UINT32 LsDeviceAttached
:1;
342 UINT32 ConnectStatChange
:1;
343 UINT32 EnableStatChange
:1;
344 UINT32 SuspendStatChange
:1;
345 UINT32 OCIndicatorChange
:1;
346 UINT32 ResetStatChange
:1;
373 Get OHCI operational reg value
375 @param Ohc UHC private data
376 @param Offset Offset of the operational reg
378 @retval Value of the register
382 OhciGetOperationalReg (
383 IN USB_OHCI_HC_DEV
*Ohc
,
388 Set OHCI operational reg value
390 @param Ohc UHC private data
391 @param Offset Offset of the operational reg
392 @param Value Value to set
394 @retval EFI_SUCCESS Value set to the reg
398 OhciSetOperationalReg (
399 USB_OHCI_HC_DEV
*Ohc
,
405 Get HcRevision reg value
407 @param Ohc UHC private data
409 @retval Value of the register
421 Set HcReset reg value
423 @param Ohc UHC private data
424 @param Field Field to set
425 @param Value Value to set
427 @retval EFI_SUCCESS Value set
433 IN USB_OHCI_HC_DEV
*Ohc
,
439 Get specific field of HcReset reg value
441 @param Ohc UHC private data
442 @param Field Field to get
444 @retval Value of the field
450 IN USB_OHCI_HC_DEV
*Ohc
,
455 Set HcControl reg value
457 @param Ohc UHC private data
458 @param Field Field to set
459 @param Value Value to set
461 @retval EFI_SUCCESS Value set
467 IN USB_OHCI_HC_DEV
*Ohc
,
473 Get specific field of HcControl reg value
475 @param Ohc UHC private data
476 @param Field Field to get
478 @retval Value of the field
485 IN USB_OHCI_HC_DEV
*Ohc
,
490 Set HcCommand reg value
492 @param Ohc UHC private data
493 @param Field Field to set
494 @param Value Value to set
496 @retval EFI_SUCCESS Value set
501 OhciSetHcCommandStatus (
502 IN USB_OHCI_HC_DEV
*Ohc
,
508 Get specific field of HcCommand reg value
510 @param Ohc UHC private data
511 @param Field Field to get
513 @retval Value of the field
518 OhciGetHcCommandStatus (
519 IN USB_OHCI_HC_DEV
*Ohc
,
524 Clear specific fields of Interrupt Status
526 @param Ohc UHC private data
527 @param Field Field to clear
529 @retval EFI_SUCCESS Fields cleared
534 OhciClearInterruptStatus (
535 IN USB_OHCI_HC_DEV
*Ohc
,
540 Get fields of HcInterrupt reg value
542 @param Ohc UHC private data
543 @param Field Field to get
545 @retval Value of the field
550 OhciGetHcInterruptStatus (
551 IN USB_OHCI_HC_DEV
*Ohc
,
556 Set Interrupt Control reg value
558 @param Ohc UHC private data
559 @param StatEnable Enable or Disable
560 @param Field Field to set
561 @param Value Value to set
563 @retval EFI_SUCCESS Value set
568 OhciSetInterruptControl (
569 IN USB_OHCI_HC_DEV
*Ohc
,
570 IN BOOLEAN StatEnable
,
576 Get field of HcInterruptControl reg value
578 @param Ohc UHC private data
579 @param Field Field to get
581 @retval Value of the field
586 OhciGetHcInterruptControl (
587 IN USB_OHCI_HC_DEV
*Ohc
,
592 Set memory pointer of specific type
594 @param Ohc UHC private data
595 @param PointerType Type of the pointer to set
596 @param Value Value to set
598 @retval EFI_SUCCESS Memory pointer set
603 OhciSetMemoryPointer(
604 IN USB_OHCI_HC_DEV
*Ohc
,
605 IN UINTN PointerType
,
610 Get memory pointer of specific type
612 @param Ohc UHC private data
613 @param PointerType Type of pointer
615 @retval Memory pointer of the specific type
620 OhciGetMemoryPointer (
621 IN USB_OHCI_HC_DEV
*Ohc
,
626 Set Frame Interval value
628 @param Ohc UHC private data
629 @param Field Field to set
630 @param Value Value to set
632 @retval EFI_SUCCESS Value set
637 OhciSetFrameInterval (
638 IN USB_OHCI_HC_DEV
*Ohc
,
644 Get field of frame interval reg value
646 @param Ohc UHC private data
647 @param Field Field to get
649 @retval Value of the field
654 OhciGetFrameInterval (
655 IN USB_OHCI_HC_DEV
*Ohc
,
660 Set Frame Remaining reg value
662 @param Ohc UHC private data
663 @param Value Value to set
665 @retval EFI_SUCCESS Value set
670 OhciSetFrameRemaining (
671 IN USB_OHCI_HC_DEV
*Ohc
,
676 Get value of frame remaining reg
678 @param Ohc UHC private data
679 @param Field Field to get
681 @retval Value of frame remaining reg
685 OhciGetFrameRemaining (
686 IN USB_OHCI_HC_DEV
*Ohc
,
691 Set frame number reg value
693 @param Ohc UHC private data
694 @param Value Value to set
696 @retval EFI_SUCCESS Value set
702 IN USB_OHCI_HC_DEV
*Ohc
,
707 Get frame number reg value
709 @param Ohc UHC private data
711 @retval Value of frame number reg
717 IN USB_OHCI_HC_DEV
*Ohc
721 Set period start reg value
723 @param Ohc UHC private data
724 @param Value Value to set
726 @retval EFI_SUCCESS Value set
731 OhciSetPeriodicStart (
732 IN USB_OHCI_HC_DEV
*Ohc
,
737 Get periodic start reg value
739 @param Ohc UHC private data
741 @param Value of periodic start reg
746 OhciGetPeriodicStart (
747 IN USB_OHCI_HC_DEV
*Ohc
751 Set Ls Threshold reg value
753 @param Ohc UHC private data
754 @param Value Value to set
756 @retval EFI_SUCCESS Value set
762 IN USB_OHCI_HC_DEV
*Ohc
,
767 Get Ls Threshold reg value
769 @param Ohc UHC private data
771 @retval Value of Ls Threshold reg
777 IN USB_OHCI_HC_DEV
*Ohc
781 Set Root Hub Descriptor reg value
783 @param Ohc UHC private data
784 @param Field Field to set
785 @param Value Value to set
787 @retval EFI_SUCCESS Value set
791 OhciSetRootHubDescriptor (
792 IN USB_OHCI_HC_DEV
*Ohc
,
798 Get Root Hub Descriptor reg value
800 @param Ohc UHC private data
801 @param Field Field to get
803 @retval Value of the field
808 OhciGetRootHubDescriptor (
809 IN USB_OHCI_HC_DEV
*Ohc
,
814 Set Root Hub Status reg value
816 @param Ohc UHC private data
817 @param Field Field to set
819 @retval EFI_SUCCESS Value set
824 OhciSetRootHubStatus (
825 IN USB_OHCI_HC_DEV
*Ohc
,
830 Get Root Hub Status reg value
832 @param Ohc UHC private data
833 @param Field Field to get
835 @retval Value of the field
840 OhciGetRootHubStatus (
841 IN USB_OHCI_HC_DEV
*Ohc
,
846 Set Root Hub Port Status reg value
848 @param Ohc UHC private data
849 @param Index Index of the port
850 @param Field Field to set
852 @retval EFI_SUCCESS Value set
857 OhciSetRootHubPortStatus (
858 IN USB_OHCI_HC_DEV
*Ohc
,
864 Get Root Hub Port Status reg value
866 @param Ohc UHC private data
867 @param Index Index of the port
868 @param Field Field to get
870 @retval Value of the field and index
875 OhciReadRootHubPortStatus (
876 IN USB_OHCI_HC_DEV
*Ohc
,