SecurityPkg/Tcg/Opal/OpalPasswordSmm/OpalNvmeMode.h

   1 /** @file
   2   Header file for NVMe function definitions
   3
   4 Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
   5 This program and the accompanying materials
   6 are licensed and made available under the terms and conditions of the BSD License
   7 which accompanies this distribution.  The full text of the license may be found at
   8 http://opensource.org/licenses/bsd-license.php
   9
  10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef __OPAL_PASSWORD_NVME_MODE_H__
  16 #define __OPAL_PASSWORD_NVME_MODE_H__
  17
  18
  19 #include "OpalNvmeReg.h"
  20
  21 #define NVME_MAX_SECTORS            0x10000
  22 //
  23 // QueueId
  24 //
  25 #define NVME_ADMIN_QUEUE            0x00
  26 #define NVME_IO_QUEUE               0x01
  27
  28 typedef struct {
  29   UINT8                             Opcode;
  30   UINT8                             FusedOperation;
  31     #define NORMAL_CMD              0x00
  32     #define FUSED_FIRST_CMD         0x01
  33     #define FUSED_SECOND_CMD        0x02
  34   UINT16                            Cid;
  35 } NVME_CDW0;
  36
  37 typedef struct {
  38   NVME_CDW0                         Cdw0;
  39   UINT8                             Flags;
  40     #define CDW10_VALID             0x01
  41     #define CDW11_VALID             0x02
  42     #define CDW12_VALID             0x04
  43     #define CDW13_VALID             0x08
  44     #define CDW14_VALID             0x10
  45     #define CDW15_VALID             0x20
  46   UINT32                            Nsid;
  47   UINT32                            Cdw10;
  48   UINT32                            Cdw11;
  49   UINT32                            Cdw12;
  50   UINT32                            Cdw13;
  51   UINT32                            Cdw14;
  52   UINT32                            Cdw15;
  53 } NVM_EXPRESS_COMMAND;
  54
  55 typedef struct {
  56   UINT32                            Cdw0;
  57   UINT32                            Cdw1;
  58   UINT32                            Cdw2;
  59   UINT32                            Cdw3;
  60 } NVM_EXPRESS_RESPONSE;
  61
  62 typedef struct {
  63   UINT64                            CommandTimeout;
  64   UINT64                            TransferBuffer;
  65   UINT32                            TransferLength;
  66   UINT64                            MetadataBuffer;
  67   UINT32                            MetadataLength;
  68   UINT8                             QueueId;
  69   NVM_EXPRESS_COMMAND               *NvmeCmd;
  70   NVM_EXPRESS_RESPONSE              *NvmeResponse;
  71 } NVM_EXPRESS_PASS_THRU_COMMAND_PACKET;
  72
  73
  74 #pragma pack(1)
  75
  76 // Internal fields
  77 typedef enum {
  78   NvmeStatusUnknown,
  79   NvmeStatusInit,
  80   NvmeStatusInuse,
  81   NvmeStatusMax,
  82 } NVME_STATUS;
  83
  84 typedef struct {
  85   UINT32                            Nbar;
  86   UINT32                            BaseMem;
  87   BOOLEAN                           PollCancellation;
  88   UINT16                            NvmeInitWaitTime;
  89
  90   NVME_STATUS                       State;
  91   UINT8                             BusID;
  92   UINT8                             DeviceID;
  93   UINT8                             FuncID;
  94   UINTN                             PciBase;
  95
  96   UINT32                            Nsid;
  97   UINT64                            Nsuuid;
  98   UINT32                            BlockSize;
  99   EFI_LBA                           LastBlock;
 100
 101   //
 102   // Pointers to 4kB aligned submission & completion queues.
 103   //
 104   NVME_SQ                           *SqBuffer[NVME_MAX_IO_QUEUES];
 105   NVME_CQ                           *CqBuffer[NVME_MAX_IO_QUEUES];
 106   UINT16                            Cid[NVME_MAX_IO_QUEUES];
 107
 108   //
 109   // Submission and completion queue indices.
 110   //
 111   NVME_SQTDBL                       SqTdbl[NVME_MAX_IO_QUEUES];
 112   NVME_CQHDBL                       CqHdbl[NVME_MAX_IO_QUEUES];
 113   UINT8                             Pt[NVME_MAX_IO_QUEUES];
 114
 115   UINTN                             SqeCount[NVME_MAX_IO_QUEUES];
 116
 117   //
 118   // Nvme controller capabilities
 119   //
 120   NVME_CAP                          Cap;
 121
 122   //
 123   // pointer to identify controller Data
 124   //
 125   NVME_ADMIN_CONTROLLER_DATA        *ControllerData;
 126   NVME_ADMIN_NAMESPACE_DATA         *NamespaceData;
 127 } NVME_CONTEXT;
 128
 129 #pragma pack()
 130
 131 /**
 132   Transfer MMIO Data to memory.
 133
 134   @param[in,out] MemBuffer - Destination: Memory address
 135   @param[in] MmioAddr      - Source: MMIO address
 136   @param[in] Size          - Size for read
 137
 138   @retval EFI_SUCCESS - MMIO read sucessfully
 139 **/
 140 EFI_STATUS
 141 NvmeMmioRead (
 142   IN OUT VOID *MemBuffer,
 143   IN     UINTN MmioAddr,
 144   IN     UINTN Size
 145   );
 146
 147 /**
 148   Transfer memory Data to MMIO.
 149
 150   @param[in,out] MmioAddr - Destination: MMIO address
 151   @param[in] MemBuffer    - Source: Memory address
 152   @param[in] Size         - Size for write
 153
 154   @retval EFI_SUCCESS - MMIO write sucessfully
 155 **/
 156 EFI_STATUS
 157 NvmeMmioWrite (
 158   IN OUT UINTN MmioAddr,
 159   IN     VOID *MemBuffer,
 160   IN     UINTN Size
 161   );
 162
 163 /**
 164   Transfer memory data to MMIO.
 165
 166   @param[in,out] MmioAddr - Destination: MMIO address
 167   @param[in] MemBuffer    - Source: Memory address
 168   @param[in] Size         - Size for write
 169
 170   @retval EFI_SUCCESS - MMIO write sucessfully
 171 **/
 172 EFI_STATUS
 173 OpalPciWrite (
 174   IN OUT UINTN MmioAddr,
 175   IN     VOID *MemBuffer,
 176   IN     UINTN Size
 177   );
 178
 179 /**
 180   Transfer MMIO data to memory.
 181
 182   @param[in,out] MemBuffer - Destination: Memory address
 183   @param[in] MmioAddr      - Source: MMIO address
 184   @param[in] Size          - Size for read
 185
 186   @retval EFI_SUCCESS - MMIO read sucessfully
 187 **/
 188 EFI_STATUS
 189 OpalPciRead (
 190   IN OUT VOID *MemBuffer,
 191   IN     UINTN MmioAddr,
 192   IN     UINTN Size
 193   );
 194
 195 /**
 196   Allocate transfer-related Data struct which is used at Nvme.
 197
 198   @param[in] ImageHandle         Image handle for this driver image
 199   @param[in] Nvme                The pointer to the NVME_CONTEXT Data structure.
 200
 201   @retval  EFI_OUT_OF_RESOURCE   The allocation is failure.
 202   @retval  EFI_SUCCESS           Successful to allocate memory.
 203
 204 **/
 205 EFI_STATUS
 206 EFIAPI
 207 NvmeAllocateResource (
 208   IN EFI_HANDLE                         ImageHandle,
 209   IN NVME_CONTEXT                       *Nvme
 210   );
 211
 212 /**
 213   Free allocated transfer-related Data struct which is used at NVMe.
 214
 215   @param[in] Nvme                The pointer to the NVME_CONTEXT Data structure.
 216
 217 **/
 218 VOID
 219 EFIAPI
 220 NvmeFreeResource (
 221   IN NVME_CONTEXT                       *Nvme
 222   );
 223
 224 /**
 225   Sends an NVM Express Command Packet to an NVM Express controller or namespace. This function supports
 226   both blocking I/O and nonblocking I/O. The blocking I/O functionality is required, and the nonblocking
 227   I/O functionality is optional.
 228
 229   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 230   @param[in] NamespaceId            - Is a 32 bit Namespace ID to which the Express HCI command packet will be sent.
 231                                       A Value of 0 denotes the NVM Express controller, a Value of all 0FFh in the namespace
 232                                       ID specifies that the command packet should be sent to all valid namespaces.
 233   @param[in] NamespaceUuid          - Is a 64 bit Namespace UUID to which the Express HCI command packet will be sent.
 234                                       A Value of 0 denotes the NVM Express controller, a Value of all 0FFh in the namespace
 235                                       UUID specifies that the command packet should be sent to all valid namespaces.
 236   @param[in,out] Packet             - A pointer to the NVM Express HCI Command Packet to send to the NVMe namespace specified
 237                                       by NamespaceId.
 238
 239   @retval EFI_SUCCESS               - The NVM Express Command Packet was sent by the host. TransferLength bytes were transferred
 240                                       to, or from DataBuffer.
 241   @retval EFI_NOT_READY             - The NVM Express Command Packet could not be sent because the controller is not ready. The caller
 242                                       may retry again later.
 243   @retval EFI_DEVICE_ERROR          - A device error occurred while attempting to send the NVM Express Command Packet.
 244   @retval EFI_INVALID_PARAMETER     - Namespace, or the contents of NVM_EXPRESS_PASS_THRU_COMMAND_PACKET are invalid. The NVM
 245                                       Express Command Packet was not sent, so no additional status information is available.
 246   @retval EFI_UNSUPPORTED           - The command described by the NVM Express Command Packet is not supported by the host adapter.
 247                                       The NVM Express Command Packet was not sent, so no additional status information is available.
 248   @retval EFI_TIMEOUT               - A timeout occurred while waiting for the NVM Express Command Packet to execute.
 249
 250 **/
 251 EFI_STATUS
 252 NvmePassThru (
 253   IN     NVME_CONTEXT                         *Nvme,
 254   IN     UINT32                               NamespaceId,
 255   IN     UINT64                               NamespaceUuid,
 256   IN OUT NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
 257   );
 258
 259 /**
 260   Waits until all NVME commands completed.
 261
 262   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 263   @param[in] Qid                    - Queue index
 264
 265   @retval EFI_SUCCESS               - All NVME commands have completed
 266   @retval EFI_TIMEOUT               - Timeout occured
 267   @retval EFI_NOT_READY             - Not all NVME commands have completed
 268   @retval others                    - Error occurred on device side.
 269 **/
 270 EFI_STATUS
 271 NvmeWaitAllComplete (
 272   IN NVME_CONTEXT       *Nvme,
 273   IN UINT8              Qid
 274   );
 275
 276 /**
 277   Initialize the Nvm Express controller.
 278
 279   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 280
 281   @retval EFI_SUCCESS               - The NVM Express Controller is initialized successfully.
 282   @retval Others                    - A device error occurred while initializing the controller.
 283
 284 **/
 285 EFI_STATUS
 286 NvmeControllerInit (
 287   IN NVME_CONTEXT       *Nvme
 288   );
 289
 290 /**
 291   Un-initialize the Nvm Express controller.
 292
 293   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 294
 295   @retval EFI_SUCCESS               - The NVM Express Controller is un-initialized successfully.
 296   @retval Others                    - A device error occurred while un-initializing the controller.
 297
 298 **/
 299 EFI_STATUS
 300 NvmeControllerExit (
 301   IN NVME_CONTEXT       *Nvme
 302   );
 303
 304 /**
 305   Check whether there are available command slots.
 306
 307   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 308   @param[in] Qid                    - Queue index
 309
 310   @retval EFI_SUCCESS               - Available command slot is found
 311   @retval EFI_NOT_READY             - No available command slot is found
 312   @retval EFI_DEVICE_ERROR          - Error occurred on device side.
 313
 314 **/
 315 EFI_STATUS
 316 NvmeHasFreeCmdSlot (
 317   IN NVME_CONTEXT       *Nvme,
 318   IN UINT8              Qid
 319   );
 320
 321 /**
 322   Check whether all command slots are clean.
 323
 324   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 325   @param[in] Qid                    - Queue index
 326
 327   @retval EFI_SUCCESS               - All command slots are clean
 328   @retval EFI_NOT_READY             - Not all command slots are clean
 329   @retval EFI_DEVICE_ERROR          - Error occurred on device side.
 330
 331 **/
 332 EFI_STATUS
 333 NvmeIsAllCmdSlotClean (
 334   IN NVME_CONTEXT       *Nvme,
 335   IN UINT8              Qid
 336   );
 337
 338 /**
 339   Read sector Data from the NVMe device.
 340
 341   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 342   @param[in,out] Buffer             - The Buffer used to store the Data read from the device.
 343   @param[in] Lba                    - The start block number.
 344   @param[in] Blocks                 - Total block number to be read.
 345
 346   @retval EFI_SUCCESS               - Datum are read from the device.
 347   @retval Others                    - Fail to read all the datum.
 348
 349 **/
 350 EFI_STATUS
 351 NvmeReadSectors (
 352   IN NVME_CONTEXT                          *Nvme,
 353   IN OUT UINT64                            Buffer,
 354   IN UINT64                                Lba,
 355   IN UINT32                                Blocks
 356   );
 357
 358 /**
 359   Write sector Data to the NVMe device.
 360
 361   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 362   @param[in] Buffer                 - The Buffer to be written into the device.
 363   @param[in] Lba                    - The start block number.
 364   @param[in] Blocks                 - Total block number to be written.
 365
 366   @retval EFI_SUCCESS               - Datum are written into the Buffer.
 367   @retval Others                    - Fail to write all the datum.
 368
 369 **/
 370 EFI_STATUS
 371 NvmeWriteSectors (
 372   IN NVME_CONTEXT                          *Nvme,
 373   IN UINT64                                Buffer,
 374   IN UINT64                                Lba,
 375   IN UINT32                                Blocks
 376   );
 377
 378 /**
 379   Flushes all modified Data to the device.
 380
 381   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 382
 383   @retval EFI_SUCCESS               - Datum are written into the Buffer.
 384   @retval Others                    - Fail to write all the datum.
 385
 386 **/
 387 EFI_STATUS
 388 NvmeFlush (
 389   IN NVME_CONTEXT                          *Nvme
 390   );
 391
 392 /**
 393   Read some blocks from the device.
 394
 395   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 396   @param[out] Buffer                - The Buffer used to store the Data read from the device.
 397   @param[in] Lba                    - The start block number.
 398   @param[in] Blocks                 - Total block number to be read.
 399
 400   @retval EFI_SUCCESS               - Datum are read from the device.
 401   @retval Others                    - Fail to read all the datum.
 402
 403 **/
 404 EFI_STATUS
 405 NvmeRead (
 406   IN NVME_CONTEXT                  *Nvme,
 407   OUT UINT64                       Buffer,
 408   IN UINT64                        Lba,
 409   IN UINTN                         Blocks
 410   );
 411
 412 /**
 413   Write some blocks to the device.
 414
 415   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 416   @param[in] Buffer                 - The Buffer to be written into the device.
 417   @param[in] Lba                    - The start block number.
 418   @param[in] Blocks                 - Total block number to be written.
 419
 420   @retval EFI_SUCCESS               - Datum are written into the Buffer.
 421   @retval Others                    - Fail to write all the datum.
 422
 423 **/
 424 EFI_STATUS
 425 NvmeWrite (
 426   IN NVME_CONTEXT                  *Nvme,
 427   IN UINT64                        Buffer,
 428   IN UINT64                        Lba,
 429   IN UINTN                         Blocks
 430   );
 431
 432 /**
 433   Security send and receive commands.
 434
 435   @param[in]     Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 436   @param[in]     SendCommand            - The flag to indicate the command type, TRUE for Send command and FALSE for receive command
 437   @param[in]     SecurityProtocol       - Security Protocol
 438   @param[in]     SpSpecific             - Security Protocol Specific
 439   @param[in]     TransferLength         - Transfer Length of Buffer (in bytes) - always a multiple of 512
 440   @param[in,out] TransferBuffer         - Address of Data to transfer
 441
 442   @return EFI_SUCCESS               - Successfully create io submission queue.
 443   @return others                    - Fail to send/receive commands.
 444
 445 **/
 446 EFI_STATUS
 447 NvmeSecuritySendReceive (
 448   IN NVME_CONTEXT                          *Nvme,
 449   IN BOOLEAN                               SendCommand,
 450   IN UINT8                                 SecurityProtocol,
 451   IN UINT16                                SpSpecific,
 452   IN UINTN                                 TransferLength,
 453   IN OUT VOID                              *TransferBuffer
 454   );
 455
 456 #endif