SecurityPkg/Tcg/Tcg2Smm/Tpm.asl

   1 /** @file
   2   The TPM2 definition block in ACPI table for TCG2 physical presence
   3   and MemoryClear.
   4
   5 Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
   6 (c)Copyright 2016 HP Development Company, L.P.<BR>
   7 Copyright (c) 2017, Microsoft Corporation.  All rights reserved. <BR>
   8 This program and the accompanying materials
   9 are licensed and made available under the terms and conditions of the BSD License
  10 which accompanies this distribution.  The full text of the license may be found at
  11 http://opensource.org/licenses/bsd-license.php
  12
  13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  15
  16 **/
  17
  18 DefinitionBlock (
  19   "Tpm.aml",
  20   "SSDT",
  21   2,
  22   "INTEL ",
  23   "Tpm2Tabl",
  24   0x1000
  25   )
  26 {
  27   Scope (\_SB)
  28   {
  29     Device (TPM)
  30     {
  31       //
  32       // TCG2
  33       //
  34
  35       //
  36       //  TAG for patching TPM2.0 _HID
  37       //
  38       Name (_HID, "NNNN0000")
  39
  40       Name (_CID, "MSFT0101")
  41
  42       //
  43       // Readable name of this device, don't know if this way is correct yet
  44       //
  45       Name (_STR, Unicode ("TPM 2.0 Device"))
  46
  47       //
  48       // Operational region for Smi port access
  49       //
  50       OperationRegion (SMIP, SystemIO, 0xB2, 1)
  51       Field (SMIP, ByteAcc, NoLock, Preserve)
  52       {
  53           IOB2, 8
  54       }
  55
  56       //
  57       // Operational region for TPM access
  58       //
  59       OperationRegion (TPMR, SystemMemory, 0xfed40000, 0x5000)
  60       Field (TPMR, AnyAcc, NoLock, Preserve)
  61       {
  62         ACC0, 8,  // TPM_ACCESS_0
  63         Offset(0x8),
  64         INTE, 32, // TPM_INT_ENABLE_0
  65         INTV, 8,  // TPM_INT_VECTOR_0
  66         Offset(0x10),
  67         INTS, 32, // TPM_INT_STATUS_0
  68         INTF, 32, // TPM_INTF_CAPABILITY_0
  69         STS0, 32, // TPM_STS_0
  70         Offset(0x24),
  71         FIFO, 32, // TPM_DATA_FIFO_0
  72         Offset(0x30),
  73         TID0, 32, // TPM_INTERFACE_ID_0
  74                   // ignore the rest
  75       }
  76
  77       //
  78       // Operational region for TPM support, TPM Physical Presence and TPM Memory Clear
  79       // Region Offset 0xFFFF0000 and Length 0xF0 will be fixed in C code.
  80       //
  81       OperationRegion (TNVS, SystemMemory, 0xFFFF0000, 0xF0)
  82       Field (TNVS, AnyAcc, NoLock, Preserve)
  83       {
  84         PPIN,   8,  //   Software SMI for Physical Presence Interface
  85         PPIP,   32, //   Used for save physical presence paramter
  86         PPRP,   32, //   Physical Presence request operation response
  87         PPRQ,   32, //   Physical Presence request operation
  88         PPRM,   32, //   Physical Presence request operation parameter
  89         LPPR,   32, //   Last Physical Presence request operation
  90         FRET,   32, //   Physical Presence function return code
  91         MCIN,   8,  //   Software SMI for Memory Clear Interface
  92         MCIP,   32, //   Used for save the Mor paramter
  93         MORD,   32, //   Memory Overwrite Request Data
  94         MRET,   32, //   Memory Overwrite function return code
  95         UCRQ,   32  //   Phyical Presence request operation to Get User Confirmation Status
  96       }
  97
  98       Name(RESO, ResourceTemplate () {
  99         Memory32Fixed (ReadWrite, 0xfed40000, 0x5000, REGS)
 100         Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , IRQ) {12}
 101       })
 102
 103       //
 104       // Return the resource consumed by TPM device.
 105       //
 106       Method(_CRS,0,Serialized)
 107       {
 108         Return(RESO)
 109       }
 110
 111       //
 112       // Set resources consumed by the TPM device. This is used to
 113       // assign an interrupt number to the device. The input byte stream
 114       // has to be the same as returned by _CRS (according to ACPI spec).
 115       //
 116       Method(_SRS,1,Serialized)
 117       {
 118         //
 119         // Update resource descriptor
 120         // Use the field name to identify the offsets in the argument
 121         // buffer and RESO buffer.
 122         //
 123         CreateDWordField(Arg0, ^IRQ._INT, IRQ0)
 124         CreateDWordField(RESO, ^IRQ._INT, LIRQ)
 125         Store(IRQ0, LIRQ)
 126
 127         CreateBitField(Arg0, ^IRQ._HE, ITRG)
 128         CreateBitField(RESO, ^IRQ._HE, LTRG)
 129         Store(ITRG, LTRG)
 130
 131         CreateBitField(Arg0, ^IRQ._LL, ILVL)
 132         CreateBitField(RESO, ^IRQ._LL, LLVL)
 133         Store(ILVL, LLVL)
 134
 135         //
 136         // Update TPM FIFO PTP/TIS interface only, identified by TPM_INTERFACE_ID_x lowest
 137         // nibble.
 138         // 0000 - FIFO interface as defined in PTP for TPM 2.0 is active
 139         // 1111 - FIFO interface as defined in TIS1.3 is active
 140         //
 141         If (LOr(LEqual (And (TID0, 0x0F), 0x00), LEqual (And (TID0, 0x0F), 0x0F))) {
 142           //
 143           // If FIFO interface, interrupt vector register is
 144           // available. TCG PTP specification allows only
 145           // values 1..15 in this field. For other interrupts
 146           // the field should stay 0.
 147           //
 148           If (LLess (IRQ0, 16)) {
 149             Store (And(IRQ0, 0xF), INTV)
 150           }
 151           //
 152           // Interrupt enable register (TPM_INT_ENABLE_x) bits 3:4
 153           // contains settings for interrupt polarity.
 154           // The other bits of the byte enable individual interrupts.
 155           // They should be all be zero, but to avoid changing the
 156           // configuration, the other bits are be preserved.
 157           // 00 - high level
 158           // 01 - low level
 159           // 10 - rising edge
 160           // 11 - falling edge
 161           //
 162           // ACPI spec definitions:
 163           // _HE: '1' is Edge, '0' is Level
 164           // _LL: '1' is ActiveHigh, '0' is ActiveLow (inverted from TCG spec)
 165           //
 166           If (LEqual (ITRG, 1)) {
 167             Or(INTE, 0x00000010, INTE)
 168           } Else {
 169             And(INTE, 0xFFFFFFEF, INTE)
 170           }
 171           if (LEqual (ILVL, 0)) {
 172             Or(INTE, 0x00000008, INTE)
 173           } Else {
 174             And(INTE, 0xFFFFFFF7, INTE)
 175           }
 176         }
 177       }
 178
 179       //
 180       // Possible resource settings.
 181       // The format of the data has to follow the same format as
 182       // _CRS (according to ACPI spec).
 183       //
 184       Name (_PRS, ResourceTemplate() {
 185         Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
 186         Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , SIRQ) {1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}
 187       })
 188
 189       Method (PTS, 1, Serialized)
 190       {
 191         //
 192         // Detect Sx state for MOR, only S4, S5 need to handle
 193         //
 194         If (LAnd (LLess (Arg0, 6), LGreater (Arg0, 3)))
 195         {
 196           //
 197           // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect.
 198           //
 199           If (LNot (And (MORD, 0x10)))
 200           {
 201             //
 202             // Triggle the SMI through ACPI _PTS method.
 203             //
 204             Store (0x02, MCIP)
 205
 206             //
 207             // Triggle the SMI interrupt
 208             //
 209             Store (MCIN, IOB2)
 210           }
 211         }
 212         Return (0)
 213       }
 214
 215       Method (_STA, 0)
 216       {
 217         if (LEqual (ACC0, 0xff))
 218         {
 219             Return (0)
 220         }
 221         Return (0x0f)
 222       }
 223
 224       //
 225       // TCG Hardware Information
 226       //
 227       Method (HINF, 3, Serialized, 0, {BuffObj, PkgObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
 228       {
 229         //
 230         // Switch by function index
 231         //
 232         Switch (ToInteger(Arg1))
 233         {
 234           Case (0)
 235           {
 236             //
 237             // Standard query
 238             //
 239             Return (Buffer () {0x03})
 240           }
 241           Case (1)
 242           {
 243             //
 244             // Return failure if no TPM present
 245             //
 246             Name(TPMV, Package () {0x01, Package () {0x2, 0x0}})
 247             if (LEqual (_STA (), 0x00))
 248             {
 249               Return (Package () {0x00})
 250             }
 251
 252             //
 253             // Return TPM version
 254             //
 255             Return (TPMV)
 256           }
 257           Default {BreakPoint}
 258         }
 259         Return (Buffer () {0})
 260       }
 261
 262       Name(TPM2, Package (0x02){
 263         Zero,
 264         Zero
 265       })
 266
 267       Name(TPM3, Package (0x03){
 268         Zero,
 269         Zero,
 270         Zero
 271       })
 272
 273       //
 274       // TCG Physical Presence Interface
 275       //
 276       Method (TPPI, 3, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
 277       {
 278         //
 279         // Switch by function index
 280         //
 281         Switch (ToInteger(Arg1))
 282         {
 283           Case (0)
 284           {
 285             //
 286             // Standard query, supports function 1-8
 287             //
 288             Return (Buffer () {0xFF, 0x01})
 289           }
 290           Case (1)
 291           {
 292             //
 293             // a) Get Physical Presence Interface Version
 294             //
 295             Return ("$PV")
 296           }
 297           Case (2)
 298           {
 299             //
 300             // b) Submit TPM Operation Request to Pre-OS Environment
 301             //
 302
 303             Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
 304             Store (0, PPRM)
 305             Store (0x02, PPIP)
 306
 307             //
 308             // Triggle the SMI interrupt
 309             //
 310             Store (PPIN, IOB2)
 311             Return (FRET)
 312
 313
 314           }
 315           Case (3)
 316           {
 317             //
 318             // c) Get Pending TPM Operation Requested By the OS
 319             //
 320
 321             Store (PPRQ, Index (TPM2, 0x01))
 322             Return (TPM2)
 323           }
 324           Case (4)
 325           {
 326             //
 327             // d) Get Platform-Specific Action to Transition to Pre-OS Environment
 328             //
 329             Return (2)
 330           }
 331           Case (5)
 332           {
 333             //
 334             // e) Return TPM Operation Response to OS Environment
 335             //
 336             Store (0x05, PPIP)
 337
 338             //
 339             // Triggle the SMI interrupt
 340             //
 341             Store (PPIN, IOB2)
 342
 343             Store (LPPR, Index (TPM3, 0x01))
 344             Store (PPRP, Index (TPM3, 0x02))
 345
 346             Return (TPM3)
 347           }
 348           Case (6)
 349           {
 350
 351             //
 352             // f) Submit preferred user language (Not implemented)
 353             //
 354
 355             Return (3)
 356
 357           }
 358           Case (7)
 359           {
 360             //
 361             // g) Submit TPM Operation Request to Pre-OS Environment 2
 362             //
 363             Store (7, PPIP)
 364             Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
 365             Store (0, PPRM)
 366             If (LEqual (PPRQ, 23)) {
 367               Store (DerefOf (Index (Arg2, 0x01)), PPRM)
 368             }
 369
 370             //
 371             // Triggle the SMI interrupt
 372             //
 373             Store (PPIN, IOB2)
 374             Return (FRET)
 375           }
 376           Case (8)
 377           {
 378             //
 379             // e) Get User Confirmation Status for Operation
 380             //
 381             Store (8, PPIP)
 382             Store (DerefOf (Index (Arg2, 0x00)), UCRQ)
 383
 384             //
 385             // Triggle the SMI interrupt
 386             //
 387             Store (PPIN, IOB2)
 388
 389             Return (FRET)
 390           }
 391
 392           Default {BreakPoint}
 393         }
 394         Return (1)
 395       }
 396
 397       Method (TMCI, 3, Serialized, 0, IntObj, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
 398       {
 399         //
 400         // Switch by function index
 401         //
 402         Switch (ToInteger (Arg1))
 403         {
 404           Case (0)
 405           {
 406             //
 407             // Standard query, supports function 1-1
 408             //
 409             Return (Buffer () {0x03})
 410           }
 411           Case (1)
 412           {
 413             //
 414             // Save the Operation Value of the Request to MORD (reserved memory)
 415             //
 416             Store (DerefOf (Index (Arg2, 0x00)), MORD)
 417
 418             //
 419             // Triggle the SMI through ACPI _DSM method.
 420             //
 421             Store (0x01, MCIP)
 422
 423             //
 424             // Triggle the SMI interrupt
 425             //
 426             Store (MCIN, IOB2)
 427             Return (MRET)
 428           }
 429           Default {BreakPoint}
 430         }
 431         Return (1)
 432       }
 433
 434       Method (_DSM, 4, Serialized, 0, UnknownObj, {BuffObj, IntObj, IntObj, PkgObj})
 435       {
 436
 437         //
 438         // TCG Hardware Information
 439         //
 440         If(LEqual(Arg0, ToUUID ("cf8e16a5-c1e8-4e25-b712-4f54a96702c8")))
 441         {
 442           Return (HINF (Arg1, Arg2, Arg3))
 443         }
 444
 445         //
 446         // TCG Physical Presence Interface
 447         //
 448         If(LEqual(Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653")))
 449         {
 450           Return (TPPI (Arg1, Arg2, Arg3))
 451         }
 452
 453         //
 454         // TCG Memory Clear Interface
 455         //
 456         If(LEqual(Arg0, ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d")))
 457         {
 458           Return (TMCI (Arg1, Arg2, Arg3))
 459         }
 460
 461         Return (Buffer () {0})
 462       }
 463     }
 464   }
 465 }