StdLib/Include/X64/machine/atomic.h

   1 /*      $NetBSD: atomic.h,v 1.4 2005/12/28 19:09:29 perry Exp $ */
   2
   3 /*
   4  * Copyright 2002 (c) Wasabi Systems, Inc.
   5  * All rights reserved.
   6  *
   7  * Written by Frank van der Linden for Wasabi Systems, Inc.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *      This product includes software developed for the NetBSD Project by
  20  *      Wasabi Systems, Inc.
  21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
  22  *    or promote products derived from this software without specific prior
  23  *    written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
  26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
  29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35  * POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 #ifndef _ATOMIC_H
  39 #define _ATOMIC_H
  40
  41 #ifndef _LOCORE
  42
  43 static __inline u_int64_t
  44 x86_atomic_testset_u64(volatile u_int64_t *ptr, u_int64_t val) {
  45     __asm volatile ("xchgq %0,(%2)" :"=r" (val):"0" (val),"r" (ptr));
  46     return val;
  47 }
  48
  49 static __inline u_int32_t
  50 x86_atomic_testset_u32(volatile u_int32_t *ptr, u_int32_t val) {
  51     __asm volatile ("xchgl %0,(%2)" :"=r" (val):"0" (val),"r" (ptr));
  52     return val;
  53 }
  54
  55
  56
  57 static __inline int32_t
  58 x86_atomic_testset_i32(volatile int32_t *ptr, int32_t val) {
  59     __asm volatile ("xchgl %0,(%2)" :"=r" (val):"0" (val),"r" (ptr));
  60     return val;
  61 }
  62
  63
  64
  65 static __inline void
  66 x86_atomic_setbits_u32(volatile u_int32_t *ptr, u_int32_t bits) {
  67     __asm volatile("lock ; orl %1,%0" :  "=m" (*ptr) : "ir" (bits));
  68 }
  69
  70 static __inline void
  71 x86_atomic_clearbits_u32(volatile u_int32_t *ptr, u_int32_t bits) {
  72     __asm volatile("lock ; andl %1,%0" :  "=m" (*ptr) : "ir" (~bits));
  73 }
  74
  75
  76
  77 static __inline void
  78 x86_atomic_setbits_u64(volatile u_int64_t *ptr, u_int64_t bits) {
  79     __asm volatile("lock ; orq %1,%0" :  "=m" (*ptr) : "ir" (~bits));
  80 }
  81
  82 static __inline void
  83 x86_atomic_clearbits_u64(volatile u_int64_t *ptr, u_int64_t bits) {
  84     __asm volatile("lock ; andq %1,%0" :  "=m" (*ptr) : "ir" (~bits));
  85 }
  86
  87 #define x86_atomic_testset_ul   x86_atomic_testset_u32
  88 #define x86_atomic_testset_i    x86_atomic_testset_i32
  89 #define x86_atomic_setbits_l    x86_atomic_setbits_u32
  90 #define x86_atomic_setbits_ul   x86_atomic_setbits_u32
  91 #define x86_atomic_clearbits_l  x86_atomic_clearbits_u32
  92 #define x86_atomic_clearbits_ul x86_atomic_clearbits_u32
  93
  94 #endif
  95 #endif