2 CPU DXE Module to produce CPU ARCH Protocol.
4 Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include "CpuPageTable.h"
19 #define CACHE_ATTRIBUTE_MASK (EFI_MEMORY_UC | EFI_MEMORY_WC | EFI_MEMORY_WT | EFI_MEMORY_WB | EFI_MEMORY_UCE | EFI_MEMORY_WP)
20 #define MEMORY_ATTRIBUTE_MASK (EFI_MEMORY_RP | EFI_MEMORY_XP | EFI_MEMORY_RO)
25 BOOLEAN InterruptState
= FALSE
;
26 EFI_HANDLE mCpuHandle
= NULL
;
27 BOOLEAN mIsFlushingGCD
;
28 UINT64 mValidMtrrAddressMask
;
29 UINT64 mValidMtrrBitsMask
;
30 UINT64 mTimerPeriod
= 0;
32 FIXED_MTRR mFixedMtrrTable
[] = {
34 MSR_IA32_MTRR_FIX64K_00000
,
39 MSR_IA32_MTRR_FIX16K_80000
,
44 MSR_IA32_MTRR_FIX16K_A0000
,
49 MSR_IA32_MTRR_FIX4K_C0000
,
54 MSR_IA32_MTRR_FIX4K_C8000
,
59 MSR_IA32_MTRR_FIX4K_D0000
,
64 MSR_IA32_MTRR_FIX4K_D8000
,
69 MSR_IA32_MTRR_FIX4K_E0000
,
74 MSR_IA32_MTRR_FIX4K_E8000
,
79 MSR_IA32_MTRR_FIX4K_F0000
,
84 MSR_IA32_MTRR_FIX4K_F8000
,
91 EFI_CPU_ARCH_PROTOCOL gCpu
= {
97 CpuRegisterInterruptHandler
,
99 CpuSetMemoryAttributes
,
101 4 // DmaBufferAlignment
105 // CPU Arch Protocol Functions
109 Flush CPU data cache. If the instruction cache is fully coherent
110 with all DMA operations then function can just return EFI_SUCCESS.
112 @param This Protocol instance structure
113 @param Start Physical address to start flushing from.
114 @param Length Number of bytes to flush. Round up to chipset
116 @param FlushType Specifies the type of flush operation to perform.
118 @retval EFI_SUCCESS If cache was flushed
119 @retval EFI_UNSUPPORTED If flush type is not supported.
120 @retval EFI_DEVICE_ERROR If requested range could not be flushed.
125 CpuFlushCpuDataCache (
126 IN EFI_CPU_ARCH_PROTOCOL
*This
,
127 IN EFI_PHYSICAL_ADDRESS Start
,
129 IN EFI_CPU_FLUSH_TYPE FlushType
132 if (FlushType
== EfiCpuFlushTypeWriteBackInvalidate
) {
135 } else if (FlushType
== EfiCpuFlushTypeInvalidate
) {
139 return EFI_UNSUPPORTED
;
145 Enables CPU interrupts.
147 @param This Protocol instance structure
149 @retval EFI_SUCCESS If interrupts were enabled in the CPU
150 @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
156 IN EFI_CPU_ARCH_PROTOCOL
*This
161 InterruptState
= TRUE
;
167 Disables CPU interrupts.
169 @param This Protocol instance structure
171 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
172 @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
177 CpuDisableInterrupt (
178 IN EFI_CPU_ARCH_PROTOCOL
*This
181 DisableInterrupts ();
183 InterruptState
= FALSE
;
189 Return the state of interrupts.
191 @param This Protocol instance structure
192 @param State Pointer to the CPU's current interrupt state
194 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
195 @retval EFI_INVALID_PARAMETER State is NULL.
200 CpuGetInterruptState (
201 IN EFI_CPU_ARCH_PROTOCOL
*This
,
206 return EFI_INVALID_PARAMETER
;
209 *State
= InterruptState
;
215 Generates an INIT to the CPU.
217 @param This Protocol instance structure
218 @param InitType Type of CPU INIT to perform
220 @retval EFI_SUCCESS If CPU INIT occurred. This value should never be
222 @retval EFI_DEVICE_ERROR If CPU INIT failed.
223 @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
229 IN EFI_CPU_ARCH_PROTOCOL
*This
,
230 IN EFI_CPU_INIT_TYPE InitType
233 return EFI_UNSUPPORTED
;
238 Registers a function to be called from the CPU interrupt handler.
240 @param This Protocol instance structure
241 @param InterruptType Defines which interrupt to hook. IA-32
242 valid range is 0x00 through 0xFF
243 @param InterruptHandler A pointer to a function of type
244 EFI_CPU_INTERRUPT_HANDLER that is called
245 when a processor interrupt occurs. A null
246 pointer is an error condition.
248 @retval EFI_SUCCESS If handler installed or uninstalled.
249 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
250 for InterruptType was previously installed.
251 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
252 InterruptType was not previously installed.
253 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType
259 CpuRegisterInterruptHandler (
260 IN EFI_CPU_ARCH_PROTOCOL
*This
,
261 IN EFI_EXCEPTION_TYPE InterruptType
,
262 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
265 return RegisterCpuInterruptHandler (InterruptType
, InterruptHandler
);
270 Returns a timer value from one of the CPU's internal timers. There is no
271 inherent time interval between ticks but is a function of the CPU frequency.
273 @param This - Protocol instance structure.
274 @param TimerIndex - Specifies which CPU timer is requested.
275 @param TimerValue - Pointer to the returned timer value.
276 @param TimerPeriod - A pointer to the amount of time that passes
277 in femtoseconds (10-15) for each increment
278 of TimerValue. If TimerValue does not
279 increment at a predictable rate, then 0 is
280 returned. The amount of time that has
281 passed between two calls to GetTimerValue()
282 can be calculated with the formula
283 (TimerValue2 - TimerValue1) * TimerPeriod.
284 This parameter is optional and may be NULL.
286 @retval EFI_SUCCESS - If the CPU timer count was returned.
287 @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
288 @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
289 @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
295 IN EFI_CPU_ARCH_PROTOCOL
*This
,
296 IN UINT32 TimerIndex
,
297 OUT UINT64
*TimerValue
,
298 OUT UINT64
*TimerPeriod OPTIONAL
304 if (TimerValue
== NULL
) {
305 return EFI_INVALID_PARAMETER
;
308 if (TimerIndex
!= 0) {
309 return EFI_INVALID_PARAMETER
;
312 *TimerValue
= AsmReadTsc ();
314 if (TimerPeriod
!= NULL
) {
315 if (mTimerPeriod
== 0) {
317 // Read time stamp counter before and after delay of 100 microseconds
319 BeginValue
= AsmReadTsc ();
320 MicroSecondDelay (100);
321 EndValue
= AsmReadTsc ();
323 // Calculate the actual frequency
325 mTimerPeriod
= DivU64x64Remainder (
330 EndValue
- BeginValue
,
334 *TimerPeriod
= mTimerPeriod
;
341 A minimal wrapper function that allows MtrrSetAllMtrrs() to be passed to
342 EFI_MP_SERVICES_PROTOCOL.StartupAllAPs() as Procedure.
344 @param[in] Buffer Pointer to an MTRR_SETTINGS object, to be passed to
353 MtrrSetAllMtrrs (Buffer
);
357 Implementation of SetMemoryAttributes() service of CPU Architecture Protocol.
359 This function modifies the attributes for the memory region specified by BaseAddress and
360 Length from their current attributes to the attributes specified by Attributes.
362 @param This The EFI_CPU_ARCH_PROTOCOL instance.
363 @param BaseAddress The physical address that is the start address of a memory region.
364 @param Length The size in bytes of the memory region.
365 @param Attributes The bit mask of attributes to set for the memory region.
367 @retval EFI_SUCCESS The attributes were set for the memory region.
368 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
369 BaseAddress and Length cannot be modified.
370 @retval EFI_INVALID_PARAMETER Length is zero.
371 Attributes specified an illegal combination of attributes that
372 cannot be set together.
373 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
374 the memory resource range.
375 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
376 resource range specified by BaseAddress and Length.
377 The bit mask of attributes is not support for the memory resource
378 range specified by BaseAddress and Length.
383 CpuSetMemoryAttributes (
384 IN EFI_CPU_ARCH_PROTOCOL
*This
,
385 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
390 RETURN_STATUS Status
;
391 MTRR_MEMORY_CACHE_TYPE CacheType
;
393 EFI_MP_SERVICES_PROTOCOL
*MpService
;
394 MTRR_SETTINGS MtrrSettings
;
395 UINT64 CacheAttributes
;
396 UINT64 MemoryAttributes
;
397 MTRR_MEMORY_CACHE_TYPE CurrentCacheType
;
400 // If this function is called because GCD SetMemorySpaceAttributes () is called
401 // by RefreshGcdMemoryAttributes (), then we are just synchronzing GCD memory
402 // map with MTRR values. So there is no need to modify MTRRs, just return immediately
403 // to avoid unnecessary computing.
405 if (mIsFlushingGCD
) {
406 DEBUG((DEBUG_INFO
, " Flushing GCD\n"));
411 CacheAttributes
= Attributes
& CACHE_ATTRIBUTE_MASK
;
412 MemoryAttributes
= Attributes
& MEMORY_ATTRIBUTE_MASK
;
414 if (Attributes
!= (CacheAttributes
| MemoryAttributes
)) {
415 return EFI_INVALID_PARAMETER
;
418 if (CacheAttributes
!= 0) {
419 if (!IsMtrrSupported ()) {
420 return EFI_UNSUPPORTED
;
423 switch (CacheAttributes
) {
425 CacheType
= CacheUncacheable
;
429 CacheType
= CacheWriteCombining
;
433 CacheType
= CacheWriteThrough
;
437 CacheType
= CacheWriteProtected
;
441 CacheType
= CacheWriteBack
;
445 return EFI_INVALID_PARAMETER
;
447 CurrentCacheType
= MtrrGetMemoryAttribute(BaseAddress
);
448 if (CurrentCacheType
!= CacheType
) {
450 // call MTRR libary function
452 Status
= MtrrSetMemoryAttribute (
458 if (!RETURN_ERROR (Status
)) {
459 MpStatus
= gBS
->LocateProtocol (
460 &gEfiMpServiceProtocolGuid
,
465 // Synchronize the update with all APs
467 if (!EFI_ERROR (MpStatus
)) {
468 MtrrGetAllMtrrs (&MtrrSettings
);
469 MpStatus
= MpService
->StartupAllAPs (
471 SetMtrrsFromBuffer
, // Procedure
472 FALSE
, // SingleThread
474 0, // TimeoutInMicrosecsond
475 &MtrrSettings
, // ProcedureArgument
476 NULL
// FailedCpuList
478 ASSERT (MpStatus
== EFI_SUCCESS
|| MpStatus
== EFI_NOT_STARTED
);
481 if (EFI_ERROR(Status
)) {
488 // Set memory attribute by page table
490 return AssignMemoryPageAttributes (NULL
, BaseAddress
, Length
, MemoryAttributes
, AllocatePages
);
494 Initializes the valid bits mask and valid address mask for MTRRs.
496 This function initializes the valid bits mask and valid address mask for MTRRs.
505 UINT8 PhysicalAddressBits
;
507 AsmCpuid (0x80000000, &RegEax
, NULL
, NULL
, NULL
);
509 if (RegEax
>= 0x80000008) {
510 AsmCpuid (0x80000008, &RegEax
, NULL
, NULL
, NULL
);
512 PhysicalAddressBits
= (UINT8
) RegEax
;
514 PhysicalAddressBits
= 36;
517 mValidMtrrBitsMask
= LShiftU64 (1, PhysicalAddressBits
) - 1;
518 mValidMtrrAddressMask
= mValidMtrrBitsMask
& 0xfffffffffffff000ULL
;
522 Gets GCD Mem Space type from MTRR Type.
524 This function gets GCD Mem Space type from MTRR Type.
526 @param MtrrAttributes MTRR memory type
528 @return GCD Mem Space type
532 GetMemorySpaceAttributeFromMtrrType (
533 IN UINT8 MtrrAttributes
536 switch (MtrrAttributes
) {
537 case MTRR_CACHE_UNCACHEABLE
:
538 return EFI_MEMORY_UC
;
539 case MTRR_CACHE_WRITE_COMBINING
:
540 return EFI_MEMORY_WC
;
541 case MTRR_CACHE_WRITE_THROUGH
:
542 return EFI_MEMORY_WT
;
543 case MTRR_CACHE_WRITE_PROTECTED
:
544 return EFI_MEMORY_WP
;
545 case MTRR_CACHE_WRITE_BACK
:
546 return EFI_MEMORY_WB
;
553 Searches memory descriptors covered by given memory range.
555 This function searches into the Gcd Memory Space for descriptors
556 (from StartIndex to EndIndex) that contains the memory range
557 specified by BaseAddress and Length.
559 @param MemorySpaceMap Gcd Memory Space Map as array.
560 @param NumberOfDescriptors Number of descriptors in map.
561 @param BaseAddress BaseAddress for the requested range.
562 @param Length Length for the requested range.
563 @param StartIndex Start index into the Gcd Memory Space Map.
564 @param EndIndex End index into the Gcd Memory Space Map.
566 @retval EFI_SUCCESS Search successfully.
567 @retval EFI_NOT_FOUND The requested descriptors does not exist.
571 SearchGcdMemorySpaces (
572 IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
,
573 IN UINTN NumberOfDescriptors
,
574 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
576 OUT UINTN
*StartIndex
,
584 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
585 if (BaseAddress
>= MemorySpaceMap
[Index
].BaseAddress
&&
586 BaseAddress
< MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
589 if (BaseAddress
+ Length
- 1 >= MemorySpaceMap
[Index
].BaseAddress
&&
590 BaseAddress
+ Length
- 1 < MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
595 return EFI_NOT_FOUND
;
599 Sets the attributes for a specified range in Gcd Memory Space Map.
601 This function sets the attributes for a specified range in
602 Gcd Memory Space Map.
604 @param MemorySpaceMap Gcd Memory Space Map as array
605 @param NumberOfDescriptors Number of descriptors in map
606 @param BaseAddress BaseAddress for the range
607 @param Length Length for the range
608 @param Attributes Attributes to set
610 @retval EFI_SUCCESS Memory attributes set successfully
611 @retval EFI_NOT_FOUND The specified range does not exist in Gcd Memory Space
615 SetGcdMemorySpaceAttributes (
616 IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
,
617 IN UINTN NumberOfDescriptors
,
618 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
627 EFI_PHYSICAL_ADDRESS RegionStart
;
631 // Get all memory descriptors covered by the memory range
633 Status
= SearchGcdMemorySpaces (
641 if (EFI_ERROR (Status
)) {
646 // Go through all related descriptors and set attributes accordingly
648 for (Index
= StartIndex
; Index
<= EndIndex
; Index
++) {
649 if (MemorySpaceMap
[Index
].GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
653 // Calculate the start and end address of the overlapping range
655 if (BaseAddress
>= MemorySpaceMap
[Index
].BaseAddress
) {
656 RegionStart
= BaseAddress
;
658 RegionStart
= MemorySpaceMap
[Index
].BaseAddress
;
660 if (BaseAddress
+ Length
- 1 < MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
661 RegionLength
= BaseAddress
+ Length
- RegionStart
;
663 RegionLength
= MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
- RegionStart
;
666 // Set memory attributes according to MTRR attribute and the original attribute of descriptor
668 gDS
->SetMemorySpaceAttributes (
671 (MemorySpaceMap
[Index
].Attributes
& ~EFI_MEMORY_CACHETYPE_MASK
) | (MemorySpaceMap
[Index
].Capabilities
& Attributes
)
680 Refreshes the GCD Memory Space attributes according to MTRRs.
682 This function refreshes the GCD Memory Space attributes according to MTRRs.
686 RefreshGcdMemoryAttributes (
694 EFI_PHYSICAL_ADDRESS BaseAddress
;
697 UINT64 CurrentAttributes
;
699 UINTN NumberOfDescriptors
;
700 EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
;
701 UINT64 DefaultAttributes
;
702 VARIABLE_MTRR VariableMtrr
[MTRR_NUMBER_OF_VARIABLE_MTRR
];
703 MTRR_FIXED_SETTINGS MtrrFixedSettings
;
704 UINT32 FirmwareVariableMtrrCount
;
705 UINT8 DefaultMemoryType
;
707 if (!IsMtrrSupported ()) {
711 FirmwareVariableMtrrCount
= GetFirmwareVariableMtrrCount ();
712 ASSERT (FirmwareVariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
714 mIsFlushingGCD
= TRUE
;
715 MemorySpaceMap
= NULL
;
718 // Initialize the valid bits mask and valid address mask for MTRRs
720 InitializeMtrrMask ();
723 // Get the memory attribute of variable MTRRs
725 MtrrGetMemoryAttributeInVariableMtrr (
727 mValidMtrrAddressMask
,
732 // Get the memory space map from GCD
734 Status
= gDS
->GetMemorySpaceMap (
735 &NumberOfDescriptors
,
738 ASSERT_EFI_ERROR (Status
);
740 DefaultMemoryType
= (UINT8
) MtrrGetDefaultMemoryType ();
741 DefaultAttributes
= GetMemorySpaceAttributeFromMtrrType (DefaultMemoryType
);
744 // Set default attributes to all spaces.
746 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
747 if (MemorySpaceMap
[Index
].GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
750 gDS
->SetMemorySpaceAttributes (
751 MemorySpaceMap
[Index
].BaseAddress
,
752 MemorySpaceMap
[Index
].Length
,
753 (MemorySpaceMap
[Index
].Attributes
& ~EFI_MEMORY_CACHETYPE_MASK
) |
754 (MemorySpaceMap
[Index
].Capabilities
& DefaultAttributes
)
759 // Go for variable MTRRs with WB attribute
761 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
762 if (VariableMtrr
[Index
].Valid
&&
763 VariableMtrr
[Index
].Type
== MTRR_CACHE_WRITE_BACK
) {
764 SetGcdMemorySpaceAttributes (
767 VariableMtrr
[Index
].BaseAddress
,
768 VariableMtrr
[Index
].Length
,
775 // Go for variable MTRRs with the attribute except for WB and UC attributes
777 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
778 if (VariableMtrr
[Index
].Valid
&&
779 VariableMtrr
[Index
].Type
!= MTRR_CACHE_WRITE_BACK
&&
780 VariableMtrr
[Index
].Type
!= MTRR_CACHE_UNCACHEABLE
) {
781 Attributes
= GetMemorySpaceAttributeFromMtrrType ((UINT8
) VariableMtrr
[Index
].Type
);
782 SetGcdMemorySpaceAttributes (
785 VariableMtrr
[Index
].BaseAddress
,
786 VariableMtrr
[Index
].Length
,
793 // Go for variable MTRRs with UC attribute
795 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
796 if (VariableMtrr
[Index
].Valid
&&
797 VariableMtrr
[Index
].Type
== MTRR_CACHE_UNCACHEABLE
) {
798 SetGcdMemorySpaceAttributes (
801 VariableMtrr
[Index
].BaseAddress
,
802 VariableMtrr
[Index
].Length
,
809 // Go for fixed MTRRs
814 MtrrGetFixedMtrr (&MtrrFixedSettings
);
815 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
816 RegValue
= MtrrFixedSettings
.Mtrr
[Index
];
818 // Check for continuous fixed MTRR sections
820 for (SubIndex
= 0; SubIndex
< 8; SubIndex
++) {
821 MtrrType
= (UINT8
) RShiftU64 (RegValue
, SubIndex
* 8);
822 CurrentAttributes
= GetMemorySpaceAttributeFromMtrrType (MtrrType
);
825 // A new MTRR attribute begins
827 Attributes
= CurrentAttributes
;
830 // If fixed MTRR attribute changed, then set memory attribute for previous atrribute
832 if (CurrentAttributes
!= Attributes
) {
833 SetGcdMemorySpaceAttributes (
840 BaseAddress
= mFixedMtrrTable
[Index
].BaseAddress
+ mFixedMtrrTable
[Index
].Length
* SubIndex
;
842 Attributes
= CurrentAttributes
;
845 Length
+= mFixedMtrrTable
[Index
].Length
;
849 // Handle the last fixed MTRR region
851 SetGcdMemorySpaceAttributes (
860 // Free memory space map allocated by GCD service GetMemorySpaceMap ()
862 if (MemorySpaceMap
!= NULL
) {
863 FreePool (MemorySpaceMap
);
867 // Update page attributes
869 RefreshGcdMemoryAttributesFromPaging();
871 mIsFlushingGCD
= FALSE
;
875 Initialize Interrupt Descriptor Table for interrupt handling.
879 InitInterruptDescriptorTable (
884 EFI_VECTOR_HANDOFF_INFO
*VectorInfoList
;
885 EFI_VECTOR_HANDOFF_INFO
*VectorInfo
;
888 Status
= EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGuid
, (VOID
**) &VectorInfoList
);
889 if (Status
== EFI_SUCCESS
&& VectorInfoList
!= NULL
) {
890 VectorInfo
= VectorInfoList
;
892 Status
= InitializeCpuInterruptHandlers (VectorInfo
);
893 ASSERT_EFI_ERROR (Status
);
898 Callback function for idle events.
900 @param Event Event whose notification function is being invoked.
901 @param Context The pointer to the notification function's context,
902 which is implementation-dependent.
907 IdleLoopEventCallback (
916 Ensure the compatibility of a memory space descriptor with the MMIO aperture.
918 The memory space descriptor can come from the GCD memory space map, or it can
919 represent a gap between two neighboring memory space descriptors. In the
920 latter case, the GcdMemoryType field is expected to be
921 EfiGcdMemoryTypeNonExistent.
923 If the memory space descriptor already has type
924 EfiGcdMemoryTypeMemoryMappedIo, and its capabilities are a superset of the
925 required capabilities, then no action is taken -- it is by definition
926 compatible with the aperture.
928 Otherwise, the intersection of the memory space descriptor is calculated with
929 the aperture. If the intersection is the empty set (no overlap), no action is
930 taken; the memory space descriptor is compatible with the aperture.
932 Otherwise, the type of the descriptor is investigated again. If the type is
933 EfiGcdMemoryTypeNonExistent (representing a gap, or a genuine descriptor with
934 such a type), then an attempt is made to add the intersection as MMIO space
935 to the GCD memory space map, with the specified capabilities. This ensures
936 continuity for the aperture, and the descriptor is deemed compatible with the
939 Otherwise, the memory space descriptor is incompatible with the MMIO
942 @param[in] Base Base address of the aperture.
943 @param[in] Length Length of the aperture.
944 @param[in] Capabilities Capabilities required by the aperture.
945 @param[in] Descriptor The descriptor to ensure compatibility with the
948 @retval EFI_SUCCESS The descriptor is compatible. The GCD memory
949 space map may have been updated, for
950 continuity within the aperture.
951 @retval EFI_INVALID_PARAMETER The descriptor is incompatible.
952 @return Error codes from gDS->AddMemorySpace().
955 IntersectMemoryDescriptor (
958 IN UINT64 Capabilities
,
959 IN CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*Descriptor
962 UINT64 IntersectionBase
;
963 UINT64 IntersectionEnd
;
966 if (Descriptor
->GcdMemoryType
== EfiGcdMemoryTypeMemoryMappedIo
&&
967 (Descriptor
->Capabilities
& Capabilities
) == Capabilities
) {
971 IntersectionBase
= MAX (Base
, Descriptor
->BaseAddress
);
972 IntersectionEnd
= MIN (Base
+ Length
,
973 Descriptor
->BaseAddress
+ Descriptor
->Length
);
974 if (IntersectionBase
>= IntersectionEnd
) {
976 // The descriptor and the aperture don't overlap.
981 if (Descriptor
->GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
982 Status
= gDS
->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo
,
983 IntersectionBase
, IntersectionEnd
- IntersectionBase
,
986 DEBUG ((EFI_ERROR (Status
) ? DEBUG_ERROR
: DEBUG_VERBOSE
,
987 "%a: %a: add [%Lx, %Lx): %r\n", gEfiCallerBaseName
, __FUNCTION__
,
988 IntersectionBase
, IntersectionEnd
, Status
));
992 DEBUG ((DEBUG_ERROR
, "%a: %a: desc [%Lx, %Lx) type %u cap %Lx conflicts "
993 "with aperture [%Lx, %Lx) cap %Lx\n", gEfiCallerBaseName
, __FUNCTION__
,
994 Descriptor
->BaseAddress
, Descriptor
->BaseAddress
+ Descriptor
->Length
,
995 (UINT32
)Descriptor
->GcdMemoryType
, Descriptor
->Capabilities
,
996 Base
, Base
+ Length
, Capabilities
));
997 return EFI_INVALID_PARAMETER
;
1001 Add MMIO space to GCD.
1002 The routine checks the GCD database and only adds those which are
1003 not added in the specified range to GCD.
1005 @param Base Base address of the MMIO space.
1006 @param Length Length of the MMIO space.
1007 @param Capabilities Capabilities of the MMIO space.
1009 @retval EFI_SUCCES The MMIO space was added successfully.
1012 AddMemoryMappedIoSpace (
1015 IN UINT64 Capabilities
1020 UINTN NumberOfDescriptors
;
1021 EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
;
1023 Status
= gDS
->GetMemorySpaceMap (&NumberOfDescriptors
, &MemorySpaceMap
);
1024 if (EFI_ERROR (Status
)) {
1025 DEBUG ((DEBUG_ERROR
, "%a: %a: GetMemorySpaceMap(): %r\n",
1026 gEfiCallerBaseName
, __FUNCTION__
, Status
));
1030 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
1031 Status
= IntersectMemoryDescriptor (Base
, Length
, Capabilities
,
1032 &MemorySpaceMap
[Index
]);
1033 if (EFI_ERROR (Status
)) {
1034 goto FreeMemorySpaceMap
;
1040 // Make sure there are adjacent descriptors covering [Base, Base + Length).
1041 // It is possible that they have not been merged; merging can be prevented
1042 // by allocation and different capabilities.
1045 EFI_STATUS CheckStatus
;
1046 EFI_GCD_MEMORY_SPACE_DESCRIPTOR Descriptor
;
1048 for (CheckBase
= Base
;
1049 CheckBase
< Base
+ Length
;
1050 CheckBase
= Descriptor
.BaseAddress
+ Descriptor
.Length
) {
1051 CheckStatus
= gDS
->GetMemorySpaceDescriptor (CheckBase
, &Descriptor
);
1052 ASSERT_EFI_ERROR (CheckStatus
);
1053 ASSERT (Descriptor
.GcdMemoryType
== EfiGcdMemoryTypeMemoryMappedIo
);
1054 ASSERT ((Descriptor
.Capabilities
& Capabilities
) == Capabilities
);
1059 FreePool (MemorySpaceMap
);
1065 Add and allocate CPU local APIC memory mapped space.
1067 @param[in]ImageHandle Image handle this driver.
1071 AddLocalApicMemorySpace (
1072 IN EFI_HANDLE ImageHandle
1076 EFI_PHYSICAL_ADDRESS BaseAddress
;
1078 BaseAddress
= (EFI_PHYSICAL_ADDRESS
) GetLocalApicBaseAddress();
1079 Status
= AddMemoryMappedIoSpace (BaseAddress
, SIZE_4KB
, EFI_MEMORY_UC
);
1080 ASSERT_EFI_ERROR (Status
);
1083 // Try to allocate APIC memory mapped space, does not check return
1084 // status because it may be allocated by other driver, or DXE Core if
1085 // this range is built into Memory Allocation HOB.
1087 Status
= gDS
->AllocateMemorySpace (
1088 EfiGcdAllocateAddress
,
1089 EfiGcdMemoryTypeMemoryMappedIo
,
1096 if (EFI_ERROR (Status
)) {
1097 DEBUG ((DEBUG_INFO
, "%a: %a: AllocateMemorySpace() Status - %r\n",
1098 gEfiCallerBaseName
, __FUNCTION__
, Status
));
1103 Initialize the state information for the CPU Architectural Protocol.
1105 @param ImageHandle Image handle this driver.
1106 @param SystemTable Pointer to the System Table.
1108 @retval EFI_SUCCESS Thread can be successfully created
1109 @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
1110 @retval EFI_DEVICE_ERROR Cannot create the thread
1116 IN EFI_HANDLE ImageHandle
,
1117 IN EFI_SYSTEM_TABLE
*SystemTable
1121 EFI_EVENT IdleLoopEvent
;
1123 InitializePageTableLib();
1125 InitializeFloatingPointUnits ();
1128 // Make sure interrupts are disabled
1130 DisableInterrupts ();
1135 InitGlobalDescriptorTable ();
1138 // Setup IDT pointer, IDT and interrupt entry points
1140 InitInterruptDescriptorTable ();
1143 // Install CPU Architectural Protocol
1145 Status
= gBS
->InstallMultipleProtocolInterfaces (
1147 &gEfiCpuArchProtocolGuid
, &gCpu
,
1150 ASSERT_EFI_ERROR (Status
);
1153 // Refresh GCD memory space map according to MTRR value.
1155 RefreshGcdMemoryAttributes ();
1158 // Add and allocate local APIC memory mapped space
1160 AddLocalApicMemorySpace (ImageHandle
);
1163 // Setup a callback for idle events
1165 Status
= gBS
->CreateEventEx (
1168 IdleLoopEventCallback
,
1170 &gIdleLoopEventGuid
,
1173 ASSERT_EFI_ERROR (Status
);
1175 InitializeMpSupport ();