UefiCpuPkg/CpuDxe/CpuDxe.h

   1 /** @file
   2   CPU DXE Module.
   3
   4   Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
   5   This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef _CPU_DXE_H_
  16 #define _CPU_DXE_H_
  17
  18 #include <PiDxe.h>
  19
  20 #include <Protocol/Cpu.h>
  21
  22 #include <Library/UefiDriverEntryPoint.h>
  23 #include <Library/UefiBootServicesTableLib.h>
  24 #include <Library/DxeServicesTableLib.h>
  25 #include <Library/BaseLib.h>
  26 #include <Library/CpuLib.h>
  27 #include <Library/BaseMemoryLib.h>
  28 #include <Library/MemoryAllocationLib.h>
  29 #include <Library/DebugLib.h>
  30 #include <Library/MtrrLib.h>
  31 #include <Library/LocalApicLib.h>
  32 #include <Library/UefiCpuLib.h>
  33 #include <Library/UefiLib.h>
  34 #include <Library/CpuExceptionHandlerLib.h>
  35 #include <Library/TimerLib.h>
  36 #include <Guid/IdleLoopEvent.h>
  37 #include <Guid/VectorHandoffTable.h>
  38
  39 #define EFI_MEMORY_CACHETYPE_MASK     (EFI_MEMORY_UC  | \
  40                                        EFI_MEMORY_WC  | \
  41                                        EFI_MEMORY_WT  | \
  42                                        EFI_MEMORY_WB  | \
  43                                        EFI_MEMORY_UCE   \
  44                                        )
  45
  46
  47 /**
  48   Flush CPU data cache. If the instruction cache is fully coherent
  49   with all DMA operations then function can just return EFI_SUCCESS.
  50
  51   @param  This              Protocol instance structure
  52   @param  Start             Physical address to start flushing from.
  53   @param  Length            Number of bytes to flush. Round up to chipset
  54                             granularity.
  55   @param  FlushType         Specifies the type of flush operation to perform.
  56
  57   @retval EFI_SUCCESS       If cache was flushed
  58   @retval EFI_UNSUPPORTED   If flush type is not supported.
  59   @retval EFI_DEVICE_ERROR  If requested range could not be flushed.
  60
  61 **/
  62 EFI_STATUS
  63 EFIAPI
  64 CpuFlushCpuDataCache (
  65   IN EFI_CPU_ARCH_PROTOCOL     *This,
  66   IN EFI_PHYSICAL_ADDRESS      Start,
  67   IN UINT64                    Length,
  68   IN EFI_CPU_FLUSH_TYPE        FlushType
  69   );
  70
  71 /**
  72   Enables CPU interrupts.
  73
  74   @param  This              Protocol instance structure
  75
  76   @retval EFI_SUCCESS       If interrupts were enabled in the CPU
  77   @retval EFI_DEVICE_ERROR  If interrupts could not be enabled on the CPU.
  78
  79 **/
  80 EFI_STATUS
  81 EFIAPI
  82 CpuEnableInterrupt (
  83   IN EFI_CPU_ARCH_PROTOCOL     *This
  84   );
  85
  86 /**
  87   Disables CPU interrupts.
  88
  89   @param  This              Protocol instance structure
  90
  91   @retval EFI_SUCCESS       If interrupts were disabled in the CPU.
  92   @retval EFI_DEVICE_ERROR  If interrupts could not be disabled on the CPU.
  93
  94 **/
  95 EFI_STATUS
  96 EFIAPI
  97 CpuDisableInterrupt (
  98   IN EFI_CPU_ARCH_PROTOCOL     *This
  99   );
 100
 101 /**
 102   Return the state of interrupts.
 103
 104   @param  This                   Protocol instance structure
 105   @param  State                  Pointer to the CPU's current interrupt state
 106
 107   @retval EFI_SUCCESS            If interrupts were disabled in the CPU.
 108   @retval EFI_INVALID_PARAMETER  State is NULL.
 109
 110 **/
 111 EFI_STATUS
 112 EFIAPI
 113 CpuGetInterruptState (
 114   IN  EFI_CPU_ARCH_PROTOCOL     *This,
 115   OUT BOOLEAN                   *State
 116   );
 117
 118 /**
 119   Generates an INIT to the CPU.
 120
 121   @param  This              Protocol instance structure
 122   @param  InitType          Type of CPU INIT to perform
 123
 124   @retval EFI_SUCCESS       If CPU INIT occurred. This value should never be
 125                             seen.
 126   @retval EFI_DEVICE_ERROR  If CPU INIT failed.
 127   @retval EFI_UNSUPPORTED   Requested type of CPU INIT not supported.
 128
 129 **/
 130 EFI_STATUS
 131 EFIAPI
 132 CpuInit (
 133   IN EFI_CPU_ARCH_PROTOCOL     *This,
 134   IN EFI_CPU_INIT_TYPE         InitType
 135   );
 136
 137 /**
 138   Registers a function to be called from the CPU interrupt handler.
 139
 140   @param  This                   Protocol instance structure
 141   @param  InterruptType          Defines which interrupt to hook. IA-32
 142                                  valid range is 0x00 through 0xFF
 143   @param  InterruptHandler       A pointer to a function of type
 144                                  EFI_CPU_INTERRUPT_HANDLER that is called
 145                                  when a processor interrupt occurs.  A null
 146                                  pointer is an error condition.
 147
 148   @retval EFI_SUCCESS            If handler installed or uninstalled.
 149   @retval EFI_ALREADY_STARTED    InterruptHandler is not NULL, and a handler
 150                                  for InterruptType was previously installed.
 151   @retval EFI_INVALID_PARAMETER  InterruptHandler is NULL, and a handler for
 152                                  InterruptType was not previously installed.
 153   @retval EFI_UNSUPPORTED        The interrupt specified by InterruptType
 154                                  is not supported.
 155
 156 **/
 157 EFI_STATUS
 158 EFIAPI
 159 CpuRegisterInterruptHandler (
 160   IN EFI_CPU_ARCH_PROTOCOL         *This,
 161   IN EFI_EXCEPTION_TYPE            InterruptType,
 162   IN EFI_CPU_INTERRUPT_HANDLER     InterruptHandler
 163   );
 164
 165 /**
 166   Returns a timer value from one of the CPU's internal timers. There is no
 167   inherent time interval between ticks but is a function of the CPU frequency.
 168
 169   @param  This                - Protocol instance structure.
 170   @param  TimerIndex          - Specifies which CPU timer is requested.
 171   @param  TimerValue          - Pointer to the returned timer value.
 172   @param  TimerPeriod         - A pointer to the amount of time that passes
 173                                 in femtoseconds (10-15) for each increment
 174                                 of TimerValue. If TimerValue does not
 175                                 increment at a predictable rate, then 0 is
 176                                 returned.  The amount of time that has
 177                                 passed between two calls to GetTimerValue()
 178                                 can be calculated with the formula
 179                                 (TimerValue2 - TimerValue1) * TimerPeriod.
 180                                 This parameter is optional and may be NULL.
 181
 182   @retval EFI_SUCCESS           - If the CPU timer count was returned.
 183   @retval EFI_UNSUPPORTED       - If the CPU does not have any readable timers.
 184   @retval EFI_DEVICE_ERROR      - If an error occurred while reading the timer.
 185   @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
 186
 187 **/
 188 EFI_STATUS
 189 EFIAPI
 190 CpuGetTimerValue (
 191   IN  EFI_CPU_ARCH_PROTOCOL       *This,
 192   IN  UINT32                      TimerIndex,
 193   OUT UINT64                      *TimerValue,
 194   OUT UINT64                      *TimerPeriod OPTIONAL
 195   );
 196
 197 /**
 198   Set memory cacheability attributes for given range of memeory.
 199
 200   @param  This                   Protocol instance structure
 201   @param  BaseAddress            Specifies the start address of the
 202                                  memory range
 203   @param  Length                 Specifies the length of the memory range
 204   @param  Attributes             The memory cacheability for the memory range
 205
 206   @retval EFI_SUCCESS            If the cacheability of that memory range is
 207                                  set successfully
 208   @retval EFI_UNSUPPORTED        If the desired operation cannot be done
 209   @retval EFI_INVALID_PARAMETER  The input parameter is not correct,
 210                                  such as Length = 0
 211
 212 **/
 213 EFI_STATUS
 214 EFIAPI
 215 CpuSetMemoryAttributes (
 216   IN EFI_CPU_ARCH_PROTOCOL      *This,
 217   IN EFI_PHYSICAL_ADDRESS       BaseAddress,
 218   IN UINT64                     Length,
 219   IN UINT64                     Attributes
 220   );
 221
 222 /**
 223   Initialize Global Descriptor Table.
 224
 225 **/
 226 VOID
 227 InitGlobalDescriptorTable (
 228   VOID
 229   );
 230
 231 /**
 232   Sets the code selector (CS).
 233
 234   @param  Selector  Value of code selector.
 235
 236 **/
 237 VOID
 238 EFIAPI
 239 SetCodeSelector (
 240   UINT16 Selector
 241   );
 242
 243 /**
 244   Sets the data selector (DS).
 245
 246   @param  Selector  Value of data selector.
 247
 248 **/
 249 VOID
 250 EFIAPI
 251 SetDataSelectors (
 252   UINT16 Selector
 253   );
 254
 255 #endif
 256