UefiCpuPkg/CpuDxe/CpuDxe.h

   1 /** @file
   2   CPU DXE Module to produce CPU ARCH Protocol and CPU MP Protocol.
   3
   4   Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>
   5   This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef _CPU_DXE_H_
  16 #define _CPU_DXE_H_
  17
  18 #include <PiDxe.h>
  19
  20 #include <Protocol/Cpu.h>
  21 #include <Protocol/MpService.h>
  22 #include <Register/Msr.h>
  23
  24 #include <Ppi/SecPlatformInformation.h>
  25 #include <Ppi/SecPlatformInformation2.h>
  26
  27 #include <Library/UefiDriverEntryPoint.h>
  28 #include <Library/UefiBootServicesTableLib.h>
  29 #include <Library/DxeServicesTableLib.h>
  30 #include <Library/BaseLib.h>
  31 #include <Library/CpuLib.h>
  32 #include <Library/BaseMemoryLib.h>
  33 #include <Library/MemoryAllocationLib.h>
  34 #include <Library/DebugLib.h>
  35 #include <Library/MtrrLib.h>
  36 #include <Library/LocalApicLib.h>
  37 #include <Library/UefiCpuLib.h>
  38 #include <Library/UefiLib.h>
  39 #include <Library/CpuExceptionHandlerLib.h>
  40 #include <Library/HobLib.h>
  41 #include <Library/ReportStatusCodeLib.h>
  42 #include <Library/MpInitLib.h>
  43 #include <Library/TimerLib.h>
  44
  45 #include <Guid/IdleLoopEvent.h>
  46 #include <Guid/VectorHandoffTable.h>
  47
  48 #define EFI_MEMORY_CACHETYPE_MASK     (EFI_MEMORY_UC  | \
  49                                        EFI_MEMORY_WC  | \
  50                                        EFI_MEMORY_WT  | \
  51                                        EFI_MEMORY_WB  | \
  52                                        EFI_MEMORY_UCE   \
  53                                        )
  54
  55
  56 /**
  57   Flush CPU data cache. If the instruction cache is fully coherent
  58   with all DMA operations then function can just return EFI_SUCCESS.
  59
  60   @param  This              Protocol instance structure
  61   @param  Start             Physical address to start flushing from.
  62   @param  Length            Number of bytes to flush. Round up to chipset
  63                             granularity.
  64   @param  FlushType         Specifies the type of flush operation to perform.
  65
  66   @retval EFI_SUCCESS       If cache was flushed
  67   @retval EFI_UNSUPPORTED   If flush type is not supported.
  68   @retval EFI_DEVICE_ERROR  If requested range could not be flushed.
  69
  70 **/
  71 EFI_STATUS
  72 EFIAPI
  73 CpuFlushCpuDataCache (
  74   IN EFI_CPU_ARCH_PROTOCOL     *This,
  75   IN EFI_PHYSICAL_ADDRESS      Start,
  76   IN UINT64                    Length,
  77   IN EFI_CPU_FLUSH_TYPE        FlushType
  78   );
  79
  80 /**
  81   Enables CPU interrupts.
  82
  83   @param  This              Protocol instance structure
  84
  85   @retval EFI_SUCCESS       If interrupts were enabled in the CPU
  86   @retval EFI_DEVICE_ERROR  If interrupts could not be enabled on the CPU.
  87
  88 **/
  89 EFI_STATUS
  90 EFIAPI
  91 CpuEnableInterrupt (
  92   IN EFI_CPU_ARCH_PROTOCOL     *This
  93   );
  94
  95 /**
  96   Disables CPU interrupts.
  97
  98   @param  This              Protocol instance structure
  99
 100   @retval EFI_SUCCESS       If interrupts were disabled in the CPU.
 101   @retval EFI_DEVICE_ERROR  If interrupts could not be disabled on the CPU.
 102
 103 **/
 104 EFI_STATUS
 105 EFIAPI
 106 CpuDisableInterrupt (
 107   IN EFI_CPU_ARCH_PROTOCOL     *This
 108   );
 109
 110 /**
 111   Return the state of interrupts.
 112
 113   @param  This                   Protocol instance structure
 114   @param  State                  Pointer to the CPU's current interrupt state
 115
 116   @retval EFI_SUCCESS            If interrupts were disabled in the CPU.
 117   @retval EFI_INVALID_PARAMETER  State is NULL.
 118
 119 **/
 120 EFI_STATUS
 121 EFIAPI
 122 CpuGetInterruptState (
 123   IN  EFI_CPU_ARCH_PROTOCOL     *This,
 124   OUT BOOLEAN                   *State
 125   );
 126
 127 /**
 128   Generates an INIT to the CPU.
 129
 130   @param  This              Protocol instance structure
 131   @param  InitType          Type of CPU INIT to perform
 132
 133   @retval EFI_SUCCESS       If CPU INIT occurred. This value should never be
 134                             seen.
 135   @retval EFI_DEVICE_ERROR  If CPU INIT failed.
 136   @retval EFI_UNSUPPORTED   Requested type of CPU INIT not supported.
 137
 138 **/
 139 EFI_STATUS
 140 EFIAPI
 141 CpuInit (
 142   IN EFI_CPU_ARCH_PROTOCOL     *This,
 143   IN EFI_CPU_INIT_TYPE         InitType
 144   );
 145
 146 /**
 147   Registers a function to be called from the CPU interrupt handler.
 148
 149   @param  This                   Protocol instance structure
 150   @param  InterruptType          Defines which interrupt to hook. IA-32
 151                                  valid range is 0x00 through 0xFF
 152   @param  InterruptHandler       A pointer to a function of type
 153                                  EFI_CPU_INTERRUPT_HANDLER that is called
 154                                  when a processor interrupt occurs.  A null
 155                                  pointer is an error condition.
 156
 157   @retval EFI_SUCCESS            If handler installed or uninstalled.
 158   @retval EFI_ALREADY_STARTED    InterruptHandler is not NULL, and a handler
 159                                  for InterruptType was previously installed.
 160   @retval EFI_INVALID_PARAMETER  InterruptHandler is NULL, and a handler for
 161                                  InterruptType was not previously installed.
 162   @retval EFI_UNSUPPORTED        The interrupt specified by InterruptType
 163                                  is not supported.
 164
 165 **/
 166 EFI_STATUS
 167 EFIAPI
 168 CpuRegisterInterruptHandler (
 169   IN EFI_CPU_ARCH_PROTOCOL         *This,
 170   IN EFI_EXCEPTION_TYPE            InterruptType,
 171   IN EFI_CPU_INTERRUPT_HANDLER     InterruptHandler
 172   );
 173
 174 /**
 175   Returns a timer value from one of the CPU's internal timers. There is no
 176   inherent time interval between ticks but is a function of the CPU frequency.
 177
 178   @param  This                - Protocol instance structure.
 179   @param  TimerIndex          - Specifies which CPU timer is requested.
 180   @param  TimerValue          - Pointer to the returned timer value.
 181   @param  TimerPeriod         - A pointer to the amount of time that passes
 182                                 in femtoseconds (10-15) for each increment
 183                                 of TimerValue. If TimerValue does not
 184                                 increment at a predictable rate, then 0 is
 185                                 returned.  The amount of time that has
 186                                 passed between two calls to GetTimerValue()
 187                                 can be calculated with the formula
 188                                 (TimerValue2 - TimerValue1) * TimerPeriod.
 189                                 This parameter is optional and may be NULL.
 190
 191   @retval EFI_SUCCESS           - If the CPU timer count was returned.
 192   @retval EFI_UNSUPPORTED       - If the CPU does not have any readable timers.
 193   @retval EFI_DEVICE_ERROR      - If an error occurred while reading the timer.
 194   @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
 195
 196 **/
 197 EFI_STATUS
 198 EFIAPI
 199 CpuGetTimerValue (
 200   IN  EFI_CPU_ARCH_PROTOCOL       *This,
 201   IN  UINT32                      TimerIndex,
 202   OUT UINT64                      *TimerValue,
 203   OUT UINT64                      *TimerPeriod OPTIONAL
 204   );
 205
 206 /**
 207   Set memory cacheability attributes for given range of memeory.
 208
 209   @param  This                   Protocol instance structure
 210   @param  BaseAddress            Specifies the start address of the
 211                                  memory range
 212   @param  Length                 Specifies the length of the memory range
 213   @param  Attributes             The memory cacheability for the memory range
 214
 215   @retval EFI_SUCCESS            If the cacheability of that memory range is
 216                                  set successfully
 217   @retval EFI_UNSUPPORTED        If the desired operation cannot be done
 218   @retval EFI_INVALID_PARAMETER  The input parameter is not correct,
 219                                  such as Length = 0
 220
 221 **/
 222 EFI_STATUS
 223 EFIAPI
 224 CpuSetMemoryAttributes (
 225   IN EFI_CPU_ARCH_PROTOCOL      *This,
 226   IN EFI_PHYSICAL_ADDRESS       BaseAddress,
 227   IN UINT64                     Length,
 228   IN UINT64                     Attributes
 229   );
 230
 231 /**
 232   Initialize Global Descriptor Table.
 233
 234 **/
 235 VOID
 236 InitGlobalDescriptorTable (
 237   VOID
 238   );
 239
 240 /**
 241   Sets the code selector (CS).
 242
 243   @param  Selector  Value of code selector.
 244
 245 **/
 246 VOID
 247 EFIAPI
 248 SetCodeSelector (
 249   UINT16 Selector
 250   );
 251
 252 /**
 253   Sets the data selector (DS).
 254
 255   @param  Selector  Value of data selector.
 256
 257 **/
 258 VOID
 259 EFIAPI
 260 SetDataSelectors (
 261   UINT16 Selector
 262   );
 263
 264 #endif
 265