Code refinement.
[mirror_edk2.git] / UefiCpuPkg / CpuDxe / CpuDxe.h
1 /** @file
2 CPU DXE Module.
3
4 Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef _CPU_DXE_H_
16 #define _CPU_DXE_H_
17
18 #include <PiDxe.h>
19
20 #include <Protocol/Cpu.h>
21
22 #include <Library/UefiDriverEntryPoint.h>
23 #include <Library/UefiBootServicesTableLib.h>
24 #include <Library/DxeServicesTableLib.h>
25 #include <Library/BaseLib.h>
26 #include <Library/CpuLib.h>
27 #include <Library/BaseMemoryLib.h>
28 #include <Library/MemoryAllocationLib.h>
29 #include <Library/DebugLib.h>
30 #include <Library/MtrrLib.h>
31
32 //
33 //
34 //
35 #define INTERRUPT_VECTOR_NUMBER 256
36
37 #define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | \
38 EFI_MEMORY_WC | \
39 EFI_MEMORY_WT | \
40 EFI_MEMORY_WB | \
41 EFI_MEMORY_UCE \
42 )
43
44
45 /**
46 Flush CPU data cache. If the instruction cache is fully coherent
47 with all DMA operations then function can just return EFI_SUCCESS.
48
49 @param This Protocol instance structure
50 @param Start Physical address to start flushing from.
51 @param Length Number of bytes to flush. Round up to chipset
52 granularity.
53 @param FlushType Specifies the type of flush operation to perform.
54
55 @retval EFI_SUCCESS If cache was flushed
56 @retval EFI_UNSUPPORTED If flush type is not supported.
57 @retval EFI_DEVICE_ERROR If requested range could not be flushed.
58
59 **/
60 EFI_STATUS
61 EFIAPI
62 CpuFlushCpuDataCache (
63 IN EFI_CPU_ARCH_PROTOCOL *This,
64 IN EFI_PHYSICAL_ADDRESS Start,
65 IN UINT64 Length,
66 IN EFI_CPU_FLUSH_TYPE FlushType
67 );
68
69 /**
70 Enables CPU interrupts.
71
72 @param This Protocol instance structure
73
74 @retval EFI_SUCCESS If interrupts were enabled in the CPU
75 @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
76
77 **/
78 EFI_STATUS
79 EFIAPI
80 CpuEnableInterrupt (
81 IN EFI_CPU_ARCH_PROTOCOL *This
82 );
83
84 /**
85 Disables CPU interrupts.
86
87 @param This Protocol instance structure
88
89 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
90 @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
91
92 **/
93 EFI_STATUS
94 EFIAPI
95 CpuDisableInterrupt (
96 IN EFI_CPU_ARCH_PROTOCOL *This
97 );
98
99 /**
100 Return the state of interrupts.
101
102 @param This Protocol instance structure
103 @param State Pointer to the CPU's current interrupt state
104
105 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
106 @retval EFI_INVALID_PARAMETER State is NULL.
107
108 **/
109 EFI_STATUS
110 EFIAPI
111 CpuGetInterruptState (
112 IN EFI_CPU_ARCH_PROTOCOL *This,
113 OUT BOOLEAN *State
114 );
115
116 /**
117 Generates an INIT to the CPU.
118
119 @param This Protocol instance structure
120 @param InitType Type of CPU INIT to perform
121
122 @retval EFI_SUCCESS If CPU INIT occurred. This value should never be
123 seen.
124 @retval EFI_DEVICE_ERROR If CPU INIT failed.
125 @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
126
127 **/
128 EFI_STATUS
129 EFIAPI
130 CpuInit (
131 IN EFI_CPU_ARCH_PROTOCOL *This,
132 IN EFI_CPU_INIT_TYPE InitType
133 );
134
135 /**
136 Registers a function to be called from the CPU interrupt handler.
137
138 @param This Protocol instance structure
139 @param InterruptType Defines which interrupt to hook. IA-32
140 valid range is 0x00 through 0xFF
141 @param InterruptHandler A pointer to a function of type
142 EFI_CPU_INTERRUPT_HANDLER that is called
143 when a processor interrupt occurs. A null
144 pointer is an error condition.
145
146 @retval EFI_SUCCESS If handler installed or uninstalled.
147 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
148 for InterruptType was previously installed.
149 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
150 InterruptType was not previously installed.
151 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType
152 is not supported.
153
154 **/
155 EFI_STATUS
156 EFIAPI
157 CpuRegisterInterruptHandler (
158 IN EFI_CPU_ARCH_PROTOCOL *This,
159 IN EFI_EXCEPTION_TYPE InterruptType,
160 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
161 );
162
163 /**
164 Returns a timer value from one of the CPU's internal timers. There is no
165 inherent time interval between ticks but is a function of the CPU frequency.
166
167 @param This - Protocol instance structure.
168 @param TimerIndex - Specifies which CPU timer is requested.
169 @param TimerValue - Pointer to the returned timer value.
170 @param TimerPeriod - A pointer to the amount of time that passes
171 in femtoseconds (10-15) for each increment
172 of TimerValue. If TimerValue does not
173 increment at a predictable rate, then 0 is
174 returned. The amount of time that has
175 passed between two calls to GetTimerValue()
176 can be calculated with the formula
177 (TimerValue2 - TimerValue1) * TimerPeriod.
178 This parameter is optional and may be NULL.
179
180 @retval EFI_SUCCESS - If the CPU timer count was returned.
181 @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
182 @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
183 @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
184
185 **/
186 EFI_STATUS
187 EFIAPI
188 CpuGetTimerValue (
189 IN EFI_CPU_ARCH_PROTOCOL *This,
190 IN UINT32 TimerIndex,
191 OUT UINT64 *TimerValue,
192 OUT UINT64 *TimerPeriod OPTIONAL
193 );
194
195 /**
196 Set memory cacheability attributes for given range of memeory.
197
198 @param This Protocol instance structure
199 @param BaseAddress Specifies the start address of the
200 memory range
201 @param Length Specifies the length of the memory range
202 @param Attributes The memory cacheability for the memory range
203
204 @retval EFI_SUCCESS If the cacheability of that memory range is
205 set successfully
206 @retval EFI_UNSUPPORTED If the desired operation cannot be done
207 @retval EFI_INVALID_PARAMETER The input parameter is not correct,
208 such as Length = 0
209
210 **/
211 EFI_STATUS
212 EFIAPI
213 CpuSetMemoryAttributes (
214 IN EFI_CPU_ARCH_PROTOCOL *This,
215 IN EFI_PHYSICAL_ADDRESS BaseAddress,
216 IN UINT64 Length,
217 IN UINT64 Attributes
218 );
219
220 /**
221 Label of base address of IDT vector 0.
222
223 This is just a label of base address of IDT vector 0.
224
225 **/
226 VOID
227 EFIAPI
228 AsmIdtVector00 (
229 VOID
230 );
231
232 /**
233 Initializes the pointer to the external interrupt vector table.
234
235 @param VectorTable Address of the external interrupt vector table.
236
237 **/
238 VOID
239 EFIAPI
240 InitializeExternalVectorTablePtr (
241 EFI_CPU_INTERRUPT_HANDLER *VectorTable
242 );
243
244 /**
245 Initialize Global Descriptor Table.
246
247 **/
248 VOID
249 InitGlobalDescriptorTable (
250 VOID
251 );
252
253 /**
254 Sets the code selector (CS).
255
256 @param Selector Value of code selector.
257
258 **/
259 VOID
260 EFIAPI
261 SetCodeSelector (
262 UINT16 Selector
263 );
264
265 /**
266 Sets the data selector (DS).
267
268 @param Selector Value of data selector.
269
270 **/
271 VOID
272 EFIAPI
273 SetDataSelectors (
274 UINT16 Selector
275 );
276
277
278 #endif
279