UefiCpuPkg/CpuDxe/CpuDxe.h

   1 /** @file
   2   CPU DXE Module to produce CPU ARCH Protocol and CPU MP Protocol.
   3
   4   Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>
   5   This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef _CPU_DXE_H_
  16 #define _CPU_DXE_H_
  17
  18 #include <PiDxe.h>
  19
  20 #include <Protocol/Cpu.h>
  21 #include <Protocol/MpService.h>
  22
  23 #include <Ppi/SecPlatformInformation.h>
  24 #include <Ppi/SecPlatformInformation2.h>
  25
  26 #include <Library/UefiDriverEntryPoint.h>
  27 #include <Library/UefiBootServicesTableLib.h>
  28 #include <Library/DxeServicesTableLib.h>
  29 #include <Library/BaseLib.h>
  30 #include <Library/CpuLib.h>
  31 #include <Library/BaseMemoryLib.h>
  32 #include <Library/MemoryAllocationLib.h>
  33 #include <Library/DebugLib.h>
  34 #include <Library/MtrrLib.h>
  35 #include <Library/LocalApicLib.h>
  36 #include <Library/UefiCpuLib.h>
  37 #include <Library/UefiLib.h>
  38 #include <Library/CpuExceptionHandlerLib.h>
  39 #include <Library/TimerLib.h>
  40 #include <Library/HobLib.h>
  41 #include <Library/ReportStatusCodeLib.h>
  42 #include <Library/MpInitLib.h>
  43
  44 #include <Guid/IdleLoopEvent.h>
  45 #include <Guid/VectorHandoffTable.h>
  46
  47 #define EFI_MEMORY_CACHETYPE_MASK     (EFI_MEMORY_UC  | \
  48                                        EFI_MEMORY_WC  | \
  49                                        EFI_MEMORY_WT  | \
  50                                        EFI_MEMORY_WB  | \
  51                                        EFI_MEMORY_UCE   \
  52                                        )
  53
  54
  55 /**
  56   Flush CPU data cache. If the instruction cache is fully coherent
  57   with all DMA operations then function can just return EFI_SUCCESS.
  58
  59   @param  This              Protocol instance structure
  60   @param  Start             Physical address to start flushing from.
  61   @param  Length            Number of bytes to flush. Round up to chipset
  62                             granularity.
  63   @param  FlushType         Specifies the type of flush operation to perform.
  64
  65   @retval EFI_SUCCESS       If cache was flushed
  66   @retval EFI_UNSUPPORTED   If flush type is not supported.
  67   @retval EFI_DEVICE_ERROR  If requested range could not be flushed.
  68
  69 **/
  70 EFI_STATUS
  71 EFIAPI
  72 CpuFlushCpuDataCache (
  73   IN EFI_CPU_ARCH_PROTOCOL     *This,
  74   IN EFI_PHYSICAL_ADDRESS      Start,
  75   IN UINT64                    Length,
  76   IN EFI_CPU_FLUSH_TYPE        FlushType
  77   );
  78
  79 /**
  80   Enables CPU interrupts.
  81
  82   @param  This              Protocol instance structure
  83
  84   @retval EFI_SUCCESS       If interrupts were enabled in the CPU
  85   @retval EFI_DEVICE_ERROR  If interrupts could not be enabled on the CPU.
  86
  87 **/
  88 EFI_STATUS
  89 EFIAPI
  90 CpuEnableInterrupt (
  91   IN EFI_CPU_ARCH_PROTOCOL     *This
  92   );
  93
  94 /**
  95   Disables CPU interrupts.
  96
  97   @param  This              Protocol instance structure
  98
  99   @retval EFI_SUCCESS       If interrupts were disabled in the CPU.
 100   @retval EFI_DEVICE_ERROR  If interrupts could not be disabled on the CPU.
 101
 102 **/
 103 EFI_STATUS
 104 EFIAPI
 105 CpuDisableInterrupt (
 106   IN EFI_CPU_ARCH_PROTOCOL     *This
 107   );
 108
 109 /**
 110   Return the state of interrupts.
 111
 112   @param  This                   Protocol instance structure
 113   @param  State                  Pointer to the CPU's current interrupt state
 114
 115   @retval EFI_SUCCESS            If interrupts were disabled in the CPU.
 116   @retval EFI_INVALID_PARAMETER  State is NULL.
 117
 118 **/
 119 EFI_STATUS
 120 EFIAPI
 121 CpuGetInterruptState (
 122   IN  EFI_CPU_ARCH_PROTOCOL     *This,
 123   OUT BOOLEAN                   *State
 124   );
 125
 126 /**
 127   Generates an INIT to the CPU.
 128
 129   @param  This              Protocol instance structure
 130   @param  InitType          Type of CPU INIT to perform
 131
 132   @retval EFI_SUCCESS       If CPU INIT occurred. This value should never be
 133                             seen.
 134   @retval EFI_DEVICE_ERROR  If CPU INIT failed.
 135   @retval EFI_UNSUPPORTED   Requested type of CPU INIT not supported.
 136
 137 **/
 138 EFI_STATUS
 139 EFIAPI
 140 CpuInit (
 141   IN EFI_CPU_ARCH_PROTOCOL     *This,
 142   IN EFI_CPU_INIT_TYPE         InitType
 143   );
 144
 145 /**
 146   Registers a function to be called from the CPU interrupt handler.
 147
 148   @param  This                   Protocol instance structure
 149   @param  InterruptType          Defines which interrupt to hook. IA-32
 150                                  valid range is 0x00 through 0xFF
 151   @param  InterruptHandler       A pointer to a function of type
 152                                  EFI_CPU_INTERRUPT_HANDLER that is called
 153                                  when a processor interrupt occurs.  A null
 154                                  pointer is an error condition.
 155
 156   @retval EFI_SUCCESS            If handler installed or uninstalled.
 157   @retval EFI_ALREADY_STARTED    InterruptHandler is not NULL, and a handler
 158                                  for InterruptType was previously installed.
 159   @retval EFI_INVALID_PARAMETER  InterruptHandler is NULL, and a handler for
 160                                  InterruptType was not previously installed.
 161   @retval EFI_UNSUPPORTED        The interrupt specified by InterruptType
 162                                  is not supported.
 163
 164 **/
 165 EFI_STATUS
 166 EFIAPI
 167 CpuRegisterInterruptHandler (
 168   IN EFI_CPU_ARCH_PROTOCOL         *This,
 169   IN EFI_EXCEPTION_TYPE            InterruptType,
 170   IN EFI_CPU_INTERRUPT_HANDLER     InterruptHandler
 171   );
 172
 173 /**
 174   Returns a timer value from one of the CPU's internal timers. There is no
 175   inherent time interval between ticks but is a function of the CPU frequency.
 176
 177   @param  This                - Protocol instance structure.
 178   @param  TimerIndex          - Specifies which CPU timer is requested.
 179   @param  TimerValue          - Pointer to the returned timer value.
 180   @param  TimerPeriod         - A pointer to the amount of time that passes
 181                                 in femtoseconds (10-15) for each increment
 182                                 of TimerValue. If TimerValue does not
 183                                 increment at a predictable rate, then 0 is
 184                                 returned.  The amount of time that has
 185                                 passed between two calls to GetTimerValue()
 186                                 can be calculated with the formula
 187                                 (TimerValue2 - TimerValue1) * TimerPeriod.
 188                                 This parameter is optional and may be NULL.
 189
 190   @retval EFI_SUCCESS           - If the CPU timer count was returned.
 191   @retval EFI_UNSUPPORTED       - If the CPU does not have any readable timers.
 192   @retval EFI_DEVICE_ERROR      - If an error occurred while reading the timer.
 193   @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
 194
 195 **/
 196 EFI_STATUS
 197 EFIAPI
 198 CpuGetTimerValue (
 199   IN  EFI_CPU_ARCH_PROTOCOL       *This,
 200   IN  UINT32                      TimerIndex,
 201   OUT UINT64                      *TimerValue,
 202   OUT UINT64                      *TimerPeriod OPTIONAL
 203   );
 204
 205 /**
 206   Set memory cacheability attributes for given range of memeory.
 207
 208   @param  This                   Protocol instance structure
 209   @param  BaseAddress            Specifies the start address of the
 210                                  memory range
 211   @param  Length                 Specifies the length of the memory range
 212   @param  Attributes             The memory cacheability for the memory range
 213
 214   @retval EFI_SUCCESS            If the cacheability of that memory range is
 215                                  set successfully
 216   @retval EFI_UNSUPPORTED        If the desired operation cannot be done
 217   @retval EFI_INVALID_PARAMETER  The input parameter is not correct,
 218                                  such as Length = 0
 219
 220 **/
 221 EFI_STATUS
 222 EFIAPI
 223 CpuSetMemoryAttributes (
 224   IN EFI_CPU_ARCH_PROTOCOL      *This,
 225   IN EFI_PHYSICAL_ADDRESS       BaseAddress,
 226   IN UINT64                     Length,
 227   IN UINT64                     Attributes
 228   );
 229
 230 /**
 231   Initialize Global Descriptor Table.
 232
 233 **/
 234 VOID
 235 InitGlobalDescriptorTable (
 236   VOID
 237   );
 238
 239 /**
 240   Sets the code selector (CS).
 241
 242   @param  Selector  Value of code selector.
 243
 244 **/
 245 VOID
 246 EFIAPI
 247 SetCodeSelector (
 248   UINT16 Selector
 249   );
 250
 251 /**
 252   Sets the data selector (DS).
 253
 254   @param  Selector  Value of data selector.
 255
 256 **/
 257 VOID
 258 EFIAPI
 259 SetDataSelectors (
 260   UINT16 Selector
 261   );
 262
 263 #endif
 264