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Restore original IDT entry if RegisterInterruptHandler() was used to unregister user...
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1 /** @file
2 CPU DXE Module.
3
4 Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef _CPU_DXE_H_
16 #define _CPU_DXE_H_
17
18 #include <PiDxe.h>
19
20 #include <Protocol/Cpu.h>
21
22 #include <Library/UefiDriverEntryPoint.h>
23 #include <Library/UefiBootServicesTableLib.h>
24 #include <Library/DxeServicesTableLib.h>
25 #include <Library/BaseLib.h>
26 #include <Library/CpuLib.h>
27 #include <Library/BaseMemoryLib.h>
28 #include <Library/MemoryAllocationLib.h>
29 #include <Library/DebugLib.h>
30 #include <Library/MtrrLib.h>
31 #include <Guid/IdleLoopEvent.h>
32
33 //
34 //
35 //
36 #define INTERRUPT_VECTOR_NUMBER 256
37
38 #define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | \
39 EFI_MEMORY_WC | \
40 EFI_MEMORY_WT | \
41 EFI_MEMORY_WB | \
42 EFI_MEMORY_UCE \
43 )
44
45
46 /**
47 Flush CPU data cache. If the instruction cache is fully coherent
48 with all DMA operations then function can just return EFI_SUCCESS.
49
50 @param This Protocol instance structure
51 @param Start Physical address to start flushing from.
52 @param Length Number of bytes to flush. Round up to chipset
53 granularity.
54 @param FlushType Specifies the type of flush operation to perform.
55
56 @retval EFI_SUCCESS If cache was flushed
57 @retval EFI_UNSUPPORTED If flush type is not supported.
58 @retval EFI_DEVICE_ERROR If requested range could not be flushed.
59
60 **/
61 EFI_STATUS
62 EFIAPI
63 CpuFlushCpuDataCache (
64 IN EFI_CPU_ARCH_PROTOCOL *This,
65 IN EFI_PHYSICAL_ADDRESS Start,
66 IN UINT64 Length,
67 IN EFI_CPU_FLUSH_TYPE FlushType
68 );
69
70 /**
71 Enables CPU interrupts.
72
73 @param This Protocol instance structure
74
75 @retval EFI_SUCCESS If interrupts were enabled in the CPU
76 @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
77
78 **/
79 EFI_STATUS
80 EFIAPI
81 CpuEnableInterrupt (
82 IN EFI_CPU_ARCH_PROTOCOL *This
83 );
84
85 /**
86 Disables CPU interrupts.
87
88 @param This Protocol instance structure
89
90 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
91 @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
92
93 **/
94 EFI_STATUS
95 EFIAPI
96 CpuDisableInterrupt (
97 IN EFI_CPU_ARCH_PROTOCOL *This
98 );
99
100 /**
101 Return the state of interrupts.
102
103 @param This Protocol instance structure
104 @param State Pointer to the CPU's current interrupt state
105
106 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
107 @retval EFI_INVALID_PARAMETER State is NULL.
108
109 **/
110 EFI_STATUS
111 EFIAPI
112 CpuGetInterruptState (
113 IN EFI_CPU_ARCH_PROTOCOL *This,
114 OUT BOOLEAN *State
115 );
116
117 /**
118 Generates an INIT to the CPU.
119
120 @param This Protocol instance structure
121 @param InitType Type of CPU INIT to perform
122
123 @retval EFI_SUCCESS If CPU INIT occurred. This value should never be
124 seen.
125 @retval EFI_DEVICE_ERROR If CPU INIT failed.
126 @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
127
128 **/
129 EFI_STATUS
130 EFIAPI
131 CpuInit (
132 IN EFI_CPU_ARCH_PROTOCOL *This,
133 IN EFI_CPU_INIT_TYPE InitType
134 );
135
136 /**
137 Registers a function to be called from the CPU interrupt handler.
138
139 @param This Protocol instance structure
140 @param InterruptType Defines which interrupt to hook. IA-32
141 valid range is 0x00 through 0xFF
142 @param InterruptHandler A pointer to a function of type
143 EFI_CPU_INTERRUPT_HANDLER that is called
144 when a processor interrupt occurs. A null
145 pointer is an error condition.
146
147 @retval EFI_SUCCESS If handler installed or uninstalled.
148 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
149 for InterruptType was previously installed.
150 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
151 InterruptType was not previously installed.
152 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType
153 is not supported.
154
155 **/
156 EFI_STATUS
157 EFIAPI
158 CpuRegisterInterruptHandler (
159 IN EFI_CPU_ARCH_PROTOCOL *This,
160 IN EFI_EXCEPTION_TYPE InterruptType,
161 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
162 );
163
164 /**
165 Returns a timer value from one of the CPU's internal timers. There is no
166 inherent time interval between ticks but is a function of the CPU frequency.
167
168 @param This - Protocol instance structure.
169 @param TimerIndex - Specifies which CPU timer is requested.
170 @param TimerValue - Pointer to the returned timer value.
171 @param TimerPeriod - A pointer to the amount of time that passes
172 in femtoseconds (10-15) for each increment
173 of TimerValue. If TimerValue does not
174 increment at a predictable rate, then 0 is
175 returned. The amount of time that has
176 passed between two calls to GetTimerValue()
177 can be calculated with the formula
178 (TimerValue2 - TimerValue1) * TimerPeriod.
179 This parameter is optional and may be NULL.
180
181 @retval EFI_SUCCESS - If the CPU timer count was returned.
182 @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
183 @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
184 @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
185
186 **/
187 EFI_STATUS
188 EFIAPI
189 CpuGetTimerValue (
190 IN EFI_CPU_ARCH_PROTOCOL *This,
191 IN UINT32 TimerIndex,
192 OUT UINT64 *TimerValue,
193 OUT UINT64 *TimerPeriod OPTIONAL
194 );
195
196 /**
197 Set memory cacheability attributes for given range of memeory.
198
199 @param This Protocol instance structure
200 @param BaseAddress Specifies the start address of the
201 memory range
202 @param Length Specifies the length of the memory range
203 @param Attributes The memory cacheability for the memory range
204
205 @retval EFI_SUCCESS If the cacheability of that memory range is
206 set successfully
207 @retval EFI_UNSUPPORTED If the desired operation cannot be done
208 @retval EFI_INVALID_PARAMETER The input parameter is not correct,
209 such as Length = 0
210
211 **/
212 EFI_STATUS
213 EFIAPI
214 CpuSetMemoryAttributes (
215 IN EFI_CPU_ARCH_PROTOCOL *This,
216 IN EFI_PHYSICAL_ADDRESS BaseAddress,
217 IN UINT64 Length,
218 IN UINT64 Attributes
219 );
220
221 /**
222 Label of base address of IDT vector 0.
223
224 This is just a label of base address of IDT vector 0.
225
226 **/
227 VOID
228 EFIAPI
229 AsmIdtVector00 (
230 VOID
231 );
232
233 /**
234 Initializes the pointer to the external interrupt vector table.
235
236 @param VectorTable Address of the external interrupt vector table.
237
238 **/
239 VOID
240 EFIAPI
241 InitializeExternalVectorTablePtr (
242 EFI_CPU_INTERRUPT_HANDLER *VectorTable
243 );
244
245 /**
246 Initialize Global Descriptor Table.
247
248 **/
249 VOID
250 InitGlobalDescriptorTable (
251 VOID
252 );
253
254 /**
255 Sets the code selector (CS).
256
257 @param Selector Value of code selector.
258
259 **/
260 VOID
261 EFIAPI
262 SetCodeSelector (
263 UINT16 Selector
264 );
265
266 /**
267 Sets the data selector (DS).
268
269 @param Selector Value of data selector.
270
271 **/
272 VOID
273 EFIAPI
274 SetDataSelectors (
275 UINT16 Selector
276 );
277
278 /**
279 Restore original Interrupt Descriptor Table Handler Address.
280
281 @param Index The Index of the interrupt descriptor table handle.
282
283 **/
284 VOID
285 RestoreInterruptDescriptorTableHandlerAddress (
286 IN UINTN Index
287 );
288
289 #endif
290