UefiCpuPkg/CpuDxe/CpuGdt.c

   1 /** @file
   2   C based implemention of IA32 interrupt handling only
   3   requiring a minimal assembly interrupt entry point.
   4
   5   Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
   6   This program and the accompanying materials
   7   are licensed and made available under the terms and conditions of the BSD License
   8   which accompanies this distribution.  The full text of the license may be found at
   9   http://opensource.org/licenses/bsd-license.php
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15
  16 #include "CpuDxe.h"
  17 #include "CpuGdt.h"
  18
  19 //
  20 // Global descriptor table (GDT) Template
  21 //
  22 STATIC GDT_ENTRIES GdtTemplate = {
  23   //
  24   // NULL_SEL
  25   //
  26   {
  27     0x0,            // limit 15:0
  28     0x0,            // base 15:0
  29     0x0,            // base 23:16
  30     0x0,            // type
  31     0x0,            // limit 19:16, flags
  32     0x0,            // base 31:24
  33   },
  34   //
  35   // LINEAR_SEL
  36   //
  37   {
  38     0x0FFFF,        // limit 0xFFFFF
  39     0x0,            // base 0
  40     0x0,
  41     0x092,          // present, ring 0, data, expand-up, writable
  42     0x0CF,          // page-granular, 32-bit
  43     0x0,
  44   },
  45   //
  46   // LINEAR_CODE_SEL
  47   //
  48   {
  49     0x0FFFF,        // limit 0xFFFFF
  50     0x0,            // base 0
  51     0x0,
  52     0x09A,          // present, ring 0, data, expand-up, writable
  53     0x0CF,          // page-granular, 32-bit
  54     0x0,
  55   },
  56   //
  57   // SYS_DATA_SEL
  58   //
  59   {
  60     0x0FFFF,        // limit 0xFFFFF
  61     0x0,            // base 0
  62     0x0,
  63     0x092,          // present, ring 0, data, expand-up, writable
  64     0x0CF,          // page-granular, 32-bit
  65     0x0,
  66   },
  67   //
  68   // SYS_CODE_SEL
  69   //
  70   {
  71     0x0FFFF,        // limit 0xFFFFF
  72     0x0,            // base 0
  73     0x0,
  74     0x09A,          // present, ring 0, data, expand-up, writable
  75     0x0CF,          // page-granular, 32-bit
  76     0x0,
  77   },
  78   //
  79   // LINEAR_CODE64_SEL
  80   //
  81   {
  82     0x0FFFF,        // limit 0xFFFFF
  83     0x0,            // base 0
  84     0x0,
  85     0x09B,          // present, ring 0, code, expand-up, writable
  86     0x0AF,          // LimitHigh (CS.L=1, CS.D=0)
  87     0x0,            // base (high)
  88   },
  89   //
  90   // SPARE4_SEL
  91   //
  92   {
  93     0x0,            // limit 0
  94     0x0,            // base 0
  95     0x0,
  96     0x0,            // present, ring 0, data, expand-up, writable
  97     0x0,            // page-granular, 32-bit
  98     0x0,
  99   },
 100   //
 101   // SPARE5_SEL
 102   //
 103   {
 104     0x0,            // limit 0
 105     0x0,            // base 0
 106     0x0,
 107     0x0,            // present, ring 0, data, expand-up, writable
 108     0x0,            // page-granular, 32-bit
 109     0x0,
 110   },
 111 };
 112
 113 /**
 114   Initialize Global Descriptor Table.
 115
 116 **/
 117 VOID
 118 InitGlobalDescriptorTable (
 119   VOID
 120   )
 121 {
 122   GDT_ENTRIES *gdt;
 123   IA32_DESCRIPTOR gdtPtr;
 124
 125   //
 126   // Allocate Runtime Data for the GDT
 127   //
 128   gdt = AllocateRuntimePool (sizeof (GdtTemplate) + 8);
 129   ASSERT (gdt != NULL);
 130   gdt = ALIGN_POINTER (gdt, 8);
 131
 132   //
 133   // Initialize all GDT entries
 134   //
 135   CopyMem (gdt, &GdtTemplate, sizeof (GdtTemplate));
 136
 137   //
 138   // Write GDT register
 139   //
 140   gdtPtr.Base = (UINT32)(UINTN)(VOID*) gdt;
 141   gdtPtr.Limit = (UINT16) (sizeof (GdtTemplate) - 1);
 142   AsmWriteGdtr (&gdtPtr);
 143
 144   //
 145   // Update selector (segment) registers base on new GDT
 146   //
 147   SetCodeSelector ((UINT16)CPU_CODE_SEL);
 148   SetDataSelectors ((UINT16)CPU_DATA_SEL);
 149 }
 150