UefiCpuPkg/CpuDxe/CpuPageTable.c

   1 /** @file
   2   Page table management support.
   3
   4   Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
   5   Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
   6
   7   This program and the accompanying materials
   8   are licensed and made available under the terms and conditions of the BSD License
   9   which accompanies this distribution.  The full text of the license may be found at
  10   http://opensource.org/licenses/bsd-license.php
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15 **/
  16
  17 #include <Base.h>
  18 #include <Uefi.h>
  19 #include <Library/BaseLib.h>
  20 #include <Library/CpuLib.h>
  21 #include <Library/BaseMemoryLib.h>
  22 #include <Library/MemoryAllocationLib.h>
  23 #include <Library/DebugLib.h>
  24 #include <Library/UefiBootServicesTableLib.h>
  25 #include <Protocol/MpService.h>
  26 #include "CpuPageTable.h"
  27
  28 ///
  29 /// Page Table Entry
  30 ///
  31 #define IA32_PG_P                   BIT0
  32 #define IA32_PG_RW                  BIT1
  33 #define IA32_PG_U                   BIT2
  34 #define IA32_PG_WT                  BIT3
  35 #define IA32_PG_CD                  BIT4
  36 #define IA32_PG_A                   BIT5
  37 #define IA32_PG_D                   BIT6
  38 #define IA32_PG_PS                  BIT7
  39 #define IA32_PG_PAT_2M              BIT12
  40 #define IA32_PG_PAT_4K              IA32_PG_PS
  41 #define IA32_PG_PMNT                BIT62
  42 #define IA32_PG_NX                  BIT63
  43
  44 #define PAGE_ATTRIBUTE_BITS         (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
  45 //
  46 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
  47 // X64 PAE PDPTE does not have such restriction
  48 //
  49 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS    (IA32_PG_P)
  50
  51 #define PAGE_PROGATE_BITS           (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
  52
  53 #define PAGING_4K_MASK  0xFFF
  54 #define PAGING_2M_MASK  0x1FFFFF
  55 #define PAGING_1G_MASK  0x3FFFFFFF
  56
  57 #define PAGING_PAE_INDEX_MASK  0x1FF
  58
  59 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
  60 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
  61 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
  62
  63 typedef enum {
  64   PageNone,
  65   Page4K,
  66   Page2M,
  67   Page1G,
  68 } PAGE_ATTRIBUTE;
  69
  70 typedef struct {
  71   PAGE_ATTRIBUTE   Attribute;
  72   UINT64           Length;
  73   UINT64           AddressMask;
  74 } PAGE_ATTRIBUTE_TABLE;
  75
  76 typedef enum {
  77   PageActionAssign,
  78   PageActionSet,
  79   PageActionClear,
  80 } PAGE_ACTION;
  81
  82 PAGE_ATTRIBUTE_TABLE mPageAttributeTable[] = {
  83   {Page4K,  SIZE_4KB, PAGING_4K_ADDRESS_MASK_64},
  84   {Page2M,  SIZE_2MB, PAGING_2M_ADDRESS_MASK_64},
  85   {Page1G,  SIZE_1GB, PAGING_1G_ADDRESS_MASK_64},
  86 };
  87
  88 /**
  89   Enable write protection function for AP.
  90
  91   @param[in,out] Buffer  The pointer to private data buffer.
  92 **/
  93 VOID
  94 EFIAPI
  95 SyncCpuEnableWriteProtection (
  96   IN OUT VOID *Buffer
  97   )
  98 {
  99   AsmWriteCr0 (AsmReadCr0 () | BIT16);
 100 }
 101
 102 /**
 103   CpuFlushTlb function for AP.
 104
 105   @param[in,out] Buffer  The pointer to private data buffer.
 106 **/
 107 VOID
 108 EFIAPI
 109 SyncCpuFlushTlb (
 110   IN OUT VOID *Buffer
 111   )
 112 {
 113   CpuFlushTlb();
 114 }
 115
 116 /**
 117   Sync memory page attributes for AP.
 118
 119   @param[in] Procedure            A pointer to the function to be run on enabled APs of
 120                                   the system.
 121 **/
 122 VOID
 123 SyncMemoryPageAttributesAp (
 124   IN EFI_AP_PROCEDURE            Procedure
 125   )
 126 {
 127   EFI_STATUS                Status;
 128   EFI_MP_SERVICES_PROTOCOL  *MpService;
 129
 130   Status = gBS->LocateProtocol (
 131                   &gEfiMpServiceProtocolGuid,
 132                   NULL,
 133                   (VOID **)&MpService
 134                   );
 135   //
 136   // Synchronize the update with all APs
 137   //
 138   if (!EFI_ERROR (Status)) {
 139     Status = MpService->StartupAllAPs (
 140                           MpService,          // This
 141                           Procedure,          // Procedure
 142                           FALSE,              // SingleThread
 143                           NULL,               // WaitEvent
 144                           0,                  // TimeoutInMicrosecsond
 145                           NULL,               // ProcedureArgument
 146                           NULL                // FailedCpuList
 147                           );
 148     ASSERT (Status == EFI_SUCCESS || Status == EFI_NOT_STARTED || Status == EFI_NOT_READY);
 149   }
 150 }
 151
 152 /**
 153   Return current paging context.
 154
 155   @param[in,out]  PagingContext     The paging context.
 156 **/
 157 VOID
 158 GetCurrentPagingContext (
 159   IN OUT PAGE_TABLE_LIB_PAGING_CONTEXT     *PagingContext
 160   )
 161 {
 162   UINT32                         RegEax;
 163   UINT32                         RegEdx;
 164
 165   ZeroMem(PagingContext, sizeof(*PagingContext));
 166   if (sizeof(UINTN) == sizeof(UINT64)) {
 167     PagingContext->MachineType = IMAGE_FILE_MACHINE_X64;
 168   } else {
 169     PagingContext->MachineType = IMAGE_FILE_MACHINE_I386;
 170   }
 171   if ((AsmReadCr0 () & BIT31) != 0) {
 172     PagingContext->ContextData.X64.PageTableBase = (AsmReadCr3 () & PAGING_4K_ADDRESS_MASK_64);
 173     if ((AsmReadCr0 () & BIT16) == 0) {
 174       AsmWriteCr0 (AsmReadCr0 () | BIT16);
 175       SyncMemoryPageAttributesAp (SyncCpuEnableWriteProtection);
 176     }
 177   } else {
 178     PagingContext->ContextData.X64.PageTableBase = 0;
 179   }
 180
 181   if ((AsmReadCr4 () & BIT4) != 0) {
 182     PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PSE;
 183   }
 184   if ((AsmReadCr4 () & BIT5) != 0) {
 185     PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE;
 186   }
 187   if ((AsmReadCr0 () & BIT16) != 0) {
 188     PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_WP_ENABLE;
 189   }
 190
 191   AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
 192   if (RegEax > 0x80000000) {
 193     AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
 194     if ((RegEdx & BIT20) != 0) {
 195       // XD supported
 196       if ((AsmReadMsr64 (0xC0000080) & BIT11) != 0) {
 197         // XD activated
 198         PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;
 199       }
 200     }
 201     if ((RegEdx & BIT26) != 0) {
 202       PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAGE_1G_SUPPORT;
 203     }
 204   }
 205 }
 206
 207 /**
 208   Return length according to page attributes.
 209
 210   @param[in]  PageAttributes   The page attribute of the page entry.
 211
 212   @return The length of page entry.
 213 **/
 214 UINTN
 215 PageAttributeToLength (
 216   IN PAGE_ATTRIBUTE  PageAttribute
 217   )
 218 {
 219   UINTN  Index;
 220   for (Index = 0; Index < sizeof(mPageAttributeTable)/sizeof(mPageAttributeTable[0]); Index++) {
 221     if (PageAttribute == mPageAttributeTable[Index].Attribute) {
 222       return (UINTN)mPageAttributeTable[Index].Length;
 223     }
 224   }
 225   return 0;
 226 }
 227
 228 /**
 229   Return address mask according to page attributes.
 230
 231   @param[in]  PageAttributes   The page attribute of the page entry.
 232
 233   @return The address mask of page entry.
 234 **/
 235 UINTN
 236 PageAttributeToMask (
 237   IN PAGE_ATTRIBUTE  PageAttribute
 238   )
 239 {
 240   UINTN  Index;
 241   for (Index = 0; Index < sizeof(mPageAttributeTable)/sizeof(mPageAttributeTable[0]); Index++) {
 242     if (PageAttribute == mPageAttributeTable[Index].Attribute) {
 243       return (UINTN)mPageAttributeTable[Index].AddressMask;
 244     }
 245   }
 246   return 0;
 247 }
 248
 249 /**
 250   Return page table entry to match the address.
 251
 252   @param[in]  PagingContext     The paging context.
 253   @param[in]  Address           The address to be checked.
 254   @param[out] PageAttributes    The page attribute of the page entry.
 255
 256   @return The page entry.
 257 **/
 258 VOID *
 259 GetPageTableEntry (
 260   IN  PAGE_TABLE_LIB_PAGING_CONTEXT     *PagingContext,
 261   IN  PHYSICAL_ADDRESS                  Address,
 262   OUT PAGE_ATTRIBUTE                    *PageAttribute
 263   )
 264 {
 265   UINTN                 Index1;
 266   UINTN                 Index2;
 267   UINTN                 Index3;
 268   UINTN                 Index4;
 269   UINT64                *L1PageTable;
 270   UINT64                *L2PageTable;
 271   UINT64                *L3PageTable;
 272   UINT64                *L4PageTable;
 273   UINT64                AddressEncMask;
 274
 275   ASSERT (PagingContext != NULL);
 276
 277   Index4 = ((UINTN)RShiftU64 (Address, 39)) & PAGING_PAE_INDEX_MASK;
 278   Index3 = ((UINTN)Address >> 30) & PAGING_PAE_INDEX_MASK;
 279   Index2 = ((UINTN)Address >> 21) & PAGING_PAE_INDEX_MASK;
 280   Index1 = ((UINTN)Address >> 12) & PAGING_PAE_INDEX_MASK;
 281
 282   // Make sure AddressEncMask is contained to smallest supported address field.
 283   //
 284   AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;
 285
 286   if (PagingContext->MachineType == IMAGE_FILE_MACHINE_X64) {
 287     L4PageTable = (UINT64 *)(UINTN)PagingContext->ContextData.X64.PageTableBase;
 288     if (L4PageTable[Index4] == 0) {
 289       *PageAttribute = PageNone;
 290       return NULL;
 291     }
 292
 293     L3PageTable = (UINT64 *)(UINTN)(L4PageTable[Index4] & ~AddressEncMask & PAGING_4K_ADDRESS_MASK_64);
 294   } else {
 295     ASSERT((PagingContext->ContextData.Ia32.Attributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE) != 0);
 296     L3PageTable = (UINT64 *)(UINTN)PagingContext->ContextData.Ia32.PageTableBase;
 297   }
 298   if (L3PageTable[Index3] == 0) {
 299     *PageAttribute = PageNone;
 300     return NULL;
 301   }
 302   if ((L3PageTable[Index3] & IA32_PG_PS) != 0) {
 303     // 1G
 304     *PageAttribute = Page1G;
 305     return &L3PageTable[Index3];
 306   }
 307
 308   L2PageTable = (UINT64 *)(UINTN)(L3PageTable[Index3] & ~AddressEncMask & PAGING_4K_ADDRESS_MASK_64);
 309   if (L2PageTable[Index2] == 0) {
 310     *PageAttribute = PageNone;
 311     return NULL;
 312   }
 313   if ((L2PageTable[Index2] & IA32_PG_PS) != 0) {
 314     // 2M
 315     *PageAttribute = Page2M;
 316     return &L2PageTable[Index2];
 317   }
 318
 319   // 4k
 320   L1PageTable = (UINT64 *)(UINTN)(L2PageTable[Index2] & ~AddressEncMask & PAGING_4K_ADDRESS_MASK_64);
 321   if ((L1PageTable[Index1] == 0) && (Address != 0)) {
 322     *PageAttribute = PageNone;
 323     return NULL;
 324   }
 325   *PageAttribute = Page4K;
 326   return &L1PageTable[Index1];
 327 }
 328
 329 /**
 330   Return memory attributes of page entry.
 331
 332   @param[in]  PageEntry        The page entry.
 333
 334   @return Memory attributes of page entry.
 335 **/
 336 UINT64
 337 GetAttributesFromPageEntry (
 338   IN  UINT64                            *PageEntry
 339   )
 340 {
 341   UINT64  Attributes;
 342   Attributes = 0;
 343   if ((*PageEntry & IA32_PG_P) == 0) {
 344     Attributes |= EFI_MEMORY_RP;
 345   }
 346   if ((*PageEntry & IA32_PG_RW) == 0) {
 347     Attributes |= EFI_MEMORY_RO;
 348   }
 349   if ((*PageEntry & IA32_PG_NX) != 0) {
 350     Attributes |= EFI_MEMORY_XP;
 351   }
 352   return Attributes;
 353 }
 354
 355 /**
 356   Modify memory attributes of page entry.
 357
 358   @param[in]  PagingContext    The paging context.
 359   @param[in]  PageEntry        The page entry.
 360   @param[in]  Attributes       The bit mask of attributes to modify for the memory region.
 361   @param[in]  PageAction       The page action.
 362   @param[out] IsModified       TRUE means page table modified. FALSE means page table not modified.
 363 **/
 364 VOID
 365 ConvertPageEntryAttribute (
 366   IN  PAGE_TABLE_LIB_PAGING_CONTEXT     *PagingContext,
 367   IN  UINT64                            *PageEntry,
 368   IN  UINT64                            Attributes,
 369   IN  PAGE_ACTION                       PageAction,
 370   OUT BOOLEAN                           *IsModified
 371   )
 372 {
 373   UINT64  CurrentPageEntry;
 374   UINT64  NewPageEntry;
 375
 376   CurrentPageEntry = *PageEntry;
 377   NewPageEntry = CurrentPageEntry;
 378   if ((Attributes & EFI_MEMORY_RP) != 0) {
 379     switch (PageAction) {
 380     case PageActionAssign:
 381     case PageActionSet:
 382       NewPageEntry &= ~(UINT64)IA32_PG_P;
 383       break;
 384     case PageActionClear:
 385       NewPageEntry |= IA32_PG_P;
 386       break;
 387     }
 388   } else {
 389     switch (PageAction) {
 390     case PageActionAssign:
 391       NewPageEntry |= IA32_PG_P;
 392       break;
 393     case PageActionSet:
 394     case PageActionClear:
 395       break;
 396     }
 397   }
 398   if ((Attributes & EFI_MEMORY_RO) != 0) {
 399     switch (PageAction) {
 400     case PageActionAssign:
 401     case PageActionSet:
 402       NewPageEntry &= ~(UINT64)IA32_PG_RW;
 403       break;
 404     case PageActionClear:
 405       NewPageEntry |= IA32_PG_RW;
 406       break;
 407     }
 408   } else {
 409     switch (PageAction) {
 410     case PageActionAssign:
 411       NewPageEntry |= IA32_PG_RW;
 412       break;
 413     case PageActionSet:
 414     case PageActionClear:
 415       break;
 416     }
 417   }
 418   if ((PagingContext->ContextData.Ia32.Attributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED) != 0) {
 419     if ((Attributes & EFI_MEMORY_XP) != 0) {
 420       switch (PageAction) {
 421       case PageActionAssign:
 422       case PageActionSet:
 423         NewPageEntry |= IA32_PG_NX;
 424         break;
 425       case PageActionClear:
 426         NewPageEntry &= ~IA32_PG_NX;
 427         break;
 428       }
 429     } else {
 430       switch (PageAction) {
 431       case PageActionAssign:
 432         NewPageEntry &= ~IA32_PG_NX;
 433         break;
 434       case PageActionSet:
 435       case PageActionClear:
 436         break;
 437       }
 438     }
 439   }
 440   *PageEntry = NewPageEntry;
 441   if (CurrentPageEntry != NewPageEntry) {
 442     *IsModified = TRUE;
 443     DEBUG ((DEBUG_INFO, "ConvertPageEntryAttribute 0x%lx", CurrentPageEntry));
 444     DEBUG ((DEBUG_INFO, "->0x%lx\n", NewPageEntry));
 445   } else {
 446     *IsModified = FALSE;
 447   }
 448 }
 449
 450 /**
 451   This function returns if there is need to split page entry.
 452
 453   @param[in]  BaseAddress      The base address to be checked.
 454   @param[in]  Length           The length to be checked.
 455   @param[in]  PageEntry        The page entry to be checked.
 456   @param[in]  PageAttribute    The page attribute of the page entry.
 457
 458   @retval SplitAttributes on if there is need to split page entry.
 459 **/
 460 PAGE_ATTRIBUTE
 461 NeedSplitPage (
 462   IN  PHYSICAL_ADDRESS                  BaseAddress,
 463   IN  UINT64                            Length,
 464   IN  UINT64                            *PageEntry,
 465   IN  PAGE_ATTRIBUTE                    PageAttribute
 466   )
 467 {
 468   UINT64                PageEntryLength;
 469
 470   PageEntryLength = PageAttributeToLength (PageAttribute);
 471
 472   if (((BaseAddress & (PageEntryLength - 1)) == 0) && (Length >= PageEntryLength)) {
 473     return PageNone;
 474   }
 475
 476   if (((BaseAddress & PAGING_2M_MASK) != 0) || (Length < SIZE_2MB)) {
 477     return Page4K;
 478   }
 479
 480   return Page2M;
 481 }
 482
 483 /**
 484   This function splits one page entry to small page entries.
 485
 486   @param[in]  PageEntry         The page entry to be splitted.
 487   @param[in]  PageAttribute     The page attribute of the page entry.
 488   @param[in]  SplitAttribute    How to split the page entry.
 489   @param[in]  AllocatePagesFunc If page split is needed, this function is used to allocate more pages.
 490
 491   @retval RETURN_SUCCESS            The page entry is splitted.
 492   @retval RETURN_UNSUPPORTED        The page entry does not support to be splitted.
 493   @retval RETURN_OUT_OF_RESOURCES   No resource to split page entry.
 494 **/
 495 RETURN_STATUS
 496 SplitPage (
 497   IN  UINT64                            *PageEntry,
 498   IN  PAGE_ATTRIBUTE                    PageAttribute,
 499   IN  PAGE_ATTRIBUTE                    SplitAttribute,
 500   IN  PAGE_TABLE_LIB_ALLOCATE_PAGES     AllocatePagesFunc
 501   )
 502 {
 503   UINT64   BaseAddress;
 504   UINT64   *NewPageEntry;
 505   UINTN    Index;
 506   UINT64   AddressEncMask;
 507
 508   ASSERT (PageAttribute == Page2M || PageAttribute == Page1G);
 509
 510   ASSERT (AllocatePagesFunc != NULL);
 511
 512   // Make sure AddressEncMask is contained to smallest supported address field.
 513   //
 514   AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;
 515
 516   if (PageAttribute == Page2M) {
 517     //
 518     // Split 2M to 4K
 519     //
 520     ASSERT (SplitAttribute == Page4K);
 521     if (SplitAttribute == Page4K) {
 522       NewPageEntry = AllocatePagesFunc (1);
 523       DEBUG ((DEBUG_INFO, "Split - 0x%x\n", NewPageEntry));
 524       if (NewPageEntry == NULL) {
 525         return RETURN_OUT_OF_RESOURCES;
 526       }
 527       BaseAddress = *PageEntry & ~AddressEncMask & PAGING_2M_ADDRESS_MASK_64;
 528       for (Index = 0; Index < SIZE_4KB / sizeof(UINT64); Index++) {
 529         NewPageEntry[Index] = (BaseAddress + SIZE_4KB * Index) | AddressEncMask | ((*PageEntry) & PAGE_PROGATE_BITS);
 530       }
 531       (*PageEntry) = (UINT64)(UINTN)NewPageEntry | AddressEncMask | ((*PageEntry) & PAGE_PROGATE_BITS);
 532       return RETURN_SUCCESS;
 533     } else {
 534       return RETURN_UNSUPPORTED;
 535     }
 536   } else if (PageAttribute == Page1G) {
 537     //
 538     // Split 1G to 2M
 539     // No need support 1G->4K directly, we should use 1G->2M, then 2M->4K to get more compact page table.
 540     //
 541     ASSERT (SplitAttribute == Page2M || SplitAttribute == Page4K);
 542     if ((SplitAttribute == Page2M || SplitAttribute == Page4K)) {
 543       NewPageEntry = AllocatePagesFunc (1);
 544       DEBUG ((DEBUG_INFO, "Split - 0x%x\n", NewPageEntry));
 545       if (NewPageEntry == NULL) {
 546         return RETURN_OUT_OF_RESOURCES;
 547       }
 548       BaseAddress = *PageEntry & ~AddressEncMask  & PAGING_1G_ADDRESS_MASK_64;
 549       for (Index = 0; Index < SIZE_4KB / sizeof(UINT64); Index++) {
 550         NewPageEntry[Index] = (BaseAddress + SIZE_2MB * Index) | AddressEncMask | IA32_PG_PS | ((*PageEntry) & PAGE_PROGATE_BITS);
 551       }
 552       (*PageEntry) = (UINT64)(UINTN)NewPageEntry | AddressEncMask | ((*PageEntry) & PAGE_PROGATE_BITS);
 553       return RETURN_SUCCESS;
 554     } else {
 555       return RETURN_UNSUPPORTED;
 556     }
 557   } else {
 558     return RETURN_UNSUPPORTED;
 559   }
 560 }
 561
 562 /**
 563   This function modifies the page attributes for the memory region specified by BaseAddress and
 564   Length from their current attributes to the attributes specified by Attributes.
 565
 566   Caller should make sure BaseAddress and Length is at page boundary.
 567
 568   @param[in]  PagingContext     The paging context. NULL means get page table from current CPU context.
 569   @param[in]  BaseAddress       The physical address that is the start address of a memory region.
 570   @param[in]  Length            The size in bytes of the memory region.
 571   @param[in]  Attributes        The bit mask of attributes to modify for the memory region.
 572   @param[in]  PageAction        The page action.
 573   @param[in]  AllocatePagesFunc If page split is needed, this function is used to allocate more pages.
 574                                 NULL mean page split is unsupported.
 575   @param[out] IsSplitted        TRUE means page table splitted. FALSE means page table not splitted.
 576   @param[out] IsModified        TRUE means page table modified. FALSE means page table not modified.
 577
 578   @retval RETURN_SUCCESS           The attributes were modified for the memory region.
 579   @retval RETURN_ACCESS_DENIED     The attributes for the memory resource range specified by
 580                                    BaseAddress and Length cannot be modified.
 581   @retval RETURN_INVALID_PARAMETER Length is zero.
 582                                    Attributes specified an illegal combination of attributes that
 583                                    cannot be set together.
 584   @retval RETURN_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 585                                    the memory resource range.
 586   @retval RETURN_UNSUPPORTED       The processor does not support one or more bytes of the memory
 587                                    resource range specified by BaseAddress and Length.
 588                                    The bit mask of attributes is not support for the memory resource
 589                                    range specified by BaseAddress and Length.
 590 **/
 591 RETURN_STATUS
 592 ConvertMemoryPageAttributes (
 593   IN  PAGE_TABLE_LIB_PAGING_CONTEXT     *PagingContext OPTIONAL,
 594   IN  PHYSICAL_ADDRESS                  BaseAddress,
 595   IN  UINT64                            Length,
 596   IN  UINT64                            Attributes,
 597   IN  PAGE_ACTION                       PageAction,
 598   IN  PAGE_TABLE_LIB_ALLOCATE_PAGES     AllocatePagesFunc OPTIONAL,
 599   OUT BOOLEAN                           *IsSplitted,  OPTIONAL
 600   OUT BOOLEAN                           *IsModified   OPTIONAL
 601   )
 602 {
 603   PAGE_TABLE_LIB_PAGING_CONTEXT     CurrentPagingContext;
 604   UINT64                            *PageEntry;
 605   PAGE_ATTRIBUTE                    PageAttribute;
 606   UINTN                             PageEntryLength;
 607   PAGE_ATTRIBUTE                    SplitAttribute;
 608   RETURN_STATUS                     Status;
 609   BOOLEAN                           IsEntryModified;
 610
 611   if ((BaseAddress & (SIZE_4KB - 1)) != 0) {
 612     DEBUG ((DEBUG_ERROR, "BaseAddress(0x%lx) is not aligned!\n", BaseAddress));
 613     return EFI_UNSUPPORTED;
 614   }
 615   if ((Length & (SIZE_4KB - 1)) != 0) {
 616     DEBUG ((DEBUG_ERROR, "Length(0x%lx) is not aligned!\n", Length));
 617     return EFI_UNSUPPORTED;
 618   }
 619   if (Length == 0) {
 620     DEBUG ((DEBUG_ERROR, "Length is 0!\n"));
 621     return RETURN_INVALID_PARAMETER;
 622   }
 623
 624   if ((Attributes & ~(EFI_MEMORY_RP | EFI_MEMORY_RO | EFI_MEMORY_XP)) != 0) {
 625     DEBUG ((DEBUG_ERROR, "Attributes(0x%lx) has unsupported bit\n", Attributes));
 626     return EFI_UNSUPPORTED;
 627   }
 628
 629   if (PagingContext == NULL) {
 630     GetCurrentPagingContext (&CurrentPagingContext);
 631   } else {
 632     CopyMem (&CurrentPagingContext, PagingContext, sizeof(CurrentPagingContext));
 633   }
 634   switch(CurrentPagingContext.MachineType) {
 635   case IMAGE_FILE_MACHINE_I386:
 636     if (CurrentPagingContext.ContextData.Ia32.PageTableBase == 0) {
 637       DEBUG ((DEBUG_ERROR, "PageTable is 0!\n"));
 638       if (Attributes == 0) {
 639         return EFI_SUCCESS;
 640       } else {
 641         return EFI_UNSUPPORTED;
 642       }
 643     }
 644     if ((CurrentPagingContext.ContextData.Ia32.Attributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE) == 0) {
 645       DEBUG ((DEBUG_ERROR, "Non-PAE Paging!\n"));
 646       return EFI_UNSUPPORTED;
 647     }
 648     break;
 649   case IMAGE_FILE_MACHINE_X64:
 650     ASSERT (CurrentPagingContext.ContextData.X64.PageTableBase != 0);
 651     break;
 652   default:
 653     ASSERT(FALSE);
 654     return EFI_UNSUPPORTED;
 655     break;
 656   }
 657
 658 //  DEBUG ((DEBUG_ERROR, "ConvertMemoryPageAttributes(%x) - %016lx, %016lx, %02lx\n", IsSet, BaseAddress, Length, Attributes));
 659
 660   if (IsSplitted != NULL) {
 661     *IsSplitted = FALSE;
 662   }
 663   if (IsModified != NULL) {
 664     *IsModified = FALSE;
 665   }
 666
 667   //
 668   // Below logic is to check 2M/4K page to make sure we donot waist memory.
 669   //
 670   while (Length != 0) {
 671     PageEntry = GetPageTableEntry (&CurrentPagingContext, BaseAddress, &PageAttribute);
 672     if (PageEntry == NULL) {
 673       return RETURN_UNSUPPORTED;
 674     }
 675     PageEntryLength = PageAttributeToLength (PageAttribute);
 676     SplitAttribute = NeedSplitPage (BaseAddress, Length, PageEntry, PageAttribute);
 677     if (SplitAttribute == PageNone) {
 678       ConvertPageEntryAttribute (&CurrentPagingContext, PageEntry, Attributes, PageAction, &IsEntryModified);
 679       if (IsEntryModified) {
 680         if (IsModified != NULL) {
 681           *IsModified = TRUE;
 682         }
 683       }
 684       //
 685       // Convert success, move to next
 686       //
 687       BaseAddress += PageEntryLength;
 688       Length -= PageEntryLength;
 689     } else {
 690       if (AllocatePagesFunc == NULL) {
 691         return RETURN_UNSUPPORTED;
 692       }
 693       Status = SplitPage (PageEntry, PageAttribute, SplitAttribute, AllocatePagesFunc);
 694       if (RETURN_ERROR (Status)) {
 695         return RETURN_UNSUPPORTED;
 696       }
 697       if (IsSplitted != NULL) {
 698         *IsSplitted = TRUE;
 699       }
 700       if (IsModified != NULL) {
 701         *IsModified = TRUE;
 702       }
 703       //
 704       // Just split current page
 705       // Convert success in next around
 706       //
 707     }
 708   }
 709
 710   return RETURN_SUCCESS;
 711 }
 712
 713 /**
 714   This function assigns the page attributes for the memory region specified by BaseAddress and
 715   Length from their current attributes to the attributes specified by Attributes.
 716
 717   Caller should make sure BaseAddress and Length is at page boundary.
 718
 719   Caller need guarentee the TPL <= TPL_NOTIFY, if there is split page request.
 720
 721   @param[in]  PagingContext     The paging context. NULL means get page table from current CPU context.
 722   @param[in]  BaseAddress       The physical address that is the start address of a memory region.
 723   @param[in]  Length            The size in bytes of the memory region.
 724   @param[in]  Attributes        The bit mask of attributes to set for the memory region.
 725   @param[in]  AllocatePagesFunc If page split is needed, this function is used to allocate more pages.
 726                                 NULL mean page split is unsupported.
 727
 728   @retval RETURN_SUCCESS           The attributes were cleared for the memory region.
 729   @retval RETURN_ACCESS_DENIED     The attributes for the memory resource range specified by
 730                                    BaseAddress and Length cannot be modified.
 731   @retval RETURN_INVALID_PARAMETER Length is zero.
 732                                    Attributes specified an illegal combination of attributes that
 733                                    cannot be set together.
 734   @retval RETURN_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 735                                    the memory resource range.
 736   @retval RETURN_UNSUPPORTED       The processor does not support one or more bytes of the memory
 737                                    resource range specified by BaseAddress and Length.
 738                                    The bit mask of attributes is not support for the memory resource
 739                                    range specified by BaseAddress and Length.
 740 **/
 741 RETURN_STATUS
 742 EFIAPI
 743 AssignMemoryPageAttributes (
 744   IN  PAGE_TABLE_LIB_PAGING_CONTEXT     *PagingContext OPTIONAL,
 745   IN  PHYSICAL_ADDRESS                  BaseAddress,
 746   IN  UINT64                            Length,
 747   IN  UINT64                            Attributes,
 748   IN  PAGE_TABLE_LIB_ALLOCATE_PAGES     AllocatePagesFunc OPTIONAL
 749   )
 750 {
 751   RETURN_STATUS  Status;
 752   BOOLEAN        IsModified;
 753   BOOLEAN        IsSplitted;
 754
 755 //  DEBUG((DEBUG_INFO, "AssignMemoryPageAttributes: 0x%lx - 0x%lx (0x%lx)\n", BaseAddress, Length, Attributes));
 756   Status = ConvertMemoryPageAttributes (PagingContext, BaseAddress, Length, Attributes, PageActionAssign, AllocatePagesFunc, &IsSplitted, &IsModified);
 757   if (!EFI_ERROR(Status)) {
 758     if ((PagingContext == NULL) && IsModified) {
 759       //
 760       // Flush TLB as last step
 761       //
 762       CpuFlushTlb();
 763       SyncMemoryPageAttributesAp (SyncCpuFlushTlb);
 764     }
 765   }
 766
 767   return Status;
 768 }
 769
 770 /**
 771   Initialize the Page Table lib.
 772 **/
 773 VOID
 774 InitializePageTableLib (
 775   VOID
 776   )
 777 {
 778   PAGE_TABLE_LIB_PAGING_CONTEXT     CurrentPagingContext;
 779
 780   GetCurrentPagingContext (&CurrentPagingContext);
 781   DEBUG ((DEBUG_INFO, "CurrentPagingContext:\n", CurrentPagingContext.MachineType));
 782   DEBUG ((DEBUG_INFO, "  MachineType   - 0x%x\n", CurrentPagingContext.MachineType));
 783   DEBUG ((DEBUG_INFO, "  PageTableBase - 0x%x\n", CurrentPagingContext.ContextData.X64.PageTableBase));
 784   DEBUG ((DEBUG_INFO, "  Attributes    - 0x%x\n", CurrentPagingContext.ContextData.X64.Attributes));
 785
 786   return ;
 787 }
 788