UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.h

   1 /** @file
   2   Internal include file for the CPU I/O 2 Protocol.
   3
   4 Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
   5 SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7 **/
   8
   9 #ifndef _CPU_IO2_DXE_H_
  10 #define _CPU_IO2_DXE_H_
  11
  12 #include <PiDxe.h>
  13
  14 #include <Protocol/CpuIo2.h>
  15
  16 #include <Library/BaseLib.h>
  17 #include <Library/DebugLib.h>
  18 #include <Library/IoLib.h>
  19 #include <Library/UefiBootServicesTableLib.h>
  20
  21 #define MAX_IO_PORT_ADDRESS   0xFFFF
  22
  23 /**
  24   Reads memory-mapped registers.
  25
  26   The I/O operations are carried out exactly as requested. The caller is responsible
  27   for satisfying any alignment and I/O width restrictions that a PI System on a
  28   platform might require. For example on some platforms, width requests of
  29   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
  30   be handled by the driver.
  31
  32   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
  33   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
  34   each of the Count operations that is performed.
  35
  36   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
  37   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
  38   incremented for each of the Count operations that is performed. The read or
  39   write operation is performed Count times on the same Address.
  40
  41   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
  42   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
  43   incremented for each of the Count operations that is performed. The read or
  44   write operation is performed Count times from the first element of Buffer.
  45
  46   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
  47   @param[in]  Width    Signifies the width of the I/O or Memory operation.
  48   @param[in]  Address  The base address of the I/O operation.
  49   @param[in]  Count    The number of I/O operations to perform. The number of
  50                        bytes moved is Width size * Count, starting at Address.
  51   @param[out] Buffer   For read operations, the destination buffer to store the results.
  52                        For write operations, the source buffer from which to write data.
  53
  54   @retval EFI_SUCCESS            The data was read from or written to the PI system.
  55   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
  56   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
  57   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
  58   @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
  59                                  and Count is not valid for this PI system.
  60
  61 **/
  62 EFI_STATUS
  63 EFIAPI
  64 CpuMemoryServiceRead (
  65   IN  EFI_CPU_IO2_PROTOCOL       *This,
  66   IN  EFI_CPU_IO_PROTOCOL_WIDTH  Width,
  67   IN  UINT64                     Address,
  68   IN  UINTN                      Count,
  69   OUT VOID                       *Buffer
  70   );
  71
  72 /**
  73   Writes memory-mapped registers.
  74
  75   The I/O operations are carried out exactly as requested. The caller is responsible
  76   for satisfying any alignment and I/O width restrictions that a PI System on a
  77   platform might require. For example on some platforms, width requests of
  78   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
  79   be handled by the driver.
  80
  81   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
  82   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
  83   each of the Count operations that is performed.
  84
  85   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
  86   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
  87   incremented for each of the Count operations that is performed. The read or
  88   write operation is performed Count times on the same Address.
  89
  90   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
  91   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
  92   incremented for each of the Count operations that is performed. The read or
  93   write operation is performed Count times from the first element of Buffer.
  94
  95   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
  96   @param[in]  Width    Signifies the width of the I/O or Memory operation.
  97   @param[in]  Address  The base address of the I/O operation.
  98   @param[in]  Count    The number of I/O operations to perform. The number of
  99                        bytes moved is Width size * Count, starting at Address.
 100   @param[in]  Buffer   For read operations, the destination buffer to store the results.
 101                        For write operations, the source buffer from which to write data.
 102
 103   @retval EFI_SUCCESS            The data was read from or written to the PI system.
 104   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
 105   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 106   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
 107   @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
 108                                  and Count is not valid for this PI system.
 109
 110 **/
 111 EFI_STATUS
 112 EFIAPI
 113 CpuMemoryServiceWrite (
 114   IN EFI_CPU_IO2_PROTOCOL       *This,
 115   IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
 116   IN UINT64                     Address,
 117   IN UINTN                      Count,
 118   IN VOID                       *Buffer
 119   );
 120
 121 /**
 122   Reads I/O registers.
 123
 124   The I/O operations are carried out exactly as requested. The caller is responsible
 125   for satisfying any alignment and I/O width restrictions that a PI System on a
 126   platform might require. For example on some platforms, width requests of
 127   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
 128   be handled by the driver.
 129
 130   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
 131   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
 132   each of the Count operations that is performed.
 133
 134   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
 135   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
 136   incremented for each of the Count operations that is performed. The read or
 137   write operation is performed Count times on the same Address.
 138
 139   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
 140   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
 141   incremented for each of the Count operations that is performed. The read or
 142   write operation is performed Count times from the first element of Buffer.
 143
 144   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
 145   @param[in]  Width    Signifies the width of the I/O or Memory operation.
 146   @param[in]  Address  The base address of the I/O operation.
 147   @param[in]  Count    The number of I/O operations to perform. The number of
 148                        bytes moved is Width size * Count, starting at Address.
 149   @param[out] Buffer   For read operations, the destination buffer to store the results.
 150                        For write operations, the source buffer from which to write data.
 151
 152   @retval EFI_SUCCESS            The data was read from or written to the PI system.
 153   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
 154   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 155   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
 156   @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
 157                                  and Count is not valid for this PI system.
 158
 159 **/
 160 EFI_STATUS
 161 EFIAPI
 162 CpuIoServiceRead (
 163   IN  EFI_CPU_IO2_PROTOCOL       *This,
 164   IN  EFI_CPU_IO_PROTOCOL_WIDTH  Width,
 165   IN  UINT64                     Address,
 166   IN  UINTN                      Count,
 167   OUT VOID                       *Buffer
 168   );
 169
 170 /**
 171   Write I/O registers.
 172
 173   The I/O operations are carried out exactly as requested. The caller is responsible
 174   for satisfying any alignment and I/O width restrictions that a PI System on a
 175   platform might require. For example on some platforms, width requests of
 176   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
 177   be handled by the driver.
 178
 179   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
 180   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
 181   each of the Count operations that is performed.
 182
 183   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
 184   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
 185   incremented for each of the Count operations that is performed. The read or
 186   write operation is performed Count times on the same Address.
 187
 188   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
 189   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
 190   incremented for each of the Count operations that is performed. The read or
 191   write operation is performed Count times from the first element of Buffer.
 192
 193   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
 194   @param[in]  Width    Signifies the width of the I/O or Memory operation.
 195   @param[in]  Address  The base address of the I/O operation.
 196   @param[in]  Count    The number of I/O operations to perform. The number of
 197                        bytes moved is Width size * Count, starting at Address.
 198   @param[in]  Buffer   For read operations, the destination buffer to store the results.
 199                        For write operations, the source buffer from which to write data.
 200
 201   @retval EFI_SUCCESS            The data was read from or written to the PI system.
 202   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
 203   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 204   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
 205   @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
 206                                  and Count is not valid for this PI system.
 207
 208 **/
 209 EFI_STATUS
 210 EFIAPI
 211 CpuIoServiceWrite (
 212   IN EFI_CPU_IO2_PROTOCOL       *This,
 213   IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
 214   IN UINT64                     Address,
 215   IN UINTN                      Count,
 216   IN VOID                       *Buffer
 217   );
 218
 219 #endif