UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.h

   1 /** @file
   2   Internal include file for the CPU I/O 2 Protocol.
   3
   4 Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
   5 This program and the accompanying materials
   6 are licensed and made available under the terms and conditions of the BSD License
   7 which accompanies this distribution.  The full text of the license may be found at
   8 http://opensource.org/licenses/bsd-license.php
   9
  10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef _CPU_IO2_DXE_H_
  16 #define _CPU_IO2_DXE_H_
  17
  18 #include <PiDxe.h>
  19
  20 #include <Protocol/CpuIo2.h>
  21
  22 #include <Library/BaseLib.h>
  23 #include <Library/DebugLib.h>
  24 #include <Library/IoLib.h>
  25 #include <Library/UefiBootServicesTableLib.h>
  26
  27 #define MAX_IO_PORT_ADDRESS   0xFFFF
  28
  29 /**
  30   Reads memory-mapped registers.
  31
  32   The I/O operations are carried out exactly as requested. The caller is responsible
  33   for satisfying any alignment and I/O width restrictions that a PI System on a
  34   platform might require. For example on some platforms, width requests of
  35   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
  36   be handled by the driver.
  37
  38   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
  39   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
  40   each of the Count operations that is performed.
  41
  42   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
  43   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
  44   incremented for each of the Count operations that is performed. The read or
  45   write operation is performed Count times on the same Address.
  46
  47   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
  48   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
  49   incremented for each of the Count operations that is performed. The read or
  50   write operation is performed Count times from the first element of Buffer.
  51
  52   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
  53   @param[in]  Width    Signifies the width of the I/O or Memory operation.
  54   @param[in]  Address  The base address of the I/O operation.
  55   @param[in]  Count    The number of I/O operations to perform. The number of
  56                        bytes moved is Width size * Count, starting at Address.
  57   @param[out] Buffer   For read operations, the destination buffer to store the results.
  58                        For write operations, the source buffer from which to write data.
  59
  60   @retval EFI_SUCCESS            The data was read from or written to the PI system.
  61   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
  62   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
  63   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
  64   @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
  65                                  and Count is not valid for this PI system.
  66
  67 **/
  68 EFI_STATUS
  69 EFIAPI
  70 CpuMemoryServiceRead (
  71   IN  EFI_CPU_IO2_PROTOCOL       *This,
  72   IN  EFI_CPU_IO_PROTOCOL_WIDTH  Width,
  73   IN  UINT64                     Address,
  74   IN  UINTN                      Count,
  75   OUT VOID                       *Buffer
  76   );
  77
  78 /**
  79   Writes memory-mapped registers.
  80
  81   The I/O operations are carried out exactly as requested. The caller is responsible
  82   for satisfying any alignment and I/O width restrictions that a PI System on a
  83   platform might require. For example on some platforms, width requests of
  84   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
  85   be handled by the driver.
  86
  87   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
  88   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
  89   each of the Count operations that is performed.
  90
  91   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
  92   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
  93   incremented for each of the Count operations that is performed. The read or
  94   write operation is performed Count times on the same Address.
  95
  96   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
  97   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
  98   incremented for each of the Count operations that is performed. The read or
  99   write operation is performed Count times from the first element of Buffer.
 100
 101   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
 102   @param[in]  Width    Signifies the width of the I/O or Memory operation.
 103   @param[in]  Address  The base address of the I/O operation.
 104   @param[in]  Count    The number of I/O operations to perform. The number of
 105                        bytes moved is Width size * Count, starting at Address.
 106   @param[in]  Buffer   For read operations, the destination buffer to store the results.
 107                        For write operations, the source buffer from which to write data.
 108
 109   @retval EFI_SUCCESS            The data was read from or written to the PI system.
 110   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
 111   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 112   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
 113   @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
 114                                  and Count is not valid for this PI system.
 115
 116 **/
 117 EFI_STATUS
 118 EFIAPI
 119 CpuMemoryServiceWrite (
 120   IN EFI_CPU_IO2_PROTOCOL       *This,
 121   IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
 122   IN UINT64                     Address,
 123   IN UINTN                      Count,
 124   IN VOID                       *Buffer
 125   );
 126
 127 /**
 128   Reads I/O registers.
 129
 130   The I/O operations are carried out exactly as requested. The caller is responsible
 131   for satisfying any alignment and I/O width restrictions that a PI System on a
 132   platform might require. For example on some platforms, width requests of
 133   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
 134   be handled by the driver.
 135
 136   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
 137   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
 138   each of the Count operations that is performed.
 139
 140   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
 141   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
 142   incremented for each of the Count operations that is performed. The read or
 143   write operation is performed Count times on the same Address.
 144
 145   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
 146   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
 147   incremented for each of the Count operations that is performed. The read or
 148   write operation is performed Count times from the first element of Buffer.
 149
 150   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
 151   @param[in]  Width    Signifies the width of the I/O or Memory operation.
 152   @param[in]  Address  The base address of the I/O operation.
 153   @param[in]  Count    The number of I/O operations to perform. The number of
 154                        bytes moved is Width size * Count, starting at Address.
 155   @param[out] Buffer   For read operations, the destination buffer to store the results.
 156                        For write operations, the source buffer from which to write data.
 157
 158   @retval EFI_SUCCESS            The data was read from or written to the PI system.
 159   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
 160   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 161   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
 162   @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
 163                                  and Count is not valid for this PI system.
 164
 165 **/
 166 EFI_STATUS
 167 EFIAPI
 168 CpuIoServiceRead (
 169   IN  EFI_CPU_IO2_PROTOCOL       *This,
 170   IN  EFI_CPU_IO_PROTOCOL_WIDTH  Width,
 171   IN  UINT64                     Address,
 172   IN  UINTN                      Count,
 173   OUT VOID                       *Buffer
 174   );
 175
 176 /**
 177   Write I/O registers.
 178
 179   The I/O operations are carried out exactly as requested. The caller is responsible
 180   for satisfying any alignment and I/O width restrictions that a PI System on a
 181   platform might require. For example on some platforms, width requests of
 182   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
 183   be handled by the driver.
 184
 185   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
 186   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
 187   each of the Count operations that is performed.
 188
 189   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
 190   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
 191   incremented for each of the Count operations that is performed. The read or
 192   write operation is performed Count times on the same Address.
 193
 194   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
 195   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
 196   incremented for each of the Count operations that is performed. The read or
 197   write operation is performed Count times from the first element of Buffer.
 198
 199   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
 200   @param[in]  Width    Signifies the width of the I/O or Memory operation.
 201   @param[in]  Address  The base address of the I/O operation.
 202   @param[in]  Count    The number of I/O operations to perform. The number of
 203                        bytes moved is Width size * Count, starting at Address.
 204   @param[in]  Buffer   For read operations, the destination buffer to store the results.
 205                        For write operations, the source buffer from which to write data.
 206
 207   @retval EFI_SUCCESS            The data was read from or written to the PI system.
 208   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
 209   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 210   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
 211   @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
 212                                  and Count is not valid for this PI system.
 213
 214 **/
 215 EFI_STATUS
 216 EFIAPI
 217 CpuIoServiceWrite (
 218   IN EFI_CPU_IO2_PROTOCOL       *This,
 219   IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
 220   IN UINT64                     Address,
 221   IN UINTN                      Count,
 222   IN VOID                       *Buffer
 223   );
 224
 225 #endif