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1 /** @file
2 CPU PEI Module installs CPU Multiple Processor PPI.
3
4 Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "CpuMpPei.h"
16
17 //
18 // Global Descriptor Table (GDT)
19 //
20 GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {
21 /* selector { Global Segment Descriptor } */
22 /* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor
23 /* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor
24 /* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor
25 /* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
26 /* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor
27 /* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
28 /* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
29 /* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor
30 /* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
31 };
32
33 //
34 // IA32 Gdt register
35 //
36 GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR mGdt = {
37 sizeof (mGdtEntries) - 1,
38 (UINTN) mGdtEntries
39 };
40
41 GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList = {
42 (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
43 &gEfiEndOfPeiSignalPpiGuid,
44 CpuMpEndOfPeiCallback
45 };
46
47 /**
48 Sort the APIC ID of all processors.
49
50 This function sorts the APIC ID of all processors so that processor number is
51 assigned in the ascending order of APIC ID which eases MP debugging.
52
53 @param PeiCpuMpData Pointer to PEI CPU MP Data
54 **/
55 VOID
56 SortApicId (
57 IN PEI_CPU_MP_DATA *PeiCpuMpData
58 )
59 {
60 UINTN Index1;
61 UINTN Index2;
62 UINTN Index3;
63 UINT32 ApicId;
64 PEI_CPU_DATA CpuData;
65 UINT32 ApCount;
66
67 ApCount = PeiCpuMpData->CpuCount - 1;
68
69 if (ApCount != 0) {
70 for (Index1 = 0; Index1 < ApCount; Index1++) {
71 Index3 = Index1;
72 //
73 // Sort key is the hardware default APIC ID
74 //
75 ApicId = PeiCpuMpData->CpuData[Index1].ApicId;
76 for (Index2 = Index1 + 1; Index2 <= ApCount; Index2++) {
77 if (ApicId > PeiCpuMpData->CpuData[Index2].ApicId) {
78 Index3 = Index2;
79 ApicId = PeiCpuMpData->CpuData[Index2].ApicId;
80 }
81 }
82 if (Index3 != Index1) {
83 CopyMem (&CpuData, &PeiCpuMpData->CpuData[Index3], sizeof (PEI_CPU_DATA));
84 CopyMem (
85 &PeiCpuMpData->CpuData[Index3],
86 &PeiCpuMpData->CpuData[Index1],
87 sizeof (PEI_CPU_DATA)
88 );
89 CopyMem (&PeiCpuMpData->CpuData[Index1], &CpuData, sizeof (PEI_CPU_DATA));
90 }
91 }
92
93 //
94 // Get the processor number for the BSP
95 //
96 ApicId = GetInitialApicId ();
97 for (Index1 = 0; Index1 < PeiCpuMpData->CpuCount; Index1++) {
98 if (PeiCpuMpData->CpuData[Index1].ApicId == ApicId) {
99 PeiCpuMpData->BspNumber = (UINT32) Index1;
100 break;
101 }
102 }
103 }
104 }
105
106 /**
107 Enable x2APIC mode on APs.
108
109 @param Buffer Pointer to private data buffer.
110 **/
111 VOID
112 EFIAPI
113 ApFuncEnableX2Apic (
114 IN OUT VOID *Buffer
115 )
116 {
117 SetApicMode (LOCAL_APIC_MODE_X2APIC);
118 }
119
120 /**
121 Get AP loop mode.
122
123 @param MonitorFilterSize Returns the largest monitor-line size in bytes.
124
125 @return The AP loop mode.
126 **/
127 UINT8
128 GetApLoopMode (
129 OUT UINT16 *MonitorFilterSize
130 )
131 {
132 UINT8 ApLoopMode;
133 UINT32 RegEbx;
134 UINT32 RegEcx;
135 UINT32 RegEdx;
136
137 ASSERT (MonitorFilterSize != NULL);
138
139 ApLoopMode = PcdGet8 (PcdCpuApLoopMode);
140 ASSERT (ApLoopMode >= ApInHltLoop && ApLoopMode <= ApInRunLoop);
141 if (ApLoopMode == ApInMwaitLoop) {
142 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, &RegEcx, NULL);
143 if ((RegEcx & BIT3) == 0) {
144 //
145 // If processor does not support MONITOR/MWAIT feature
146 // by CPUID.[EAX=01H]:ECX.BIT3, force AP in Hlt-loop mode
147 //
148 ApLoopMode = ApInHltLoop;
149 }
150 }
151
152 if (ApLoopMode == ApInHltLoop) {
153 *MonitorFilterSize = 0;
154 } else if (ApLoopMode == ApInRunLoop) {
155 *MonitorFilterSize = sizeof (UINT32);
156 } else if (ApLoopMode == ApInMwaitLoop) {
157 //
158 // CPUID.[EAX=05H]:EBX.BIT0-15: Largest monitor-line size in bytes
159 // CPUID.[EAX=05H].EDX: C-states supported using MWAIT
160 //
161 AsmCpuid (CPUID_MONITOR_MWAIT, NULL, &RegEbx, NULL, &RegEdx);
162 *MonitorFilterSize = RegEbx & 0xFFFF;
163 }
164
165 return ApLoopMode;
166 }
167
168 /**
169 Get CPU MP Data pointer from the Guided HOB.
170
171 @return Pointer to Pointer to PEI CPU MP Data
172 **/
173 PEI_CPU_MP_DATA *
174 GetMpHobData (
175 VOID
176 )
177 {
178 EFI_HOB_GUID_TYPE *GuidHob;
179 VOID *DataInHob;
180 PEI_CPU_MP_DATA *CpuMpData;
181
182 CpuMpData = NULL;
183 GuidHob = GetFirstGuidHob (&gEfiCallerIdGuid);
184 if (GuidHob != NULL) {
185 DataInHob = GET_GUID_HOB_DATA (GuidHob);
186 CpuMpData = (PEI_CPU_MP_DATA *)(*(UINTN *)DataInHob);
187 }
188 ASSERT (CpuMpData != NULL);
189 return CpuMpData;
190 }
191
192 /**
193 Save the volatile registers required to be restored following INIT IPI.
194
195 @param VolatileRegisters Returns buffer saved the volatile resisters
196 **/
197 VOID
198 SaveVolatileRegisters (
199 OUT CPU_VOLATILE_REGISTERS *VolatileRegisters
200 )
201 {
202 UINT32 RegEdx;
203
204 VolatileRegisters->Cr0 = AsmReadCr0 ();
205 VolatileRegisters->Cr3 = AsmReadCr3 ();
206 VolatileRegisters->Cr4 = AsmReadCr4 ();
207
208 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx);
209 if ((RegEdx & BIT2) != 0) {
210 //
211 // If processor supports Debugging Extensions feature
212 // by CPUID.[EAX=01H]:EDX.BIT2
213 //
214 VolatileRegisters->Dr0 = AsmReadDr0 ();
215 VolatileRegisters->Dr1 = AsmReadDr1 ();
216 VolatileRegisters->Dr2 = AsmReadDr2 ();
217 VolatileRegisters->Dr3 = AsmReadDr3 ();
218 VolatileRegisters->Dr6 = AsmReadDr6 ();
219 VolatileRegisters->Dr7 = AsmReadDr7 ();
220 }
221 }
222
223 /**
224 Restore the volatile registers following INIT IPI.
225
226 @param VolatileRegisters Pointer to volatile resisters
227 @param IsRestoreDr TRUE: Restore DRx if supported
228 FALSE: Do not restore DRx
229 **/
230 VOID
231 RestoreVolatileRegisters (
232 IN CPU_VOLATILE_REGISTERS *VolatileRegisters,
233 IN BOOLEAN IsRestoreDr
234 )
235 {
236 UINT32 RegEdx;
237
238 AsmWriteCr0 (VolatileRegisters->Cr0);
239 AsmWriteCr3 (VolatileRegisters->Cr3);
240 AsmWriteCr4 (VolatileRegisters->Cr4);
241
242 if (IsRestoreDr) {
243 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx);
244 if ((RegEdx & BIT2) != 0) {
245 //
246 // If processor supports Debugging Extensions feature
247 // by CPUID.[EAX=01H]:EDX.BIT2
248 //
249 AsmWriteDr0 (VolatileRegisters->Dr0);
250 AsmWriteDr1 (VolatileRegisters->Dr1);
251 AsmWriteDr2 (VolatileRegisters->Dr2);
252 AsmWriteDr3 (VolatileRegisters->Dr3);
253 AsmWriteDr6 (VolatileRegisters->Dr6);
254 AsmWriteDr7 (VolatileRegisters->Dr7);
255 }
256 }
257 }
258
259 /**
260 This function will be called from AP reset code if BSP uses WakeUpAP.
261
262 @param ExchangeInfo Pointer to the MP exchange info buffer
263 @param NumApsExecuting Number of current executing AP
264 **/
265 VOID
266 EFIAPI
267 ApCFunction (
268 IN MP_CPU_EXCHANGE_INFO *ExchangeInfo,
269 IN UINTN NumApsExecuting
270 )
271 {
272 PEI_CPU_MP_DATA *PeiCpuMpData;
273 UINTN ProcessorNumber;
274 EFI_AP_PROCEDURE Procedure;
275 UINTN BistData;
276 volatile UINT32 *ApStartupSignalBuffer;
277
278 PeiCpuMpData = ExchangeInfo->PeiCpuMpData;
279 while (TRUE) {
280 if (PeiCpuMpData->InitFlag) {
281 ProcessorNumber = NumApsExecuting;
282 //
283 // Sync BSP's Control registers to APs
284 //
285 RestoreVolatileRegisters (&PeiCpuMpData->CpuData[0].VolatileRegisters, FALSE);
286 //
287 // This is first time AP wakeup, get BIST information from AP stack
288 //
289 BistData = *(UINTN *) (PeiCpuMpData->Buffer + ProcessorNumber * PeiCpuMpData->CpuApStackSize - sizeof (UINTN));
290 PeiCpuMpData->CpuData[ProcessorNumber].Health.Uint32 = (UINT32) BistData;
291 PeiCpuMpData->CpuData[ProcessorNumber].ApicId = GetInitialApicId ();
292 if (PeiCpuMpData->CpuData[ProcessorNumber].ApicId >= 0xFF) {
293 //
294 // Set x2APIC mode if there are any logical processor reporting
295 // an APIC ID of 255 or greater.
296 //
297 AcquireSpinLock(&PeiCpuMpData->MpLock);
298 PeiCpuMpData->X2ApicEnable = TRUE;
299 ReleaseSpinLock(&PeiCpuMpData->MpLock);
300 }
301 //
302 // Sync BSP's Mtrr table to all wakeup APs and load microcode on APs.
303 //
304 MtrrSetAllMtrrs (&PeiCpuMpData->MtrrTable);
305 MicrocodeDetect (PeiCpuMpData);
306 PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;
307 } else {
308 //
309 // Execute AP function if AP is not disabled
310 //
311 GetProcessorNumber (PeiCpuMpData, &ProcessorNumber);
312 if (PeiCpuMpData->ApLoopMode == ApInHltLoop) {
313 //
314 // Restore AP's volatile registers saved
315 //
316 RestoreVolatileRegisters (&PeiCpuMpData->CpuData[ProcessorNumber].VolatileRegisters, TRUE);
317 }
318
319 if ((PeiCpuMpData->CpuData[ProcessorNumber].State != CpuStateDisabled) &&
320 (PeiCpuMpData->ApFunction != 0)) {
321 PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateBusy;
322 Procedure = (EFI_AP_PROCEDURE)(UINTN)PeiCpuMpData->ApFunction;
323 //
324 // Invoke AP function here
325 //
326 Procedure ((VOID *)(UINTN)PeiCpuMpData->ApFunctionArgument);
327 //
328 // Re-get the processor number due to BSP/AP maybe exchange in AP function
329 //
330 GetProcessorNumber (PeiCpuMpData, &ProcessorNumber);
331 PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;
332 }
333 }
334
335 //
336 // AP finished executing C code
337 //
338 InterlockedIncrement ((UINT32 *)&PeiCpuMpData->FinishedCount);
339
340 //
341 // Place AP is specified loop mode
342 //
343 if (PeiCpuMpData->ApLoopMode == ApInHltLoop) {
344 //
345 // Save AP volatile registers
346 //
347 SaveVolatileRegisters (&PeiCpuMpData->CpuData[ProcessorNumber].VolatileRegisters);
348 //
349 // Place AP in Hlt-loop
350 //
351 while (TRUE) {
352 DisableInterrupts ();
353 CpuSleep ();
354 CpuPause ();
355 }
356 }
357 ApStartupSignalBuffer = PeiCpuMpData->CpuData[ProcessorNumber].StartupApSignal;
358 while (TRUE) {
359 DisableInterrupts ();
360 if (PeiCpuMpData->ApLoopMode == ApInMwaitLoop) {
361 //
362 // Place AP in Mwait-loop
363 //
364 AsmMonitor ((UINTN)ApStartupSignalBuffer, 0, 0);
365 if (*ApStartupSignalBuffer != WAKEUP_AP_SIGNAL) {
366 //
367 // If AP start-up signal is not set, place AP into
368 // the maximum C-state
369 //
370 AsmMwait (PeiCpuMpData->ApTargetCState << 4, 0);
371 }
372 } else if (PeiCpuMpData->ApLoopMode == ApInRunLoop) {
373 //
374 // Place AP in Run-loop
375 //
376 CpuPause ();
377 } else {
378 ASSERT (FALSE);
379 }
380
381 //
382 // If AP start-up signal is written, AP is waken up
383 // otherwise place AP in loop again
384 //
385 if (*ApStartupSignalBuffer == WAKEUP_AP_SIGNAL) {
386 //
387 // Clear AP start-up signal when AP waken up
388 //
389 InterlockedCompareExchange32 (
390 (UINT32 *)ApStartupSignalBuffer,
391 WAKEUP_AP_SIGNAL,
392 0
393 );
394 break;
395 }
396 }
397 }
398 }
399
400 /**
401 Write AP start-up signal to wakeup AP.
402
403 @param ApStartupSignalBuffer Pointer to AP wakeup signal
404 **/
405 VOID
406 WriteStartupSignal (
407 IN volatile UINT32 *ApStartupSignalBuffer
408 )
409 {
410 *ApStartupSignalBuffer = WAKEUP_AP_SIGNAL;
411 //
412 // If AP is waken up, StartupApSignal should be cleared.
413 // Otherwise, write StartupApSignal again till AP waken up.
414 //
415 while (InterlockedCompareExchange32 (
416 (UINT32 *)ApStartupSignalBuffer,
417 WAKEUP_AP_SIGNAL,
418 WAKEUP_AP_SIGNAL
419 ) != 0) {
420 CpuPause ();
421 }
422 }
423
424 /**
425 This function will be called by BSP to wakeup AP.
426
427 @param PeiCpuMpData Pointer to PEI CPU MP Data
428 @param Broadcast TRUE: Send broadcast IPI to all APs
429 FALSE: Send IPI to AP by ApicId
430 @param ProcessorNumber The handle number of specified processor
431 @param Procedure The function to be invoked by AP
432 @param ProcedureArgument The argument to be passed into AP function
433 **/
434 VOID
435 WakeUpAP (
436 IN PEI_CPU_MP_DATA *PeiCpuMpData,
437 IN BOOLEAN Broadcast,
438 IN UINTN ProcessorNumber,
439 IN EFI_AP_PROCEDURE Procedure, OPTIONAL
440 IN VOID *ProcedureArgument OPTIONAL
441 )
442 {
443 volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;
444 UINTN Index;
445
446 PeiCpuMpData->ApFunction = (UINTN) Procedure;
447 PeiCpuMpData->ApFunctionArgument = (UINTN) ProcedureArgument;
448 PeiCpuMpData->FinishedCount = 0;
449
450 ExchangeInfo = PeiCpuMpData->MpCpuExchangeInfo;
451 ExchangeInfo->Lock = 0;
452 ExchangeInfo->StackStart = PeiCpuMpData->Buffer;
453 ExchangeInfo->StackSize = PeiCpuMpData->CpuApStackSize;
454 ExchangeInfo->BufferStart = PeiCpuMpData->WakeupBuffer;
455 ExchangeInfo->PmodeOffset = PeiCpuMpData->AddressMap.PModeEntryOffset;
456 ExchangeInfo->LmodeOffset = PeiCpuMpData->AddressMap.LModeEntryOffset;
457 ExchangeInfo->Cr3 = AsmReadCr3 ();
458 ExchangeInfo->CFunction = (UINTN) ApCFunction;
459 ExchangeInfo->NumApsExecuting = 0;
460 ExchangeInfo->PeiCpuMpData = PeiCpuMpData;
461
462 //
463 // Get the BSP's data of GDT and IDT
464 //
465 CopyMem ((VOID *)&ExchangeInfo->GdtrProfile, &mGdt, sizeof(mGdt));
466 AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);
467
468 if (PeiCpuMpData->ApLoopMode == ApInMwaitLoop) {
469 //
470 // Get AP target C-state each time when waking up AP,
471 // for it maybe updated by platform again
472 //
473 PeiCpuMpData->ApTargetCState = PcdGet8 (PcdCpuApTargetCstate);
474 }
475
476 //
477 // Wakeup APs per AP loop state
478 //
479 if (PeiCpuMpData->ApLoopMode == ApInHltLoop || PeiCpuMpData->InitFlag) {
480 if (Broadcast) {
481 SendInitSipiSipiAllExcludingSelf ((UINT32) ExchangeInfo->BufferStart);
482 } else {
483 SendInitSipiSipi (
484 PeiCpuMpData->CpuData[ProcessorNumber].ApicId,
485 (UINT32) ExchangeInfo->BufferStart
486 );
487 }
488 } else if ((PeiCpuMpData->ApLoopMode == ApInMwaitLoop) ||
489 (PeiCpuMpData->ApLoopMode == ApInRunLoop)) {
490 if (Broadcast) {
491 for (Index = 0; Index < PeiCpuMpData->CpuCount; Index++) {
492 if (Index != PeiCpuMpData->BspNumber) {
493 WriteStartupSignal (PeiCpuMpData->CpuData[Index].StartupApSignal);
494 }
495 }
496 } else {
497 WriteStartupSignal (PeiCpuMpData->CpuData[ProcessorNumber].StartupApSignal);
498 }
499 } else {
500 ASSERT (FALSE);
501 }
502 return ;
503 }
504
505 /**
506 Get available system memory below 1MB by specified size.
507
508 @param WakeupBufferSize Wakeup buffer size required
509
510 @retval other Return wakeup buffer address below 1MB.
511 @retval -1 Cannot find free memory below 1MB.
512 **/
513 UINTN
514 GetWakeupBuffer (
515 IN UINTN WakeupBufferSize
516 )
517 {
518 EFI_PEI_HOB_POINTERS Hob;
519 UINTN WakeupBufferStart;
520 UINTN WakeupBufferEnd;
521
522 //
523 // Get the HOB list for processing
524 //
525 Hob.Raw = GetHobList ();
526
527 //
528 // Collect memory ranges
529 //
530 while (!END_OF_HOB_LIST (Hob)) {
531 if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
532 if ((Hob.ResourceDescriptor->PhysicalStart < BASE_1MB) &&
533 (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&
534 ((Hob.ResourceDescriptor->ResourceAttribute &
535 (EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED |
536 EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED |
537 EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED
538 )) == 0)
539 ) {
540 //
541 // Need memory under 1MB to be collected here
542 //
543 WakeupBufferEnd = (UINTN) (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength);
544 if (WakeupBufferEnd > BASE_1MB) {
545 //
546 // Wakeup buffer should be under 1MB
547 //
548 WakeupBufferEnd = BASE_1MB;
549 }
550 //
551 // Wakeup buffer should be aligned on 4KB
552 //
553 WakeupBufferStart = (WakeupBufferEnd - WakeupBufferSize) & ~(SIZE_4KB - 1);
554 if (WakeupBufferStart < Hob.ResourceDescriptor->PhysicalStart) {
555 continue;
556 }
557 //
558 // Create a memory allocation HOB.
559 //
560 BuildMemoryAllocationHob (
561 WakeupBufferStart,
562 WakeupBufferSize,
563 EfiBootServicesData
564 );
565 return WakeupBufferStart;
566 }
567 }
568 //
569 // Find the next HOB
570 //
571 Hob.Raw = GET_NEXT_HOB (Hob);
572 }
573
574 return (UINTN) -1;
575 }
576
577 /**
578 Get available system memory below 1MB by specified size.
579
580 @param PeiCpuMpData Pointer to PEI CPU MP Data
581 **/
582 VOID
583 BackupAndPrepareWakeupBuffer(
584 IN PEI_CPU_MP_DATA *PeiCpuMpData
585 )
586 {
587 CopyMem (
588 (VOID *) PeiCpuMpData->BackupBuffer,
589 (VOID *) PeiCpuMpData->WakeupBuffer,
590 PeiCpuMpData->BackupBufferSize
591 );
592 CopyMem (
593 (VOID *) PeiCpuMpData->WakeupBuffer,
594 (VOID *) PeiCpuMpData->AddressMap.RendezvousFunnelAddress,
595 PeiCpuMpData->AddressMap.RendezvousFunnelSize
596 );
597 }
598
599 /**
600 Restore wakeup buffer data.
601
602 @param PeiCpuMpData Pointer to PEI CPU MP Data
603 **/
604 VOID
605 RestoreWakeupBuffer(
606 IN PEI_CPU_MP_DATA *PeiCpuMpData
607 )
608 {
609 CopyMem ((VOID *) PeiCpuMpData->WakeupBuffer, (VOID *) PeiCpuMpData->BackupBuffer, PeiCpuMpData->BackupBufferSize);
610 }
611
612 /**
613 This function will get CPU count in the system.
614
615 @param PeiCpuMpData Pointer to PEI CPU MP Data
616
617 @return AP processor count
618 **/
619 UINT32
620 CountProcessorNumber (
621 IN PEI_CPU_MP_DATA *PeiCpuMpData
622 )
623 {
624 //
625 // Load Microcode on BSP
626 //
627 MicrocodeDetect (PeiCpuMpData);
628 //
629 // Store BSP's MTRR setting
630 //
631 MtrrGetAllMtrrs (&PeiCpuMpData->MtrrTable);
632
633 //
634 // Only perform AP detection if PcdCpuMaxLogicalProcessorNumber is greater than 1
635 //
636 if (PcdGet32 (PcdCpuMaxLogicalProcessorNumber) > 1) {
637 //
638 // Send 1st broadcast IPI to APs to wakeup APs
639 //
640 PeiCpuMpData->InitFlag = TRUE;
641 PeiCpuMpData->X2ApicEnable = FALSE;
642 WakeUpAP (PeiCpuMpData, TRUE, 0, NULL, NULL);
643 //
644 // Wait for AP task to complete and then exit.
645 //
646 MicroSecondDelay (PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));
647 PeiCpuMpData->InitFlag = FALSE;
648 PeiCpuMpData->CpuCount += (UINT32)PeiCpuMpData->MpCpuExchangeInfo->NumApsExecuting;
649 ASSERT (PeiCpuMpData->CpuCount <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber));
650 //
651 // Wait for all APs finished the initialization
652 //
653 while (PeiCpuMpData->FinishedCount < (PeiCpuMpData->CpuCount - 1)) {
654 CpuPause ();
655 }
656
657 if (PeiCpuMpData->X2ApicEnable) {
658 DEBUG ((EFI_D_INFO, "Force x2APIC mode!\n"));
659 //
660 // Wakeup all APs to enable x2APIC mode
661 //
662 WakeUpAP (PeiCpuMpData, TRUE, 0, ApFuncEnableX2Apic, NULL);
663 //
664 // Wait for all known APs finished
665 //
666 while (PeiCpuMpData->FinishedCount < (PeiCpuMpData->CpuCount - 1)) {
667 CpuPause ();
668 }
669 //
670 // Enable x2APIC on BSP
671 //
672 SetApicMode (LOCAL_APIC_MODE_X2APIC);
673 }
674 DEBUG ((EFI_D_INFO, "APIC MODE is %d\n", GetApicMode ()));
675 //
676 // Sort BSP/Aps by CPU APIC ID in ascending order
677 //
678 SortApicId (PeiCpuMpData);
679 }
680
681 DEBUG ((EFI_D_INFO, "CpuMpPei: Find %d processors in system.\n", PeiCpuMpData->CpuCount));
682 return PeiCpuMpData->CpuCount;
683 }
684
685 /**
686 Prepare for AP wakeup buffer and copy AP reset code into it.
687
688 Get wakeup buffer below 1MB. Allocate memory for CPU MP Data and APs Stack.
689
690 @return Pointer to PEI CPU MP Data
691 **/
692 PEI_CPU_MP_DATA *
693 PrepareAPStartupVector (
694 VOID
695 )
696 {
697 EFI_STATUS Status;
698 UINT32 MaxCpuCount;
699 PEI_CPU_MP_DATA *PeiCpuMpData;
700 EFI_PHYSICAL_ADDRESS Buffer;
701 UINTN BufferSize;
702 UINTN WakeupBuffer;
703 UINTN WakeupBufferSize;
704 MP_ASSEMBLY_ADDRESS_MAP AddressMap;
705 UINT8 ApLoopMode;
706 UINT16 MonitorFilterSize;
707 UINT8 *MonitorBuffer;
708 UINTN Index;
709
710 AsmGetAddressMap (&AddressMap);
711 WakeupBufferSize = AddressMap.RendezvousFunnelSize + sizeof (MP_CPU_EXCHANGE_INFO);
712 WakeupBuffer = GetWakeupBuffer ((WakeupBufferSize + SIZE_4KB - 1) & ~(SIZE_4KB - 1));
713 ASSERT (WakeupBuffer != (UINTN) -1);
714 DEBUG ((EFI_D_INFO, "CpuMpPei: WakeupBuffer = 0x%x\n", WakeupBuffer));
715
716 //
717 // Allocate Pages for APs stack, CPU MP Data, backup buffer for wakeup buffer,
718 // and monitor buffer if required.
719 //
720 MaxCpuCount = PcdGet32(PcdCpuMaxLogicalProcessorNumber);
721 BufferSize = PcdGet32 (PcdCpuApStackSize) * MaxCpuCount + sizeof (PEI_CPU_MP_DATA)
722 + WakeupBufferSize + sizeof (PEI_CPU_DATA) * MaxCpuCount;
723 ApLoopMode = GetApLoopMode (&MonitorFilterSize);
724 BufferSize += MonitorFilterSize * MaxCpuCount;
725 Status = PeiServicesAllocatePages (
726 EfiBootServicesData,
727 EFI_SIZE_TO_PAGES (BufferSize),
728 &Buffer
729 );
730 ASSERT_EFI_ERROR (Status);
731
732 PeiCpuMpData = (PEI_CPU_MP_DATA *) (UINTN) (Buffer + PcdGet32 (PcdCpuApStackSize) * MaxCpuCount);
733 PeiCpuMpData->Buffer = (UINTN) Buffer;
734 PeiCpuMpData->CpuApStackSize = PcdGet32 (PcdCpuApStackSize);
735 PeiCpuMpData->WakeupBuffer = WakeupBuffer;
736 PeiCpuMpData->BackupBuffer = (UINTN)PeiCpuMpData + sizeof (PEI_CPU_MP_DATA);
737 PeiCpuMpData->BackupBufferSize = WakeupBufferSize;
738 PeiCpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *) (UINTN) (WakeupBuffer + AddressMap.RendezvousFunnelSize);
739
740 PeiCpuMpData->CpuCount = 1;
741 PeiCpuMpData->BspNumber = 0;
742 PeiCpuMpData->CpuData = (PEI_CPU_DATA *) (PeiCpuMpData->BackupBuffer +
743 PeiCpuMpData->BackupBufferSize);
744 PeiCpuMpData->CpuData[0].ApicId = GetInitialApicId ();
745 PeiCpuMpData->CpuData[0].Health.Uint32 = 0;
746 PeiCpuMpData->EndOfPeiFlag = FALSE;
747 InitializeSpinLock(&PeiCpuMpData->MpLock);
748 SaveVolatileRegisters (&PeiCpuMpData->CpuData[0].VolatileRegisters);
749 CopyMem (&PeiCpuMpData->AddressMap, &AddressMap, sizeof (MP_ASSEMBLY_ADDRESS_MAP));
750 //
751 // Initialize AP loop mode
752 //
753 PeiCpuMpData->ApLoopMode = ApLoopMode;
754 DEBUG ((EFI_D_INFO, "AP Loop Mode is %d\n", PeiCpuMpData->ApLoopMode));
755 MonitorBuffer = (UINT8 *)(PeiCpuMpData->CpuData + MaxCpuCount);
756 if (PeiCpuMpData->ApLoopMode != ApInHltLoop) {
757 //
758 // Set up APs wakeup signal buffer
759 //
760 for (Index = 0; Index < MaxCpuCount; Index++) {
761 PeiCpuMpData->CpuData[Index].StartupApSignal =
762 (UINT32 *)(MonitorBuffer + MonitorFilterSize * Index);
763 }
764 }
765 //
766 // Backup original data and copy AP reset code in it
767 //
768 BackupAndPrepareWakeupBuffer(PeiCpuMpData);
769
770 return PeiCpuMpData;
771 }
772
773 /**
774 Notify function on End Of Pei PPI.
775
776 On S3 boot, this function will restore wakeup buffer data.
777 On normal boot, this function will flag wakeup buffer to be un-used type.
778
779 @param PeiServices The pointer to the PEI Services Table.
780 @param NotifyDescriptor Address of the notification descriptor data structure.
781 @param Ppi Address of the PPI that was installed.
782
783 @retval EFI_SUCCESS When everything is OK.
784
785 **/
786 EFI_STATUS
787 EFIAPI
788 CpuMpEndOfPeiCallback (
789 IN EFI_PEI_SERVICES **PeiServices,
790 IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
791 IN VOID *Ppi
792 )
793 {
794 EFI_STATUS Status;
795 EFI_BOOT_MODE BootMode;
796 PEI_CPU_MP_DATA *PeiCpuMpData;
797 EFI_PEI_HOB_POINTERS Hob;
798 EFI_HOB_MEMORY_ALLOCATION *MemoryHob;
799
800 DEBUG ((EFI_D_INFO, "CpuMpPei: CpuMpEndOfPeiCallback () invoked\n"));
801
802 Status = PeiServicesGetBootMode (&BootMode);
803 ASSERT_EFI_ERROR (Status);
804
805 PeiCpuMpData = GetMpHobData ();
806 ASSERT (PeiCpuMpData != NULL);
807
808 if (BootMode != BOOT_ON_S3_RESUME) {
809 //
810 // Get the HOB list for processing
811 //
812 Hob.Raw = GetHobList ();
813 //
814 // Collect memory ranges
815 //
816 while (!END_OF_HOB_LIST (Hob)) {
817 if (Hob.Header->HobType == EFI_HOB_TYPE_MEMORY_ALLOCATION) {
818 MemoryHob = Hob.MemoryAllocation;
819 if(MemoryHob->AllocDescriptor.MemoryBaseAddress == PeiCpuMpData->WakeupBuffer) {
820 //
821 // Flag this HOB type to un-used
822 //
823 GET_HOB_TYPE (Hob) = EFI_HOB_TYPE_UNUSED;
824 break;
825 }
826 }
827 Hob.Raw = GET_NEXT_HOB (Hob);
828 }
829 } else {
830 RestoreWakeupBuffer (PeiCpuMpData);
831 PeiCpuMpData->EndOfPeiFlag = TRUE;
832 }
833 return EFI_SUCCESS;
834 }
835
836 /**
837 The Entry point of the MP CPU PEIM.
838
839 This function will wakeup APs and collect CPU AP count and install the
840 Mp Service Ppi.
841
842 @param FileHandle Handle of the file being invoked.
843 @param PeiServices Describes the list of possible PEI Services.
844
845 @retval EFI_SUCCESS MpServicePpi is installed successfully.
846
847 **/
848 EFI_STATUS
849 EFIAPI
850 CpuMpPeimInit (
851 IN EFI_PEI_FILE_HANDLE FileHandle,
852 IN CONST EFI_PEI_SERVICES **PeiServices
853 )
854 {
855 EFI_STATUS Status;
856 PEI_CPU_MP_DATA *PeiCpuMpData;
857 EFI_VECTOR_HANDOFF_INFO *VectorInfo;
858 EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;
859
860 //
861 // Load new GDT table on BSP
862 //
863 AsmInitializeGdt (&mGdt);
864 //
865 // Get Vector Hand-off Info PPI
866 //
867 VectorInfo = NULL;
868 Status = PeiServicesLocatePpi (
869 &gEfiVectorHandoffInfoPpiGuid,
870 0,
871 NULL,
872 (VOID **)&VectorHandoffInfoPpi
873 );
874 if (Status == EFI_SUCCESS) {
875 VectorInfo = VectorHandoffInfoPpi->Info;
876 }
877 Status = InitializeCpuExceptionHandlers (VectorInfo);
878 ASSERT_EFI_ERROR (Status);
879 //
880 // Get wakeup buffer and copy AP reset code in it
881 //
882 PeiCpuMpData = PrepareAPStartupVector ();
883 //
884 // Count processor number and collect processor information
885 //
886 CountProcessorNumber (PeiCpuMpData);
887 //
888 // Build location of PEI CPU MP DATA buffer in HOB
889 //
890 BuildGuidDataHob (
891 &gEfiCallerIdGuid,
892 (VOID *)&PeiCpuMpData,
893 sizeof(UINT64)
894 );
895 //
896 // Update and publish CPU BIST information
897 //
898 CollectBistDataFromPpi (PeiServices, PeiCpuMpData);
899 //
900 // register an event for EndOfPei
901 //
902 Status = PeiServicesNotifyPpi (&mNotifyList);
903 ASSERT_EFI_ERROR (Status);
904 //
905 // Install CPU MP PPI
906 //
907 Status = PeiServicesInstallPpi(&mPeiCpuMpPpiDesc);
908 ASSERT_EFI_ERROR (Status);
909
910 return Status;
911 }
EFI Development Kit II mirror for PVE