5cd42667dc4609a048fc5c510d646bd29c2efe81
[mirror_edk2.git] / UefiCpuPkg / Include / Register / Amd / Cpuid.h
1 /** @file
2 CPUID leaf definitions.
3
4 Provides defines for CPUID leaf indexes. Data structures are provided for
5 registers returned by a CPUID leaf that contain one or more bit fields.
6 If a register returned is a single 32-bit value, then a data structure is
7 not provided for that register.
8
9 Copyright (c) 2017, Advanced Micro Devices. All rights reserved.<BR>
10 This program and the accompanying materials are licensed and made available
11 under the terms and conditions of the BSD License which accompanies this
12 distribution. The full text of the license may be found at
13 http://opensource.org/licenses/bsd-license.php
14
15 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
16 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17
18 @par Specification Reference:
19 AMD64 Architecture Programming Manaul volume 2, March 2017, Sections 15.34
20
21 **/
22
23 #ifndef __AMD_CPUID_H__
24 #define __AMD_CPUID_H__
25
26 /**
27
28 Memory Encryption Information
29
30 @param EAX CPUID_MEMORY_ENCRYPTION_INFO (0x8000001F)
31
32 @retval EAX Returns the memory encryption feature support status.
33 @retval EBX If memory encryption feature is present then return
34 the page table bit number used to enable memory encryption support
35 and reducing of physical address space in bits.
36 @retval ECX Returns number of encrypted guest supported simultaneosuly.
37 @retval EDX Returns minimum SEV enabled and SEV disbled ASID..
38
39 <b>Example usage</b>
40 @code
41 UINT32 Eax;
42 UINT32 Ebx;
43 UINT32 Ecx;
44 UINT32 Edx;
45
46 AsmCpuid (CPUID_MEMORY_ENCRYPTION_INFO, &Eax, &Ebx, &Ecx, &Edx);
47 @endcode
48 **/
49
50 #define CPUID_MEMORY_ENCRYPTION_INFO 0x8000001F
51
52 /**
53 CPUID Memory Encryption support information EAX for CPUID leaf
54 #CPUID_MEMORY_ENCRYPTION_INFO.
55 **/
56 typedef union {
57 ///
58 /// Individual bit fields
59 ///
60 struct {
61 ///
62 /// [Bit 0] Secure Memory Encryption (Sme) Support
63 ///
64 UINT32 SmeBit:1;
65
66 ///
67 /// [Bit 1] Secure Encrypted Virtualization (Sev) Support
68 ///
69 UINT32 SevBit:1;
70
71 ///
72 /// [Bit 2] Page flush MSR support
73 ///
74 UINT32 PageFlushMsrBit:1;
75
76 ///
77 /// [Bit 3] Encrypted state support
78 ///
79 UINT32 SevEsBit:1;
80
81 ///
82 /// [Bit 4:31] Reserved
83 ///
84 UINT32 ReservedBits:28;
85 } Bits;
86 ///
87 /// All bit fields as a 32-bit value
88 ///
89 UINT32 Uint32;
90 } CPUID_MEMORY_ENCRYPTION_INFO_EAX;
91
92 /**
93 CPUID Memory Encryption support information EBX for CPUID leaf
94 #CPUID_MEMORY_ENCRYPTION_INFO.
95 **/
96 typedef union {
97 ///
98 /// Individual bit fields
99 ///
100 struct {
101 ///
102 /// [Bit 0:5] Page table bit number used to enable memory encryption
103 ///
104 UINT32 PtePosBits:6;
105
106 ///
107 /// [Bit 6:11] Reduction of system physical address space bits when memory encryption is enabled
108 ///
109 UINT32 ReducedPhysBits:5;
110
111 ///
112 /// [Bit 12:31] Reserved
113 ///
114 UINT32 ReservedBits:21;
115 } Bits;
116 ///
117 /// All bit fields as a 32-bit value
118 ///
119 UINT32 Uint32;
120 } CPUID_MEMORY_ENCRYPTION_INFO_EBX;
121
122 /**
123 CPUID Memory Encryption support information ECX for CPUID leaf
124 #CPUID_MEMORY_ENCRYPTION_INFO.
125 **/
126 typedef union {
127 ///
128 /// Individual bit fields
129 ///
130 struct {
131 ///
132 /// [Bit 0:31] Number of encrypted guest supported simultaneously
133 ///
134 UINT32 NumGuests;
135 } Bits;
136 ///
137 /// All bit fields as a 32-bit value
138 ///
139 UINT32 Uint32;
140 } CPUID_MEMORY_ENCRYPTION_INFO_ECX;
141
142 /**
143 CPUID Memory Encryption support information EDX for CPUID leaf
144 #CPUID_MEMORY_ENCRYPTION_INFO.
145 **/
146 typedef union {
147 ///
148 /// Individual bit fields
149 ///
150 struct {
151 ///
152 /// [Bit 0:31] Minimum SEV enabled, SEV-ES disabled ASID
153 ///
154 UINT32 MinAsid;
155 } Bits;
156 ///
157 /// All bit fields as a 32-bit value
158 ///
159 UINT32 Uint32;
160 } CPUID_MEMORY_ENCRYPTION_INFO_EDX;
161
162 #endif