UefiCpuPkg/Include/Register/StmResourceDescriptor.h

   1 /** @file
   2   STM Resource Descriptor
   3
   4   Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
   5   This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php.
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13   @par Specification Reference:
  14   SMI Transfer Monitor (STM) User Guide Revision 1.00
  15
  16 **/
  17
  18 #ifndef _STM_RESOURCE_DESCRIPTOR_H_
  19 #define _STM_RESOURCE_DESCRIPTOR_H_
  20
  21 #pragma pack (1)
  22
  23 /**
  24   STM Resource Descriptor Header
  25 **/
  26 typedef struct {
  27   UINT32  RscType;
  28   UINT16  Length;
  29   UINT16  ReturnStatus:1;
  30   UINT16  Reserved:14;
  31   UINT16  IgnoreResource:1;
  32 } STM_RSC_DESC_HEADER;
  33
  34 /**
  35   Define values for the RscType field of #STM_RSC_DESC_HEADER
  36   @{
  37 **/
  38 #define END_OF_RESOURCES      0
  39 #define MEM_RANGE             1
  40 #define IO_RANGE              2
  41 #define MMIO_RANGE            3
  42 #define MACHINE_SPECIFIC_REG  4
  43 #define PCI_CFG_RANGE         5
  44 #define TRAPPED_IO_RANGE      6
  45 #define ALL_RESOURCES         7
  46 #define REGISTER_VIOLATION    8
  47 #define MAX_DESC_TYPE         8
  48 /// @}
  49
  50 /**
  51   STM Resource End Descriptor
  52 **/
  53 typedef struct {
  54   STM_RSC_DESC_HEADER  Hdr;
  55   UINT64               ResourceListContinuation;
  56 } STM_RSC_END;
  57
  58 /**
  59   STM Resource Memory Descriptor
  60 **/
  61 typedef struct {
  62   STM_RSC_DESC_HEADER  Hdr;
  63   UINT64               Base;
  64   UINT64               Length;
  65   UINT32               RWXAttributes:3;
  66   UINT32               Reserved:29;
  67   UINT32               Reserved_2;
  68 } STM_RSC_MEM_DESC;
  69
  70 /**
  71   Define values for the RWXAttributes field of #STM_RSC_MEM_DESC
  72   @{
  73 **/
  74 #define STM_RSC_MEM_R  0x1
  75 #define STM_RSC_MEM_W  0x2
  76 #define STM_RSC_MEM_X  0x4
  77 /// @}
  78
  79 /**
  80   STM Resource I/O Descriptor
  81 **/
  82 typedef struct {
  83   STM_RSC_DESC_HEADER  Hdr;
  84   UINT16               Base;
  85   UINT16               Length;
  86   UINT32               Reserved;
  87 } STM_RSC_IO_DESC;
  88
  89 /**
  90   STM Resource MMIO Descriptor
  91 **/
  92 typedef struct {
  93   STM_RSC_DESC_HEADER  Hdr;
  94   UINT64               Base;
  95   UINT64               Length;
  96   UINT32               RWXAttributes:3;
  97   UINT32               Reserved:29;
  98   UINT32               Reserved_2;
  99 } STM_RSC_MMIO_DESC;
 100
 101 /**
 102   Define values for the RWXAttributes field of #STM_RSC_MMIO_DESC
 103   @{
 104 **/
 105 #define STM_RSC_MMIO_R  0x1
 106 #define STM_RSC_MMIO_W  0x2
 107 #define STM_RSC_MMIO_X  0x4
 108 /// @}
 109
 110 /**
 111   STM Resource MSR Descriptor
 112 **/
 113 typedef struct {
 114   STM_RSC_DESC_HEADER  Hdr;
 115   UINT32               MsrIndex;
 116   UINT32               KernelModeProcessing:1;
 117   UINT32               Reserved:31;
 118   UINT64               ReadMask;
 119   UINT64               WriteMask;
 120 } STM_RSC_MSR_DESC;
 121
 122 /**
 123   STM PCI Device Path node used for the PciDevicePath field of
 124   #STM_RSC_PCI_CFG_DESC
 125 **/
 126 typedef struct {
 127   ///
 128   /// Must be 1, indicating Hardware Device Path
 129   ///
 130   UINT8   Type;
 131   ///
 132   /// Must be 1, indicating PCI
 133   ///
 134   UINT8   Subtype;
 135   ///
 136   /// sizeof(STM_PCI_DEVICE_PATH_NODE) which is 6
 137   ///
 138   UINT16  Length;
 139   UINT8   PciFunction;
 140   UINT8   PciDevice;
 141 } STM_PCI_DEVICE_PATH_NODE;
 142
 143 /**
 144   STM Resource PCI Configuration Descriptor
 145 **/
 146 typedef struct {
 147   STM_RSC_DESC_HEADER       Hdr;
 148   UINT16                    RWAttributes:2;
 149   UINT16                    Reserved:14;
 150   UINT16                    Base;
 151   UINT16                    Length;
 152   UINT8                     OriginatingBusNumber;
 153   UINT8                     LastNodeIndex;
 154   STM_PCI_DEVICE_PATH_NODE  PciDevicePath[1];
 155 //STM_PCI_DEVICE_PATH_NODE  PciDevicePath[LastNodeIndex + 1];
 156 } STM_RSC_PCI_CFG_DESC;
 157
 158 /**
 159   Define values for the RWAttributes field of #STM_RSC_PCI_CFG_DESC
 160   @{
 161 **/
 162 #define STM_RSC_PCI_CFG_R  0x1
 163 #define STM_RSC_PCI_CFG_W  0x2
 164 /// @}
 165
 166 /**
 167   STM Resource Trapped I/O Descriptor
 168 **/
 169 typedef struct {
 170   STM_RSC_DESC_HEADER  Hdr;
 171   UINT16               Base;
 172   UINT16               Length;
 173   UINT16               In:1;
 174   UINT16               Out:1;
 175   UINT16               Api:1;
 176   UINT16               Reserved1:13;
 177   UINT16               Reserved2;
 178 } STM_RSC_TRAPPED_IO_DESC;
 179
 180 /**
 181   STM Resource All Descriptor
 182 **/
 183 typedef struct {
 184   STM_RSC_DESC_HEADER  Hdr;
 185 } STM_RSC_ALL_RESOURCES_DESC;
 186
 187 /**
 188   STM Register Volation Descriptor
 189 **/
 190 typedef struct {
 191   STM_RSC_DESC_HEADER  Hdr;
 192   UINT32               RegisterType;
 193   UINT32               Reserved;
 194   UINT64               ReadMask;
 195   UINT64               WriteMask;
 196 } STM_REGISTER_VIOLATION_DESC;
 197
 198 /**
 199   Enum values for the RWAttributes field of #STM_REGISTER_VIOLATION_DESC
 200 **/
 201 typedef enum {
 202   StmRegisterCr0,
 203   StmRegisterCr2,
 204   StmRegisterCr3,
 205   StmRegisterCr4,
 206   StmRegisterCr8,
 207   StmRegisterMax,
 208 } STM_REGISTER_VIOLATION_TYPE;
 209
 210 /**
 211   Union of all STM resource types
 212 **/
 213 typedef union {
 214   STM_RSC_DESC_HEADER          Header;
 215   STM_RSC_END                  End;
 216   STM_RSC_MEM_DESC             Mem;
 217   STM_RSC_IO_DESC              Io;
 218   STM_RSC_MMIO_DESC            Mmio;
 219   STM_RSC_MSR_DESC             Msr;
 220   STM_RSC_PCI_CFG_DESC         PciCfg;
 221   STM_RSC_TRAPPED_IO_DESC      TrappedIo;
 222   STM_RSC_ALL_RESOURCES_DESC   All;
 223   STM_REGISTER_VIOLATION_DESC  RegisterViolation;
 224 } STM_RSC;
 225
 226 #pragma pack ()
 227
 228 #endif