1 ;------------------------------------------------------------------------------
3 ;* Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
4 ;* This program and the accompanying materials
5 ;* are licensed and made available under the terms and conditions of the BSD License
6 ;* which accompanies this distribution. The full text of the license may be found at
7 ;* http://opensource.org/licenses/bsd-license.php
9 ;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 ;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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17 ; Float control word initial value:
18 ; all exceptions masked, double-extended-precision, round-to-nearest
20 mFpuControlWord: DW 0x37F
22 ; Multimedia-extensions control word:
23 ; all exceptions masked, round-to-nearest, flush to zero for masked underflow
25 mMmxControlWord: DD 0x1F80
31 ; Initializes floating point units for requirement of UEFI specification.
33 ; This function initializes floating-point control word to 0x027F (all exceptions
34 ; masked,double-precision, round-to-nearest) and multimedia-extensions control word
35 ; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
36 ; for masked underflow).
38 global ASM_PFX(InitializeFloatingPointUnits)
39 ASM_PFX(InitializeFloatingPointUnits):
42 ; Initialize floating point units
44 ; The following opcodes stand for instruction 'finit'
45 ; to be supported by some 64-bit assemblers
48 fldcw [mFpuControlWord]
51 ; Set OSFXSR bit 9 in CR4
57 ldmxcsr [mMmxControlWord]