UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c

   1 /** @file
   2   Protected Processor Inventory Number(PPIN) feature.
   3
   4   Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7 **/
   8
   9 #include "CpuCommonFeatures.h"
  10
  11 /**
  12   Detects if Protected Processor Inventory Number feature supported on current
  13   processor.
  14
  15   @param[in]  ProcessorNumber  The index of the CPU executing this function.
  16   @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
  17                                structure for the CPU executing this function.
  18   @param[in]  ConfigData       A pointer to the configuration buffer returned
  19                                by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
  20                                CPU_FEATURE_GET_CONFIG_DATA was not provided in
  21                                RegisterCpuFeature().
  22
  23   @retval TRUE     Protected Processor Inventory Number feature is supported.
  24   @retval FALSE    Protected Processor Inventory Number feature is not supported.
  25
  26   @note This service could be called by BSP/APs.
  27 **/
  28 BOOLEAN
  29 EFIAPI
  30 PpinSupport (
  31   IN UINTN                             ProcessorNumber,
  32   IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
  33   IN VOID                              *ConfigData  OPTIONAL
  34   )
  35 {
  36   MSR_IVY_BRIDGE_PLATFORM_INFO_1_REGISTER    PlatformInfo;
  37
  38   if ((CpuInfo->DisplayFamily == 0x06) &&
  39       ((CpuInfo->DisplayModel == 0x3E) ||      // Xeon E5 V2
  40        (CpuInfo->DisplayModel == 0x56) ||      // Xeon Processor D Product
  41        (CpuInfo->DisplayModel == 0x4F) ||      // Xeon E5 v4, E7 v4
  42        (CpuInfo->DisplayModel == 0x55) ||      // Xeon Processor Scalable
  43        (CpuInfo->DisplayModel == 0x57) ||      // Xeon Phi processor 3200, 5200, 7200 series.
  44        (CpuInfo->DisplayModel == 0x85)         // Future Xeon phi processor
  45      )) {
  46     //
  47     // Check whether platform support this feature.
  48     //
  49     PlatformInfo.Uint64 = AsmReadMsr64 (MSR_IVY_BRIDGE_PLATFORM_INFO_1);
  50     return (PlatformInfo.Bits.PPIN_CAP != 0);
  51   }
  52
  53   return FALSE;
  54 }
  55
  56 /**
  57   Initializes Protected Processor Inventory Number feature to specific state.
  58
  59   @param[in]  ProcessorNumber  The index of the CPU executing this function.
  60   @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
  61                                structure for the CPU executing this function.
  62   @param[in]  ConfigData       A pointer to the configuration buffer returned
  63                                by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
  64                                CPU_FEATURE_GET_CONFIG_DATA was not provided in
  65                                RegisterCpuFeature().
  66   @param[in]  State            If TRUE, then the Protected Processor Inventory
  67                                Number feature must be enabled.
  68                                If FALSE, then the Protected Processor Inventory
  69                                Number feature must be disabled.
  70
  71   @retval RETURN_SUCCESS       Protected Processor Inventory Number feature is
  72                                initialized.
  73   @retval RETURN_DEVICE_ERROR  Device can't change state because it has been
  74                                locked.
  75
  76 **/
  77 RETURN_STATUS
  78 EFIAPI
  79 PpinInitialize (
  80   IN UINTN                             ProcessorNumber,
  81   IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
  82   IN VOID                              *ConfigData,  OPTIONAL
  83   IN BOOLEAN                           State
  84   )
  85 {
  86   MSR_IVY_BRIDGE_PPIN_CTL_REGISTER     MsrPpinCtrl;
  87
  88   //
  89   // Check whether device already lock this register.
  90   // If already locked, just base on the request state and
  91   // the current state to return the status.
  92   //
  93   MsrPpinCtrl.Uint64 = AsmReadMsr64 (MSR_IVY_BRIDGE_PPIN_CTL);
  94   if (MsrPpinCtrl.Bits.LockOut != 0) {
  95     return MsrPpinCtrl.Bits.Enable_PPIN == State ? RETURN_SUCCESS : RETURN_DEVICE_ERROR;
  96   }
  97
  98   //
  99   // Support function already check the processor which support PPIN feature, so this function not need
 100   // to check the processor again.
 101   //
 102   // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only program MSR_IVY_BRIDGE_PPIN_CTL for
 103   // thread 0 core 0 in each package.
 104   //
 105   if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) {
 106     return RETURN_SUCCESS;
 107   }
 108
 109   CPU_REGISTER_TABLE_WRITE_FIELD (
 110     ProcessorNumber,
 111     Msr,
 112     MSR_IVY_BRIDGE_PPIN_CTL,
 113     MSR_IVY_BRIDGE_PPIN_CTL_REGISTER,
 114     Bits.Enable_PPIN,
 115     (State) ? 1 : 0
 116     );
 117
 118   return RETURN_SUCCESS;
 119 }