2 X64 arch definition for CPU Exception Handler Library.
4 Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
9 #ifndef _ARCH_CPU_INTERRUPT_DEFS_H_
10 #define _ARCH_CPU_INTERRUPT_DEFS_H_
13 EFI_SYSTEM_CONTEXT_X64 SystemContext
;
14 BOOLEAN ExceptionDataFlag
;
16 } EXCEPTION_HANDLER_CONTEXT
;
19 // Register Structure Definitions
22 EFI_STATUS_CODE_DATA Header
;
23 EFI_SYSTEM_CONTEXT_X64 SystemContext
;
24 } CPU_STATUS_CODE_TEMPLATE
;
30 UINTN ExceptonHandler
;
37 UINT8 HookAfterStubHeaderCode
[HOOKAFTER_STUB_SIZE
];
38 } RESERVED_VECTORS_DATA
;
40 #define CPU_TSS_DESC_SIZE sizeof (IA32_TSS_DESCRIPTOR)
41 #define CPU_TSS_SIZE sizeof (IA32_TASK_STATE_SEGMENT)