1 ;------------------------------------------------------------------------------ ;
2 ; Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.<BR>
3 ; This program and the accompanying materials
4 ; are licensed and made available under the terms and conditions of the BSD License
5 ; which accompanies this distribution. The full text of the license may be found at
6 ; http://opensource.org/licenses/bsd-license.php.
8 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
9 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 ; ExceptionHandlerAsm.Asm
17 ; x64 CPU Exception Handler
21 ;------------------------------------------------------------------------------
24 ; CommonExceptionHandler()
26 externdef CommonExceptionHandler:near
28 EXTRN mErrorCodeFlag:DWORD ; Error code flags for exceptions
29 EXTRN mDoFarReturnFlag:QWORD ; Do far return flag
39 db 6ah ; push #VectorNum
40 db ($ - AsmIdtVectorBegin) / ((AsmIdtVectorEnd - AsmIdtVectorBegin) / 32) ; VectorNum
42 mov rax, CommonInterruptEntry
47 HookAfterStubHeaderBegin:
50 db 0 ; 0 will be fixed
52 mov rax, HookAfterStubHeaderEnd
54 HookAfterStubHeaderEnd:
60 bt mErrorCodeFlag, ecx
62 push [rsp] ; push additional rcx to make stack alignment
64 xchg rcx, [rsp] ; restore rcx, save Exception Number in stack
65 push [rax] ; push rax into stack to keep code consistence
67 ;---------------------------------------;
68 ; CommonInterruptEntry ;
69 ;---------------------------------------;
70 ; The follow algorithm is used for the common interrupt routine.
71 ; Entry from each interrupt with a push eax and eax=interrupt number
72 ; Stack frame would be as follows as specified in IA32 manuals:
74 ; +---------------------+ <-- 16-byte aligned ensured by processor
76 ; +---------------------+
78 ; +---------------------+
80 ; +---------------------+
82 ; +---------------------+
84 ; +---------------------+
86 ; +---------------------+
88 ; +---------------------+
90 ; +---------------------+ <-- RBP, 16-byte aligned
91 ; The follow algorithm is used for the common interrupt routine.
92 CommonInterruptEntry PROC PUBLIC
96 ; All interrupt handlers are invoked through interrupt gates, so
97 ; IF flag automatically cleared at the entry point
99 xchg rcx, [rsp] ; Save rcx into stack and save vector number into rcx
101 cmp ecx, 32 ; Intel reserved vector for exceptions?
103 bt mErrorCodeFlag, ecx
109 ; Push a dummy error code on the stack
110 ; to maintain coherent stack map
113 mov qword ptr [rsp + 8], 0
117 push 0 ; clear EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
118 push 0 ; clear EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
122 ; +---------------------+ <-- 16-byte aligned ensured by processor
124 ; +---------------------+
126 ; +---------------------+
128 ; +---------------------+
130 ; +---------------------+
132 ; +---------------------+
134 ; +---------------------+
135 ; + RCX / Vector Number +
136 ; +---------------------+
138 ; +---------------------+ <-- RBP, 16-byte aligned
143 ; Since here the stack pointer is 16-byte aligned, so
144 ; EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
148 ;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
149 ;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
159 push qword ptr [rbp + 8] ; RCX
162 push qword ptr [rbp + 48] ; RSP
163 push qword ptr [rbp] ; RBP
167 ;; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
168 movzx rax, word ptr [rbp + 56]
170 movzx rax, word ptr [rbp + 32]
181 mov [rbp + 8], rcx ; save vector number
184 push qword ptr [rbp + 24]
186 ;; UINT64 Gdtr[2], Idtr[2];
211 push qword ptr [rbp + 40]
213 ;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
229 ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
243 ;; FX_SAVE_STATE_X64 FxSaveState;
246 db 0fh, 0aeh, 07h ;fxsave [rdi]
248 ;; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear
251 ;; UINT32 ExceptionData;
252 push qword ptr [rbp + 16]
254 ;; Prepare parameter and call
258 ; Per X64 calling convention, allocate maximum parameter stack space
259 ; and make sure RSP is 16-byte aligned
262 mov rax, CommonExceptionHandler
267 ;; UINT64 ExceptionData;
270 ;; FX_SAVE_STATE_X64 FxSaveState;
273 db 0fh, 0aeh, 0Eh ; fxrstor [rsi]
276 ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
277 ;; Skip restoration of DRx registers to support in-circuit emualators
278 ;; or debuggers set breakpoint in interrupt/exception context
281 ;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
284 add rsp, 8 ; not for Cr1
295 pop qword ptr [rbp + 40]
298 ;; UINT64 Gdtr[2], Idtr[2];
299 ;; Best not let anyone mess with these particular registers...
303 pop qword ptr [rbp + 24]
305 ;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
307 ; mov gs, rax ; not for gs
309 ; mov fs, rax ; not for fs
310 ; (X64 will not use fs and gs, so we do not restore it)
315 pop qword ptr [rbp + 32] ; for cs
316 pop qword ptr [rbp + 56] ; for ss
318 ;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
319 ;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
322 add rsp, 8 ; not for rbp
323 pop qword ptr [rbp + 48] ; for rsp
340 cmp qword ptr [rsp - 32], 0 ; check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
342 cmp qword ptr [rsp - 40], 1 ; check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
344 jmp qword ptr [rsp - 32]
347 jmp qword ptr [rsp - 24]
350 cmp mDoFarReturnFlag, 0 ; Check if need to do far return instead of IRET
353 mov rax, rsp ; save old RSP to rax
355 push [rax + 10h] ; save CS in new location
356 push [rax + 8h] ; save EIP in new location
357 push [rax + 18h] ; save EFLAGS in new location
358 mov rax, [rax] ; restore rax
359 popfq ; restore EFLAGS
360 DB 48h ; prefix to composite "retq" with next "retf"
365 CommonInterruptEntry ENDP
367 ;-------------------------------------------------------------------------------------
368 ; GetTemplateAddressMap (&AddressMap);
369 ;-------------------------------------------------------------------------------------
370 ; comments here for definition of address map
371 AsmGetTemplateAddressMap PROC
372 mov rax, offset AsmIdtVectorBegin
373 mov qword ptr [rcx], rax
374 mov qword ptr [rcx + 8h], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32
375 mov rax, offset HookAfterStubHeaderBegin
376 mov qword ptr [rcx + 10h], rax
378 AsmGetTemplateAddressMap ENDP
380 ;-------------------------------------------------------------------------------------
381 ; AsmVectorNumFixup (*VectorBase, VectorNum);
382 ;-------------------------------------------------------------------------------------
383 AsmVectorNumFixup PROC
385 mov [rcx + (@VectorNum - HookAfterStubHeaderBegin)], al
387 AsmVectorNumFixup ENDP