4 Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include <Library/MtrrLib.h>
18 #include <Library/BaseLib.h>
19 #include <Library/CpuLib.h>
20 #include <Library/BaseMemoryLib.h>
21 #include <Library/DebugLib.h>
24 // Context to save and restore when MTRRs are programmed
28 BOOLEAN InterruptState
;
32 // This table defines the offset, base and length of the fixed MTRRs
34 CONST FIXED_MTRR mMtrrLibFixedMtrrTable
[] = {
36 MTRR_LIB_IA32_MTRR_FIX64K_00000
,
41 MTRR_LIB_IA32_MTRR_FIX16K_80000
,
46 MTRR_LIB_IA32_MTRR_FIX16K_A0000
,
51 MTRR_LIB_IA32_MTRR_FIX4K_C0000
,
56 MTRR_LIB_IA32_MTRR_FIX4K_C8000
,
61 MTRR_LIB_IA32_MTRR_FIX4K_D0000
,
66 MTRR_LIB_IA32_MTRR_FIX4K_D8000
,
71 MTRR_LIB_IA32_MTRR_FIX4K_E0000
,
76 MTRR_LIB_IA32_MTRR_FIX4K_E8000
,
81 MTRR_LIB_IA32_MTRR_FIX4K_F0000
,
86 MTRR_LIB_IA32_MTRR_FIX4K_F8000
,
93 // Lookup table used to print MTRRs
95 GLOBAL_REMOVE_IF_UNREFERENCED CONST CHAR8
*mMtrrMemoryCacheTypeShortName
[] = {
96 "UC", // CacheUncacheable
97 "WC", // CacheWriteCombining
100 "WT", // CacheWriteThrough
101 "WP", // CacheWriteProtected
102 "WB", // CacheWriteBack
107 Worker function returns the variable MTRR count for the CPU.
109 @return Variable MTRR count
113 GetVariableMtrrCountWorker (
117 UINT32 VariableMtrrCount
;
119 VariableMtrrCount
= (UINT32
)(AsmReadMsr64 (MTRR_LIB_IA32_MTRR_CAP
) & MTRR_LIB_IA32_MTRR_CAP_VCNT_MASK
);
120 ASSERT (VariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
121 return VariableMtrrCount
;
125 Returns the variable MTRR count for the CPU.
127 @return Variable MTRR count
132 GetVariableMtrrCount (
136 if (!IsMtrrSupported ()) {
139 return GetVariableMtrrCountWorker ();
143 Worker function returns the firmware usable variable MTRR count for the CPU.
145 @return Firmware usable variable MTRR count
149 GetFirmwareVariableMtrrCountWorker (
153 UINT32 VariableMtrrCount
;
154 UINT32 ReservedMtrrNumber
;
156 VariableMtrrCount
= GetVariableMtrrCountWorker ();
157 ReservedMtrrNumber
= PcdGet32 (PcdCpuNumberOfReservedVariableMtrrs
);
158 if (VariableMtrrCount
< ReservedMtrrNumber
) {
162 return VariableMtrrCount
- ReservedMtrrNumber
;
166 Returns the firmware usable variable MTRR count for the CPU.
168 @return Firmware usable variable MTRR count
173 GetFirmwareVariableMtrrCount (
177 if (!IsMtrrSupported ()) {
180 return GetFirmwareVariableMtrrCountWorker ();
184 Worker function returns the default MTRR cache type for the system.
186 @return The default MTRR cache type.
189 MTRR_MEMORY_CACHE_TYPE
190 MtrrGetDefaultMemoryTypeWorker (
194 return (MTRR_MEMORY_CACHE_TYPE
) (AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
) & 0x7);
199 Returns the default MTRR cache type for the system.
201 @return The default MTRR cache type.
204 MTRR_MEMORY_CACHE_TYPE
206 MtrrGetDefaultMemoryType (
210 if (!IsMtrrSupported ()) {
211 return CacheUncacheable
;
213 return MtrrGetDefaultMemoryTypeWorker ();
217 Preparation before programming MTRR.
219 This function will do some preparation for programming MTRRs:
220 disable cache, invalid cache and disable MTRR caching functionality
222 @param[out] MtrrContext Pointer to context to save
227 OUT MTRR_CONTEXT
*MtrrContext
231 // Disable interrupts and save current interrupt state
233 MtrrContext
->InterruptState
= SaveAndDisableInterrupts();
236 // Enter no fill cache mode, CD=1(Bit30), NW=0 (Bit29)
241 // Save original CR4 value and clear PGE flag (Bit 7)
243 MtrrContext
->Cr4
= AsmReadCr4 ();
244 AsmWriteCr4 (MtrrContext
->Cr4
& (~BIT7
));
254 AsmMsrBitFieldWrite64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
, 10, 11, 0);
258 Cleaning up after programming MTRRs.
260 This function will do some clean up after programming MTRRs:
261 Flush all TLBs, re-enable caching, restore CR4.
263 @param[in] MtrrContext Pointer to context to restore
267 PostMtrrChangeEnableCache (
268 IN MTRR_CONTEXT
*MtrrContext
277 // Enable Normal Mode caching CD=NW=0, CD(Bit30), NW(Bit29)
282 // Restore original CR4 value
284 AsmWriteCr4 (MtrrContext
->Cr4
);
287 // Restore original interrupt state
289 SetInterruptState (MtrrContext
->InterruptState
);
293 Cleaning up after programming MTRRs.
295 This function will do some clean up after programming MTRRs:
296 enable MTRR caching functionality, and enable cache
298 @param[in] MtrrContext Pointer to context to restore
303 IN MTRR_CONTEXT
*MtrrContext
309 AsmMsrBitFieldWrite64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
, 10, 11, 3);
311 PostMtrrChangeEnableCache (MtrrContext
);
315 Worker function gets the content in fixed MTRRs
317 @param[out] FixedSettings A buffer to hold fixed MTRRs content.
319 @retval The pointer of FixedSettings
323 MtrrGetFixedMtrrWorker (
324 OUT MTRR_FIXED_SETTINGS
*FixedSettings
329 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
330 FixedSettings
->Mtrr
[Index
] =
331 AsmReadMsr64 (mMtrrLibFixedMtrrTable
[Index
].Msr
);
334 return FixedSettings
;
339 This function gets the content in fixed MTRRs
341 @param[out] FixedSettings A buffer to hold fixed MTRRs content.
343 @retval The pointer of FixedSettings
349 OUT MTRR_FIXED_SETTINGS
*FixedSettings
352 if (!IsMtrrSupported ()) {
353 return FixedSettings
;
356 return MtrrGetFixedMtrrWorker (FixedSettings
);
361 Worker function will get the raw value in variable MTRRs
363 @param[out] VariableSettings A buffer to hold variable MTRRs content.
365 @return The VariableSettings input pointer
368 MTRR_VARIABLE_SETTINGS
*
369 MtrrGetVariableMtrrWorker (
370 OUT MTRR_VARIABLE_SETTINGS
*VariableSettings
374 UINT32 VariableMtrrCount
;
376 VariableMtrrCount
= GetVariableMtrrCount ();
377 ASSERT (VariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
379 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
380 VariableSettings
->Mtrr
[Index
].Base
=
381 AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (Index
<< 1));
382 VariableSettings
->Mtrr
[Index
].Mask
=
383 AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (Index
<< 1) + 1);
386 return VariableSettings
;
390 This function will get the raw value in variable MTRRs
392 @param[out] VariableSettings A buffer to hold variable MTRRs content.
394 @return The VariableSettings input pointer
397 MTRR_VARIABLE_SETTINGS
*
399 MtrrGetVariableMtrr (
400 OUT MTRR_VARIABLE_SETTINGS
*VariableSettings
403 if (!IsMtrrSupported ()) {
404 return VariableSettings
;
407 return MtrrGetVariableMtrrWorker (
413 Programs fixed MTRRs registers.
415 @param[in] MemoryCacheType The memory type to set.
416 @param[in, out] Base The base address of memory range.
417 @param[in, out] Length The length of memory range.
419 @retval RETURN_SUCCESS The cache type was updated successfully
420 @retval RETURN_UNSUPPORTED The requested range or cache type was invalid
426 IN UINT64 MemoryCacheType
,
428 IN OUT UINT64
*Length
441 for (MsrNum
= 0; MsrNum
< MTRR_NUMBER_OF_FIXED_MTRR
; MsrNum
++) {
442 if ((*Base
>= mMtrrLibFixedMtrrTable
[MsrNum
].BaseAddress
) &&
445 mMtrrLibFixedMtrrTable
[MsrNum
].BaseAddress
+
446 (8 * mMtrrLibFixedMtrrTable
[MsrNum
].Length
)
454 if (MsrNum
== MTRR_NUMBER_OF_FIXED_MTRR
) {
455 return RETURN_UNSUPPORTED
;
459 // We found the fixed MTRR to be programmed
461 for (ByteShift
= 0; ByteShift
< 8; ByteShift
++) {
464 mMtrrLibFixedMtrrTable
[MsrNum
].BaseAddress
+
465 (ByteShift
* mMtrrLibFixedMtrrTable
[MsrNum
].Length
)
472 if (ByteShift
== 8) {
473 return RETURN_UNSUPPORTED
;
478 ((ByteShift
< 8) && (*Length
>= mMtrrLibFixedMtrrTable
[MsrNum
].Length
));
481 OrMask
|= LShiftU64 ((UINT64
) MemoryCacheType
, (UINT32
) (ByteShift
* 8));
482 ClearMask
|= LShiftU64 ((UINT64
) 0xFF, (UINT32
) (ByteShift
* 8));
483 *Length
-= mMtrrLibFixedMtrrTable
[MsrNum
].Length
;
484 *Base
+= mMtrrLibFixedMtrrTable
[MsrNum
].Length
;
487 if (ByteShift
< 8 && (*Length
!= 0)) {
488 return RETURN_UNSUPPORTED
;
492 (AsmReadMsr64 (mMtrrLibFixedMtrrTable
[MsrNum
].Msr
) & ~ClearMask
) | OrMask
;
493 AsmWriteMsr64 (mMtrrLibFixedMtrrTable
[MsrNum
].Msr
, TempQword
);
494 return RETURN_SUCCESS
;
499 Gets the attribute of variable MTRRs.
501 This function shadows the content of variable MTRRs into an
502 internal array: VariableMtrr.
504 @param[in] MtrrValidBitsMask The mask for the valid bit of the MTRR
505 @param[in] MtrrValidAddressMask The valid address mask for MTRR
506 @param[out] VariableMtrr The array to shadow variable MTRRs content
508 @return The return value of this paramter indicates the
509 number of MTRRs which has been used.
514 MtrrGetMemoryAttributeInVariableMtrr (
515 IN UINT64 MtrrValidBitsMask
,
516 IN UINT64 MtrrValidAddressMask
,
517 OUT VARIABLE_MTRR
*VariableMtrr
523 UINT32 FirmwareVariableMtrrCount
;
524 UINT32 VariableMtrrEnd
;
526 if (!IsMtrrSupported ()) {
530 FirmwareVariableMtrrCount
= GetFirmwareVariableMtrrCount ();
531 VariableMtrrEnd
= MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (2 * GetVariableMtrrCount ()) - 1;
533 ZeroMem (VariableMtrr
, sizeof (VARIABLE_MTRR
) * MTRR_NUMBER_OF_VARIABLE_MTRR
);
536 for (MsrNum
= MTRR_LIB_IA32_VARIABLE_MTRR_BASE
, Index
= 0;
538 (MsrNum
< VariableMtrrEnd
) &&
539 (Index
< FirmwareVariableMtrrCount
)
543 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) != 0) {
544 VariableMtrr
[Index
].Msr
= MsrNum
;
545 VariableMtrr
[Index
].BaseAddress
= (AsmReadMsr64 (MsrNum
) &
546 MtrrValidAddressMask
);
547 VariableMtrr
[Index
].Length
= ((~(AsmReadMsr64 (MsrNum
+ 1) &
548 MtrrValidAddressMask
)
552 VariableMtrr
[Index
].Type
= (AsmReadMsr64 (MsrNum
) & 0x0ff);
553 VariableMtrr
[Index
].Valid
= TRUE
;
554 VariableMtrr
[Index
].Used
= TRUE
;
555 UsedMtrr
= UsedMtrr
+ 1;
564 Checks overlap between given memory range and MTRRs.
566 @param[in] Start The start address of memory range.
567 @param[in] End The end address of memory range.
568 @param[in] VariableMtrr The array to shadow variable MTRRs content
570 @retval TRUE Overlap exists.
571 @retval FALSE No overlap.
575 CheckMemoryAttributeOverlap (
576 IN PHYSICAL_ADDRESS Start
,
577 IN PHYSICAL_ADDRESS End
,
578 IN VARIABLE_MTRR
*VariableMtrr
583 for (Index
= 0; Index
< 6; Index
++) {
585 VariableMtrr
[Index
].Valid
&&
587 (Start
> (VariableMtrr
[Index
].BaseAddress
+
588 VariableMtrr
[Index
].Length
- 1)
590 (End
< VariableMtrr
[Index
].BaseAddress
)
602 Marks a variable MTRR as non-valid.
604 @param[in] Index The index of the array VariableMtrr to be invalidated
605 @param[in] VariableMtrr The array to shadow variable MTRRs content
606 @param[out] UsedMtrr The number of MTRRs which has already been used
610 InvalidateShadowMtrr (
612 IN VARIABLE_MTRR
*VariableMtrr
,
616 VariableMtrr
[Index
].Valid
= FALSE
;
617 *UsedMtrr
= *UsedMtrr
- 1;
622 Combines memory attributes.
624 If overlap exists between given memory range and MTRRs, try to combine them.
626 @param[in] Attributes The memory type to set.
627 @param[in, out] Base The base address of memory range.
628 @param[in, out] Length The length of memory range.
629 @param[in] VariableMtrr The array to shadow variable MTRRs content
630 @param[in, out] UsedMtrr The number of MTRRs which has already been used
631 @param[out] OverwriteExistingMtrr Returns whether an existing MTRR was used
633 @retval EFI_SUCCESS Memory region successfully combined.
634 @retval EFI_ACCESS_DENIED Memory region cannot be combined.
638 CombineMemoryAttribute (
639 IN UINT64 Attributes
,
641 IN OUT UINT64
*Length
,
642 IN VARIABLE_MTRR
*VariableMtrr
,
643 IN OUT UINT32
*UsedMtrr
,
644 OUT BOOLEAN
*OverwriteExistingMtrr
652 UINT32 FirmwareVariableMtrrCount
;
653 BOOLEAN CoveredByExistingMtrr
;
655 FirmwareVariableMtrrCount
= GetFirmwareVariableMtrrCount ();
657 *OverwriteExistingMtrr
= FALSE
;
658 CoveredByExistingMtrr
= FALSE
;
659 EndAddress
= *Base
+*Length
- 1;
661 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
663 MtrrEnd
= VariableMtrr
[Index
].BaseAddress
+ VariableMtrr
[Index
].Length
- 1;
665 !VariableMtrr
[Index
].Valid
||
668 (EndAddress
< VariableMtrr
[Index
].BaseAddress
)
675 // Combine same attribute MTRR range
677 if (Attributes
== VariableMtrr
[Index
].Type
) {
679 // if the MTRR range contain the request range, set a flag, then continue to
680 // invalidate any MTRR of the same request range with higher priority cache type.
682 if (VariableMtrr
[Index
].BaseAddress
<= *Base
&& MtrrEnd
>= EndAddress
) {
683 CoveredByExistingMtrr
= TRUE
;
687 // invalid this MTRR, and program the combine range
690 (*Base
) < VariableMtrr
[Index
].BaseAddress
?
692 VariableMtrr
[Index
].BaseAddress
;
693 CombineEnd
= EndAddress
> MtrrEnd
? EndAddress
: MtrrEnd
;
696 // Record the MTRR usage status in VariableMtrr array.
698 InvalidateShadowMtrr (Index
, VariableMtrr
, UsedMtrr
);
699 *Base
= CombineStart
;
700 *Length
= CombineEnd
- CombineStart
+ 1;
701 EndAddress
= CombineEnd
;
702 *OverwriteExistingMtrr
= TRUE
;
706 // The cache type is different, but the range is convered by one MTRR
708 if (VariableMtrr
[Index
].BaseAddress
== *Base
&& MtrrEnd
== EndAddress
) {
709 InvalidateShadowMtrr (Index
, VariableMtrr
, UsedMtrr
);
715 if ((Attributes
== MTRR_CACHE_WRITE_THROUGH
&&
716 VariableMtrr
[Index
].Type
== MTRR_CACHE_WRITE_BACK
) ||
717 (Attributes
== MTRR_CACHE_WRITE_BACK
&&
718 VariableMtrr
[Index
].Type
== MTRR_CACHE_WRITE_THROUGH
) ||
719 (Attributes
== MTRR_CACHE_UNCACHEABLE
) ||
720 (VariableMtrr
[Index
].Type
== MTRR_CACHE_UNCACHEABLE
)
722 *OverwriteExistingMtrr
= TRUE
;
726 // Other type memory overlap is invalid
728 return RETURN_ACCESS_DENIED
;
731 if (CoveredByExistingMtrr
) {
735 return RETURN_SUCCESS
;
740 Calculates the maximum value which is a power of 2, but less the MemoryLength.
742 @param[in] MemoryLength The number to pass in.
744 @return The maximum value which is align to power of 2 and less the MemoryLength
749 IN UINT64 MemoryLength
754 if (RShiftU64 (MemoryLength
, 32) != 0) {
756 (UINT64
) GetPowerOfTwo32 (
757 (UINT32
) RShiftU64 (MemoryLength
, 32)
762 Result
= (UINT64
) GetPowerOfTwo32 ((UINT32
) MemoryLength
);
770 Determines the MTRR numbers used to program a memory range.
772 This function first checks the alignment of the base address.
773 If the alignment of the base address <= Length, cover the memory range
774 (BaseAddress, alignment) by a MTRR, then BaseAddress += alignment and
775 Length -= alignment. Repeat the step until alignment > Length.
777 Then this function determines which direction of programming the variable
778 MTRRs for the remaining length will use fewer MTRRs.
780 @param[in] BaseAddress Length of Memory to program MTRR
781 @param[in] Length Length of Memory to program MTRR
782 @param[in] MtrrNumber Pointer to the number of necessary MTRRs
784 @retval TRUE Positive direction is better.
785 FALSE Negative direction is better.
789 GetMtrrNumberAndDirection (
790 IN UINT64 BaseAddress
,
802 if (BaseAddress
!= 0) {
805 // Calculate the alignment of the base address.
807 Alignment
= LShiftU64 (1, (UINTN
)LowBitSet64 (BaseAddress
));
809 if (Alignment
> Length
) {
814 BaseAddress
+= Alignment
;
828 TempQword
-= Power2MaxMemory (TempQword
);
830 } while (TempQword
!= 0);
832 TempQword
= Power2MaxMemory (LShiftU64 (Length
, 1)) - Length
;
835 TempQword
-= Power2MaxMemory (TempQword
);
837 } while (TempQword
!= 0);
839 if (Positive
<= Subtractive
) {
840 *MtrrNumber
+= Positive
;
843 *MtrrNumber
+= Subtractive
;
849 Invalid variable MTRRs according to the value in the shadow array.
851 This function programs MTRRs according to the values specified
854 @param[in, out] VariableMtrr Shadow of variable MTRR contents
859 IN OUT VARIABLE_MTRR
*VariableMtrr
863 UINTN VariableMtrrCount
;
864 MTRR_CONTEXT MtrrContext
;
866 PreMtrrChange (&MtrrContext
);
868 VariableMtrrCount
= GetVariableMtrrCount ();
869 while (Index
< VariableMtrrCount
) {
870 if (!VariableMtrr
[Index
].Valid
&& VariableMtrr
[Index
].Used
) {
871 AsmWriteMsr64 (VariableMtrr
[Index
].Msr
, 0);
872 AsmWriteMsr64 (VariableMtrr
[Index
].Msr
+ 1, 0);
873 VariableMtrr
[Index
].Used
= FALSE
;
877 PostMtrrChange (&MtrrContext
);
882 Programs variable MTRRs
884 This function programs variable MTRRs
886 @param[in] MtrrNumber Index of MTRR to program.
887 @param[in] BaseAddress Base address of memory region.
888 @param[in] Length Length of memory region.
889 @param[in] MemoryCacheType Memory type to set.
890 @param[in] MtrrValidAddressMask The valid address mask for MTRR
894 ProgramVariableMtrr (
896 IN PHYSICAL_ADDRESS BaseAddress
,
898 IN UINT64 MemoryCacheType
,
899 IN UINT64 MtrrValidAddressMask
903 MTRR_CONTEXT MtrrContext
;
905 PreMtrrChange (&MtrrContext
);
908 // MTRR Physical Base
910 TempQword
= (BaseAddress
& MtrrValidAddressMask
) | MemoryCacheType
;
911 AsmWriteMsr64 ((UINT32
) MtrrNumber
, TempQword
);
914 // MTRR Physical Mask
916 TempQword
= ~(Length
- 1);
918 (UINT32
) (MtrrNumber
+ 1),
919 (TempQword
& MtrrValidAddressMask
) | MTRR_LIB_CACHE_MTRR_ENABLED
922 PostMtrrChange (&MtrrContext
);
927 Converts the Memory attribute value to MTRR_MEMORY_CACHE_TYPE.
929 @param[in] MtrrType MTRR memory type
931 @return The enum item in MTRR_MEMORY_CACHE_TYPE
934 MTRR_MEMORY_CACHE_TYPE
935 GetMemoryCacheTypeFromMtrrType (
940 case MTRR_CACHE_UNCACHEABLE
:
941 return CacheUncacheable
;
942 case MTRR_CACHE_WRITE_COMBINING
:
943 return CacheWriteCombining
;
944 case MTRR_CACHE_WRITE_THROUGH
:
945 return CacheWriteThrough
;
946 case MTRR_CACHE_WRITE_PROTECTED
:
947 return CacheWriteProtected
;
948 case MTRR_CACHE_WRITE_BACK
:
949 return CacheWriteBack
;
952 // MtrrType is MTRR_CACHE_INVALID_TYPE, that means
953 // no MTRR covers the range
955 return MtrrGetDefaultMemoryType ();
960 Initializes the valid bits mask and valid address mask for MTRRs.
962 This function initializes the valid bits mask and valid address mask for MTRRs.
964 @param[out] MtrrValidBitsMask The mask for the valid bit of the MTRR
965 @param[out] MtrrValidAddressMask The valid address mask for the MTRR
969 MtrrLibInitializeMtrrMask (
970 OUT UINT64
*MtrrValidBitsMask
,
971 OUT UINT64
*MtrrValidAddressMask
975 UINT8 PhysicalAddressBits
;
977 AsmCpuid (0x80000000, &RegEax
, NULL
, NULL
, NULL
);
979 if (RegEax
>= 0x80000008) {
980 AsmCpuid (0x80000008, &RegEax
, NULL
, NULL
, NULL
);
982 PhysicalAddressBits
= (UINT8
) RegEax
;
984 *MtrrValidBitsMask
= LShiftU64 (1, PhysicalAddressBits
) - 1;
985 *MtrrValidAddressMask
= *MtrrValidBitsMask
& 0xfffffffffffff000ULL
;
987 *MtrrValidBitsMask
= MTRR_LIB_MSR_VALID_MASK
;
988 *MtrrValidAddressMask
= MTRR_LIB_CACHE_VALID_ADDRESS
;
994 Determines the real attribute of a memory range.
996 This function is to arbitrate the real attribute of the memory when
997 there are 2 MTRRs covers the same memory range. For further details,
998 please refer the IA32 Software Developer's Manual, Volume 3,
1001 @param[in] MtrrType1 The first kind of Memory type
1002 @param[in] MtrrType2 The second kind of memory type
1007 IN UINT64 MtrrType1
,
1013 MtrrType
= MTRR_CACHE_INVALID_TYPE
;
1014 switch (MtrrType1
) {
1015 case MTRR_CACHE_UNCACHEABLE
:
1016 MtrrType
= MTRR_CACHE_UNCACHEABLE
;
1018 case MTRR_CACHE_WRITE_COMBINING
:
1020 MtrrType2
==MTRR_CACHE_WRITE_COMBINING
||
1021 MtrrType2
==MTRR_CACHE_UNCACHEABLE
1023 MtrrType
= MtrrType2
;
1026 case MTRR_CACHE_WRITE_THROUGH
:
1028 MtrrType2
==MTRR_CACHE_WRITE_THROUGH
||
1029 MtrrType2
==MTRR_CACHE_WRITE_BACK
1031 MtrrType
= MTRR_CACHE_WRITE_THROUGH
;
1032 } else if(MtrrType2
==MTRR_CACHE_UNCACHEABLE
) {
1033 MtrrType
= MTRR_CACHE_UNCACHEABLE
;
1036 case MTRR_CACHE_WRITE_PROTECTED
:
1037 if (MtrrType2
== MTRR_CACHE_WRITE_PROTECTED
||
1038 MtrrType2
== MTRR_CACHE_UNCACHEABLE
) {
1039 MtrrType
= MtrrType2
;
1042 case MTRR_CACHE_WRITE_BACK
:
1044 MtrrType2
== MTRR_CACHE_UNCACHEABLE
||
1045 MtrrType2
==MTRR_CACHE_WRITE_THROUGH
||
1046 MtrrType2
== MTRR_CACHE_WRITE_BACK
1048 MtrrType
= MtrrType2
;
1051 case MTRR_CACHE_INVALID_TYPE
:
1052 MtrrType
= MtrrType2
;
1058 if (MtrrType2
== MTRR_CACHE_INVALID_TYPE
) {
1059 MtrrType
= MtrrType1
;
1067 This function will get the memory cache type of the specific address.
1069 This function is mainly for debug purpose.
1071 @param[in] Address The specific address
1073 @return Memory cache type of the specific address
1076 MTRR_MEMORY_CACHE_TYPE
1078 MtrrGetMemoryAttribute (
1079 IN PHYSICAL_ADDRESS Address
1086 UINT64 TempMtrrType
;
1087 MTRR_MEMORY_CACHE_TYPE CacheType
;
1088 VARIABLE_MTRR VariableMtrr
[MTRR_NUMBER_OF_VARIABLE_MTRR
];
1089 UINT64 MtrrValidBitsMask
;
1090 UINT64 MtrrValidAddressMask
;
1091 UINTN VariableMtrrCount
;
1093 if (!IsMtrrSupported ()) {
1094 return CacheUncacheable
;
1098 // Check if MTRR is enabled, if not, return UC as attribute
1100 TempQword
= AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
);
1101 MtrrType
= MTRR_CACHE_INVALID_TYPE
;
1103 if ((TempQword
& MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1104 return CacheUncacheable
;
1108 // If address is less than 1M, then try to go through the fixed MTRR
1110 if (Address
< BASE_1MB
) {
1111 if ((TempQword
& MTRR_LIB_CACHE_FIXED_MTRR_ENABLED
) != 0) {
1113 // Go through the fixed MTRR
1115 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
1116 if (Address
>= mMtrrLibFixedMtrrTable
[Index
].BaseAddress
&&
1118 mMtrrLibFixedMtrrTable
[Index
].BaseAddress
+
1119 (mMtrrLibFixedMtrrTable
[Index
].Length
* 8)
1123 ((UINTN
)Address
- mMtrrLibFixedMtrrTable
[Index
].BaseAddress
) /
1124 mMtrrLibFixedMtrrTable
[Index
].Length
;
1125 TempQword
= AsmReadMsr64 (mMtrrLibFixedMtrrTable
[Index
].Msr
);
1126 MtrrType
= RShiftU64 (TempQword
, SubIndex
* 8) & 0xFF;
1127 return GetMemoryCacheTypeFromMtrrType (MtrrType
);
1132 MtrrLibInitializeMtrrMask(&MtrrValidBitsMask
, &MtrrValidAddressMask
);
1133 MtrrGetMemoryAttributeInVariableMtrr(
1135 MtrrValidAddressMask
,
1140 // Go through the variable MTRR
1142 VariableMtrrCount
= GetVariableMtrrCount ();
1143 ASSERT (VariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
1145 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
1146 if (VariableMtrr
[Index
].Valid
) {
1147 if (Address
>= VariableMtrr
[Index
].BaseAddress
&&
1148 Address
< VariableMtrr
[Index
].BaseAddress
+VariableMtrr
[Index
].Length
) {
1149 TempMtrrType
= VariableMtrr
[Index
].Type
;
1150 MtrrType
= MtrrPrecedence (MtrrType
, TempMtrrType
);
1154 CacheType
= GetMemoryCacheTypeFromMtrrType (MtrrType
);
1162 This function prints all MTRRs for debugging.
1166 MtrrDebugPrintAllMtrrs (
1171 MTRR_SETTINGS MtrrSettings
;
1174 UINTN VariableMtrrCount
;
1182 UINT64 NoRangeLimit
;
1185 UINTN PreviousMemoryType
;
1188 if (!IsMtrrSupported ()) {
1192 DEBUG((DEBUG_CACHE
, "MTRR Settings\n"));
1193 DEBUG((DEBUG_CACHE
, "=============\n"));
1195 MtrrGetAllMtrrs (&MtrrSettings
);
1196 DEBUG((DEBUG_CACHE
, "MTRR Default Type: %016lx\n", MtrrSettings
.MtrrDefType
));
1197 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
1198 DEBUG((DEBUG_CACHE
, "Fixed MTRR[%02d] : %016lx\n", Index
, MtrrSettings
.Fixed
.Mtrr
[Index
]));
1201 VariableMtrrCount
= GetVariableMtrrCount ();
1202 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
1203 DEBUG((DEBUG_CACHE
, "Variable MTRR[%02d]: Base=%016lx Mask=%016lx\n",
1205 MtrrSettings
.Variables
.Mtrr
[Index
].Base
,
1206 MtrrSettings
.Variables
.Mtrr
[Index
].Mask
1209 DEBUG((DEBUG_CACHE
, "\n"));
1210 DEBUG((DEBUG_CACHE
, "MTRR Ranges\n"));
1211 DEBUG((DEBUG_CACHE
, "====================================\n"));
1214 PreviousMemoryType
= MTRR_CACHE_INVALID_TYPE
;
1215 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
1216 Base
= mMtrrLibFixedMtrrTable
[Index
].BaseAddress
;
1217 for (Index1
= 0; Index1
< 8; Index1
++) {
1218 MemoryType
= (UINTN
)(RShiftU64 (MtrrSettings
.Fixed
.Mtrr
[Index
], Index1
* 8) & 0xff);
1219 if (MemoryType
> CacheWriteBack
) {
1220 MemoryType
= MTRR_CACHE_INVALID_TYPE
;
1222 if (MemoryType
!= PreviousMemoryType
) {
1223 if (PreviousMemoryType
!= MTRR_CACHE_INVALID_TYPE
) {
1224 DEBUG((DEBUG_CACHE
, "%016lx\n", Base
- 1));
1226 PreviousMemoryType
= MemoryType
;
1227 DEBUG((DEBUG_CACHE
, "%a:%016lx-", mMtrrMemoryCacheTypeShortName
[MemoryType
], Base
));
1229 Base
+= mMtrrLibFixedMtrrTable
[Index
].Length
;
1232 DEBUG((DEBUG_CACHE
, "%016lx\n", Base
- 1));
1234 VariableMtrrCount
= GetVariableMtrrCount ();
1237 AsmCpuid (0x80000000, &RegEax
, NULL
, NULL
, NULL
);
1238 if (RegEax
>= 0x80000008) {
1239 AsmCpuid (0x80000008, &RegEax
, NULL
, NULL
, NULL
);
1240 Limit
= LShiftU64 (1, RegEax
& 0xff) - 1;
1243 PreviousMemoryType
= MTRR_CACHE_INVALID_TYPE
;
1245 MemoryType
= MtrrGetMemoryAttribute (Base
);
1246 if (MemoryType
> CacheWriteBack
) {
1247 MemoryType
= MTRR_CACHE_INVALID_TYPE
;
1250 if (MemoryType
!= PreviousMemoryType
) {
1251 if (PreviousMemoryType
!= MTRR_CACHE_INVALID_TYPE
) {
1252 DEBUG((DEBUG_CACHE
, "%016lx\n", Base
- 1));
1254 PreviousMemoryType
= MemoryType
;
1255 DEBUG((DEBUG_CACHE
, "%a:%016lx-", mMtrrMemoryCacheTypeShortName
[MemoryType
], Base
));
1258 RangeBase
= BASE_1MB
;
1259 NoRangeBase
= BASE_1MB
;
1261 NoRangeLimit
= Limit
;
1263 for (Index
= 0, Found
= FALSE
; Index
< VariableMtrrCount
; Index
++) {
1264 if ((MtrrSettings
.Variables
.Mtrr
[Index
].Mask
& BIT11
) == 0) {
1266 // If mask is not valid, then do not display range
1270 MtrrBase
= (MtrrSettings
.Variables
.Mtrr
[Index
].Base
& (~(SIZE_4KB
- 1)));
1271 MtrrLimit
= MtrrBase
+ ((~(MtrrSettings
.Variables
.Mtrr
[Index
].Mask
& (~(SIZE_4KB
- 1)))) & Limit
);
1273 if (Base
>= MtrrBase
&& Base
< MtrrLimit
) {
1277 if (Base
>= MtrrBase
&& MtrrBase
> RangeBase
) {
1278 RangeBase
= MtrrBase
;
1280 if (Base
> MtrrLimit
&& MtrrLimit
> RangeBase
) {
1281 RangeBase
= MtrrLimit
+ 1;
1283 if (Base
< MtrrBase
&& MtrrBase
< RangeLimit
) {
1284 RangeLimit
= MtrrBase
- 1;
1286 if (Base
< MtrrLimit
&& MtrrLimit
<= RangeLimit
) {
1287 RangeLimit
= MtrrLimit
;
1290 if (Base
> MtrrLimit
&& NoRangeBase
< MtrrLimit
) {
1291 NoRangeBase
= MtrrLimit
+ 1;
1293 if (Base
< MtrrBase
&& NoRangeLimit
> MtrrBase
) {
1294 NoRangeLimit
= MtrrBase
- 1;
1299 Base
= RangeLimit
+ 1;
1301 Base
= NoRangeLimit
+ 1;
1303 } while (Base
< Limit
);
1304 DEBUG((DEBUG_CACHE
, "%016lx\n\n", Base
- 1));
1308 This function attempts to set the attributes for a memory range.
1310 @param[in] BaseAddress The physical address that is the start
1311 address of a memory region.
1312 @param[in] Length The size in bytes of the memory region.
1313 @param[in] Attribute The bit mask of attributes to set for the
1316 @retval RETURN_SUCCESS The attributes were set for the memory
1318 @retval RETURN_INVALID_PARAMETER Length is zero.
1319 @retval RETURN_UNSUPPORTED The processor does not support one or
1320 more bytes of the memory resource range
1321 specified by BaseAddress and Length.
1322 @retval RETURN_UNSUPPORTED The bit mask of attributes is not support
1323 for the memory resource range specified
1324 by BaseAddress and Length.
1325 @retval RETURN_ACCESS_DENIED The attributes for the memory resource
1326 range specified by BaseAddress and Length
1328 @retval RETURN_OUT_OF_RESOURCES There are not enough system resources to
1329 modify the attributes of the memory
1335 MtrrSetMemoryAttribute (
1336 IN PHYSICAL_ADDRESS BaseAddress
,
1338 IN MTRR_MEMORY_CACHE_TYPE Attribute
1342 RETURN_STATUS Status
;
1349 VARIABLE_MTRR VariableMtrr
[MTRR_NUMBER_OF_VARIABLE_MTRR
];
1351 UINT64 MtrrValidBitsMask
;
1352 UINT64 MtrrValidAddressMask
;
1353 BOOLEAN OverwriteExistingMtrr
;
1354 UINT32 FirmwareVariableMtrrCount
;
1355 UINT32 VariableMtrrEnd
;
1356 MTRR_CONTEXT MtrrContext
;
1358 DEBUG((DEBUG_CACHE
, "MtrrSetMemoryAttribute() %a:%016lx-%016lx\n", mMtrrMemoryCacheTypeShortName
[Attribute
], BaseAddress
, Length
));
1360 if (!IsMtrrSupported ()) {
1361 Status
= RETURN_UNSUPPORTED
;
1365 FirmwareVariableMtrrCount
= GetFirmwareVariableMtrrCount ();
1366 VariableMtrrEnd
= MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (2 * GetVariableMtrrCount ()) - 1;
1368 MtrrLibInitializeMtrrMask(&MtrrValidBitsMask
, &MtrrValidAddressMask
);
1371 MemoryType
= (UINT64
)Attribute
;
1372 OverwriteExistingMtrr
= FALSE
;
1375 // Check for an invalid parameter
1378 Status
= RETURN_INVALID_PARAMETER
;
1383 (BaseAddress
& ~MtrrValidAddressMask
) != 0 ||
1384 (Length
& ~MtrrValidAddressMask
) != 0
1386 Status
= RETURN_UNSUPPORTED
;
1391 // Check if Fixed MTRR
1393 Status
= RETURN_SUCCESS
;
1394 while ((BaseAddress
< BASE_1MB
) && (Length
> 0) && Status
== RETURN_SUCCESS
) {
1395 PreMtrrChange (&MtrrContext
);
1396 Status
= ProgramFixedMtrr (MemoryType
, &BaseAddress
, &Length
);
1397 PostMtrrChange (&MtrrContext
);
1398 if (RETURN_ERROR (Status
)) {
1405 // A Length of 0 can only make sense for fixed MTTR ranges.
1406 // Since we just handled the fixed MTRRs, we can skip the
1407 // variable MTRR section.
1413 // Since memory ranges below 1MB will be overridden by the fixed MTRRs,
1414 // we can set the base to 0 to save variable MTRRs.
1416 if (BaseAddress
== BASE_1MB
) {
1422 // Check for overlap
1424 UsedMtrr
= MtrrGetMemoryAttributeInVariableMtrr (MtrrValidBitsMask
, MtrrValidAddressMask
, VariableMtrr
);
1425 OverLap
= CheckMemoryAttributeOverlap (BaseAddress
, BaseAddress
+ Length
- 1, VariableMtrr
);
1427 Status
= CombineMemoryAttribute (MemoryType
, &BaseAddress
, &Length
, VariableMtrr
, &UsedMtrr
, &OverwriteExistingMtrr
);
1428 if (RETURN_ERROR (Status
)) {
1434 // Combined successfully, invalidate the now-unused MTRRs
1436 InvalidateMtrr(VariableMtrr
);
1437 Status
= RETURN_SUCCESS
;
1443 // The memory type is the same with the type specified by
1444 // MTRR_LIB_IA32_MTRR_DEF_TYPE.
1446 if ((!OverwriteExistingMtrr
) && (Attribute
== MtrrGetDefaultMemoryType ())) {
1448 // Invalidate the now-unused MTRRs
1450 InvalidateMtrr(VariableMtrr
);
1454 Positive
= GetMtrrNumberAndDirection (BaseAddress
, Length
, &MtrrNumber
);
1456 if ((UsedMtrr
+ MtrrNumber
) > FirmwareVariableMtrrCount
) {
1457 Status
= RETURN_OUT_OF_RESOURCES
;
1462 // Invalidate the now-unused MTRRs
1464 InvalidateMtrr(VariableMtrr
);
1467 // Find first unused MTRR
1469 for (MsrNum
= MTRR_LIB_IA32_VARIABLE_MTRR_BASE
;
1470 MsrNum
< VariableMtrrEnd
;
1473 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1478 if (BaseAddress
!= 0) {
1481 // Calculate the alignment of the base address.
1483 Alignment
= LShiftU64 (1, (UINTN
)LowBitSet64 (BaseAddress
));
1485 if (Alignment
> Length
) {
1492 for (; MsrNum
< VariableMtrrEnd
; MsrNum
+= 2) {
1493 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1498 ProgramVariableMtrr (
1503 MtrrValidAddressMask
1505 BaseAddress
+= Alignment
;
1506 Length
-= Alignment
;
1517 Length
= Power2MaxMemory (LShiftU64 (TempQword
, 1));
1522 for (; MsrNum
< VariableMtrrEnd
; MsrNum
+= 2) {
1523 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1528 ProgramVariableMtrr (
1533 MtrrValidAddressMask
1535 BaseAddress
+= Length
;
1536 TempQword
= Length
- TempQword
;
1537 MemoryType
= MTRR_CACHE_UNCACHEABLE
;
1544 for (; MsrNum
< VariableMtrrEnd
; MsrNum
+= 2) {
1545 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1550 Length
= Power2MaxMemory (TempQword
);
1552 BaseAddress
-= Length
;
1555 ProgramVariableMtrr (
1560 MtrrValidAddressMask
1564 BaseAddress
+= Length
;
1566 TempQword
-= Length
;
1568 } while (TempQword
> 0);
1571 DEBUG((DEBUG_CACHE
, " Status = %r\n", Status
));
1572 if (!RETURN_ERROR (Status
)) {
1573 MtrrDebugPrintAllMtrrs ();
1579 Worker function setting variable MTRRs
1581 @param[in] VariableSettings A buffer to hold variable MTRRs content.
1585 MtrrSetVariableMtrrWorker (
1586 IN MTRR_VARIABLE_SETTINGS
*VariableSettings
1590 UINT32 VariableMtrrCount
;
1592 VariableMtrrCount
= GetVariableMtrrCount ();
1593 ASSERT (VariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
1595 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
1597 MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (Index
<< 1),
1598 VariableSettings
->Mtrr
[Index
].Base
1601 MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (Index
<< 1) + 1,
1602 VariableSettings
->Mtrr
[Index
].Mask
1609 This function sets variable MTRRs
1611 @param[in] VariableSettings A buffer to hold variable MTRRs content.
1613 @return The pointer of VariableSettings
1616 MTRR_VARIABLE_SETTINGS
*
1618 MtrrSetVariableMtrr (
1619 IN MTRR_VARIABLE_SETTINGS
*VariableSettings
1622 MTRR_CONTEXT MtrrContext
;
1624 if (!IsMtrrSupported ()) {
1625 return VariableSettings
;
1628 PreMtrrChange (&MtrrContext
);
1629 MtrrSetVariableMtrrWorker (VariableSettings
);
1630 PostMtrrChange (&MtrrContext
);
1631 return VariableSettings
;
1635 Worker function setting fixed MTRRs
1637 @param[in] FixedSettings A buffer to hold fixed Mtrrs content.
1641 MtrrSetFixedMtrrWorker (
1642 IN MTRR_FIXED_SETTINGS
*FixedSettings
1647 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
1649 mMtrrLibFixedMtrrTable
[Index
].Msr
,
1650 FixedSettings
->Mtrr
[Index
]
1657 This function sets fixed MTRRs
1659 @param[in] FixedSettings A buffer to hold fixed Mtrrs content.
1661 @retval The pointer of FixedSettings
1664 MTRR_FIXED_SETTINGS
*
1667 IN MTRR_FIXED_SETTINGS
*FixedSettings
1670 MTRR_CONTEXT MtrrContext
;
1672 if (!IsMtrrSupported ()) {
1673 return FixedSettings
;
1676 PreMtrrChange (&MtrrContext
);
1677 MtrrSetFixedMtrrWorker (FixedSettings
);
1678 PostMtrrChange (&MtrrContext
);
1680 return FixedSettings
;
1685 This function gets the content in all MTRRs (variable and fixed)
1687 @param[out] MtrrSetting A buffer to hold all Mtrrs content.
1689 @retval the pointer of MtrrSetting
1695 OUT MTRR_SETTINGS
*MtrrSetting
1698 if (!IsMtrrSupported ()) {
1705 MtrrGetFixedMtrr (&MtrrSetting
->Fixed
);
1708 // Get variable MTRRs
1710 MtrrGetVariableMtrr (&MtrrSetting
->Variables
);
1713 // Get MTRR_DEF_TYPE value
1715 MtrrSetting
->MtrrDefType
= AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
);
1722 This function sets all MTRRs (variable and fixed)
1724 @param[in] MtrrSetting A buffer holding all MTRRs content.
1726 @retval The pointer of MtrrSetting
1732 IN MTRR_SETTINGS
*MtrrSetting
1735 MTRR_CONTEXT MtrrContext
;
1737 if (!IsMtrrSupported ()) {
1741 PreMtrrChange (&MtrrContext
);
1746 MtrrSetFixedMtrrWorker (&MtrrSetting
->Fixed
);
1749 // Set variable MTRRs
1751 MtrrSetVariableMtrrWorker (&MtrrSetting
->Variables
);
1754 // Set MTRR_DEF_TYPE value
1756 AsmWriteMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
, MtrrSetting
->MtrrDefType
);
1758 PostMtrrChangeEnableCache (&MtrrContext
);
1764 Checks if MTRR is supported.
1766 @retval TRUE MTRR is supported.
1767 @retval FALSE MTRR is not supported.
1780 // Check CPUID(1).EDX[12] for MTRR capability
1782 AsmCpuid (1, NULL
, NULL
, NULL
, &RegEdx
);
1783 if (BitFieldRead32 (RegEdx
, 12, 12) == 0) {
1788 // Check IA32_MTRRCAP.[0..7] for number of variable MTRRs and IA32_MTRRCAP[8] for
1789 // fixed MTRRs existence. If number of variable MTRRs is zero, or fixed MTRRs do not
1790 // exist, return false.
1792 MtrrCap
= AsmReadMsr64 (MTRR_LIB_IA32_MTRR_CAP
);
1793 if ((BitFieldRead64 (MtrrCap
, 0, 7) == 0) || (BitFieldRead64 (MtrrCap
, 8, 8) == 0)) {