UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.S

   1 #------------------------------------------------------------------------------
   2 #
   3 # Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
   4 # This program and the accompanying materials
   5 # are licensed and made available under the terms and conditions of the BSD License
   6 # which accompanies this distribution.  The full text of the license may be found at
   7 # http://opensource.org/licenses/bsd-license.php.
   8 #
   9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 #
  12 # Module Name:
  13 #
  14 #   SmiException.S
  15 #
  16 # Abstract:
  17 #
  18 #   Exception handlers used in SM mode
  19 #
  20 #------------------------------------------------------------------------------
  21
  22 ASM_GLOBAL  ASM_PFX(gcStmPsd)
  23
  24 ASM_GLOBAL  ASM_PFX(SmmStmExceptionHandler)
  25 ASM_GLOBAL  ASM_PFX(SmmStmSetup)
  26 ASM_GLOBAL  ASM_PFX(SmmStmTeardown)
  27
  28 .equ  MSR_IA32_MISC_ENABLE, 0x1A0
  29 .equ  MSR_EFER,             0xc0000080
  30 .equ  MSR_EFER_XD,          0x800
  31
  32 .equ  CODE_SEL,          0x08
  33 .equ  DATA_SEL,          0x20
  34 .equ  TSS_SEL,           0x40
  35
  36     .data
  37
  38 ASM_PFX(gcStmPsd):
  39             .ascii  "TXTPSSIG"
  40             .word      PSD_SIZE
  41             .word      1              # Version
  42             .long      0              # LocalApicId
  43             .byte      0x5            # Cr4Pse;Cr4Pae;Intel64Mode;ExecutionDisableOutsideSmrr
  44             .byte      0              # BIOS to STM
  45             .byte      0              # STM to BIOS
  46             .byte      0
  47             .word      CODE_SEL
  48             .word      DATA_SEL
  49             .word      DATA_SEL
  50             .word      DATA_SEL
  51             .word      TSS_SEL
  52             .word      0
  53             .quad      0              # SmmCr3
  54             .long      ASM_PFX(_OnStmSetup)
  55             .long      0
  56             .long      ASM_PFX(_OnStmTeardown)
  57             .long      0
  58             .quad      0              # SmmSmiHandlerRip - SMM guest entrypoint
  59             .quad      0              # SmmSmiHandlerRsp
  60             .quad      0
  61             .long      0
  62             .long      0x80010100     # RequiredStmSmmRevId
  63             .long      ASM_PFX(_OnException)
  64             .long      0
  65             .quad      0              # ExceptionStack
  66             .word      DATA_SEL
  67             .word      0x1F           # ExceptionFilter
  68             .long      0
  69             .quad      0
  70             .quad      0              # BiosHwResourceRequirementsPtr
  71             .quad      0              # AcpiRsdp
  72             .byte      0              # PhysicalAddressBits
  73 .equ  PSD_SIZE,  . - ASM_PFX(gcStmPsd)
  74
  75     .text
  76
  77 #------------------------------------------------------------------------------
  78 # SMM Exception handlers
  79 #------------------------------------------------------------------------------
  80 ASM_GLOBAL ASM_PFX(_OnException)
  81 ASM_PFX(_OnException):
  82     movl  %esp, %ecx
  83     pushl %ecx
  84     call  ASM_PFX(SmmStmExceptionHandler)
  85     addl  $4, %esp
  86
  87     movl  %eax, %ebx
  88     movl  $4, %eax
  89     .byte 0xf, 0x1, 0xc1 # VMCALL
  90     jmp .
  91
  92 ASM_GLOBAL ASM_PFX(_OnStmSetup)
  93 ASM_PFX(_OnStmSetup):
  94 #
  95 # Check XD disable bit
  96 #
  97     xorl    %esi, %esi
  98     movl    $ASM_PFX(gStmXdSupported), %eax
  99     movb    (%eax), %al
 100     cmpb    $0, %al
 101     jz      StmXdDone1
 102     movl    $MSR_IA32_MISC_ENABLE, %ecx
 103     rdmsr
 104     movl    %edx, %esi                     # save MSR_IA32_MISC_ENABLE[63-32]
 105     testl   $BIT2, %edx                    # MSR_IA32_MISC_ENABLE[34]
 106     jz      L13
 107     andw    $0x0FFFB, %dx                  # clear XD Disable bit if it is set
 108     wrmsr
 109 L13:
 110     movl    $MSR_EFER, %ecx
 111     rdmsr
 112     orw     $MSR_EFER_XD,%ax               # enable NXE
 113     wrmsr
 114 StmXdDone1:
 115     push    %esi
 116
 117   call ASM_PFX(SmmStmSetup)
 118
 119     movl    $ASM_PFX(gStmXdSupported), %eax
 120     movb    (%eax), %al
 121     cmpb    $0, %al
 122     jz      L14
 123     popl    %edx                        # get saved MSR_IA32_MISC_ENABLE[63-32]
 124     testl   $BIT2, %edx
 125     jz      L14
 126     movl    $MSR_IA32_MISC_ENABLE, %ecx
 127     rdmsr
 128     orw     $BIT2, %dx                  # set XD Disable bit if it was set before entering into SMM
 129     wrmsr
 130 L14:
 131
 132   rsm
 133
 134 ASM_GLOBAL ASM_PFX(_OnStmTeardown)
 135 ASM_PFX(_OnStmTeardown):
 136 #
 137 # Check XD disable bit
 138 #
 139     xorl    %esi, %esi
 140     movl    $ASM_PFX(gStmXdSupported), %eax
 141     movb    (%eax), %al
 142     cmpb    $0, %al
 143     jz      StmXdDone2
 144     movl    $MSR_IA32_MISC_ENABLE, %ecx
 145     rdmsr
 146     movl    %edx, %esi                     # save MSR_IA32_MISC_ENABLE[63-32]
 147     testl   $BIT2, %edx                    # MSR_IA32_MISC_ENABLE[34]
 148     jz      L15
 149     andw    $0x0FFFB, %dx                  # clear XD Disable bit if it is set
 150     wrmsr
 151 L15:
 152     movl    $MSR_EFER, %ecx
 153     rdmsr
 154     orw     $MSR_EFER_XD,%ax               # enable NXE
 155     wrmsr
 156 StmXdDone2:
 157     push    %esi
 158
 159   call ASM_PFX(SmmStmTeardown)
 160
 161     movl    $ASM_PFX(gStmXdSupported), %eax
 162     movb    (%eax), %al
 163     cmpb    $0, %al
 164     jz      L16
 165     popl    %edx                        # get saved MSR_IA32_MISC_ENABLE[63-32]
 166     testl   $BIT2, %edx
 167     jz      L16
 168     movl    $MSR_IA32_MISC_ENABLE, %ecx
 169     rdmsr
 170     orw     $BIT2, %dx                  # set XD Disable bit if it was set before entering into SMM
 171     wrmsr
 172 L16:
 173
 174   rsm